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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc --mtriple=loongarch32 -mattr=+32s,+d < %s | FileCheck %s3 4;; Test generation of the bstrins.w instruction.5;; There are 8 patterns that can be matched to bstrins.w. See performORCombine6;; for details.7 8;; Pattern 19;; R = or (and X, mask0), (and (shl Y, lsb), mask1)10;; =>11;; R = BSTRINS X, Y, msb, lsb12define i32 @pat1(i32 %a, i32 %b) nounwind {13; CHECK-LABEL: pat1:14; CHECK: # %bb.0:15; CHECK-NEXT: bstrins.w $a0, $a1, 19, 816; CHECK-NEXT: ret17 %and1 = and i32 %a, -1048321 ; 0xfff000ff18 %shl = shl i32 %b, 819 %and2 = and i32 %shl, 1048320 ; 0x000fff0020 %or = or i32 %and1, %and221 ret i32 %or22}23 24define i32 @pat1_swap(i32 %a, i32 %b) nounwind {25; CHECK-LABEL: pat1_swap:26; CHECK: # %bb.0:27; CHECK-NEXT: bstrins.w $a0, $a1, 19, 828; CHECK-NEXT: ret29 %and1 = and i32 %a, -1048321 ; 0xfff000ff30 %shl = shl i32 %b, 831 %and2 = and i32 %shl, 1048320 ; 0x000fff0032 %or = or i32 %and2, %and133 ret i32 %or34}35 36;; Pattern 237;; R = or (and X, mask0), (shl (and Y, mask1), lsb)38;; =>39;; R = BSTRINS X, Y, msb, lsb40define i32 @pat2(i32 %a, i32 %b) nounwind {41; CHECK-LABEL: pat2:42; CHECK: # %bb.0:43; CHECK-NEXT: bstrins.w $a0, $a1, 19, 844; CHECK-NEXT: ret45 %and1 = and i32 %a, -1048321 ; 0xfff000ff46 %and2 = and i32 %b, 4095 ; 0x00000fff47 %shl = shl i32 %and2, 848 %or = or i32 %and1, %shl49 ret i32 %or50}51 52define i32 @pat2_swap(i32 %a, i32 %b) nounwind {53; CHECK-LABEL: pat2_swap:54; CHECK: # %bb.0:55; CHECK-NEXT: bstrins.w $a0, $a1, 19, 856; CHECK-NEXT: ret57 %and1 = and i32 %a, -1048321 ; 0xfff000ff58 %and2 = and i32 %b, 4095 ; 0x00000fff59 %shl = shl i32 %and2, 860 %or = or i32 %shl, %and161 ret i32 %or62}63 64;; Pattern 365;; R = or (and X, mask0), (and Y, mask1)66;; =>67;; R = BSTRINS X, (srl (and Y, mask1), lsb), msb, lsb68define i32 @pat3(i32 %a, i32 %b) nounwind {69; CHECK-LABEL: pat3:70; CHECK: # %bb.0:71; CHECK-NEXT: andi $a1, $a1, 28872; CHECK-NEXT: srli.w $a1, $a1, 473; CHECK-NEXT: bstrins.w $a0, $a1, 11, 474; CHECK-NEXT: ret75 %and1 = and i32 %a, -4081 ; 0xfffff00f76 %and2 = and i32 %b, 288 ; 0x0000012077 %or = or i32 %and1, %and278 ret i32 %or79}80 81define i32 @pat3_swap(i32 %a, i32 %b) nounwind {82; CHECK-LABEL: pat3_swap:83; CHECK: # %bb.0:84; CHECK-NEXT: andi $a1, $a1, 28885; CHECK-NEXT: srli.w $a1, $a1, 486; CHECK-NEXT: bstrins.w $a0, $a1, 11, 487; CHECK-NEXT: ret88 %and1 = and i32 %a, -4081 ; 0xfffff00f89 %and2 = and i32 %b, 288 ; 0x0000012090 %or = or i32 %and2, %and191 ret i32 %or92}93 94define i32 @pat3_positive_mask0(i32 %a, i32 %b) nounwind {95; CHECK-LABEL: pat3_positive_mask0:96; CHECK: # %bb.0:97; CHECK-NEXT: srli.w $a1, $a1, 2898; CHECK-NEXT: bstrins.w $a0, $a1, 31, 2899; CHECK-NEXT: ret100 %and1 = and i32 %a, 268435455 ; 0x0fffffff101 %and2 = and i32 %b, 4026531840 ; 0xf0000000102 %or = or i32 %and1, %and2103 ret i32 %or104}105 106;; Pattern 4107;; R = or (and X, mask), (shl Y, shamt)108;; =>109;; R = BSTRINS X, Y, 31, shamt110define i32 @pat4(i32 %a, i32 %b) nounwind {111; CHECK-LABEL: pat4:112; CHECK: # %bb.0:113; CHECK-NEXT: bstrins.w $a0, $a1, 31, 28114; CHECK-NEXT: ret115 %and = and i32 %a, 268435455 ; 0x0fffffff116 %shl = shl i32 %b, 28117 %or = or i32 %and, %shl118 ret i32 %or119}120 121define i32 @pat4_swap(i32 %a, i32 %b) nounwind {122; CHECK-LABEL: pat4_swap:123; CHECK: # %bb.0:124; CHECK-NEXT: bstrins.w $a0, $a1, 31, 28125; CHECK-NEXT: ret126 %and = and i32 %a, 268435455 ; 0x0fffffff127 %shl = shl i32 %b, 28128 %or = or i32 %shl, %and129 ret i32 %or130}131 132;; Pattern 5133;; R = or (and X, mask), const134;; =>135;; R = BSTRINS X, (const >> lsb), msb, lsb136define i32 @pat5(i32 %a) nounwind {137; CHECK-LABEL: pat5:138; CHECK: # %bb.0:139; CHECK-NEXT: lu12i.w $a1, 1140; CHECK-NEXT: ori $a1, $a1, 564141; CHECK-NEXT: bstrins.w $a0, $a1, 23, 8142; CHECK-NEXT: ret143 %and = and i32 %a, 4278190335 ; 0xff0000ff144 %or = or i32 %and, 1192960 ; 0x00123400145 ret i32 %or146}147 148;; The high bits of `const` are zero.149define i32 @pat5_high_zeros(i32 %a) nounwind {150; CHECK-LABEL: pat5_high_zeros:151; CHECK: # %bb.0:152; CHECK-NEXT: lu12i.w $a1, 1153; CHECK-NEXT: ori $a1, $a1, 564154; CHECK-NEXT: bstrins.w $a0, $a1, 31, 16155; CHECK-NEXT: ret156 %and = and i32 %a, 65535 ; 0x0000ffff157 %or = or i32 %and, 305397760 ; 0x12340000158 ret i32 %or159}160 161;; Pattern 6: a = b | ((c & mask) << shamt)162;; In this testcase b is 0x10000002, but in fact we do not require b being a163;; constant. As long as all positions in b to be overwritten by the incoming164;; bits are known to be zero, the pattern could be matched.165define i32 @pat6(i32 %c) nounwind {166; CHECK-LABEL: pat6:167; CHECK: # %bb.0:168; CHECK-NEXT: lu12i.w $a1, 65536169; CHECK-NEXT: ori $a1, $a1, 2170; CHECK-NEXT: bstrins.w $a1, $a0, 27, 4171; CHECK-NEXT: move $a0, $a1172; CHECK-NEXT: ret173 %and = and i32 %c, 16777215 ; 0x00ffffff174 %shl = shl i32 %and, 4175 %or = or i32 %shl, 268435458 ; 0x10000002176 ret i32 %or177}178 179;; Pattern 7: a = b | ((c << shamt) & shifted_mask)180;; Similar to pattern 6.181define i32 @pat7(i32 %c) nounwind {182; CHECK-LABEL: pat7:183; CHECK: # %bb.0:184; CHECK-NEXT: lu12i.w $a1, 65536185; CHECK-NEXT: ori $a1, $a1, 2186; CHECK-NEXT: bstrins.w $a1, $a0, 27, 4187; CHECK-NEXT: move $a0, $a1188; CHECK-NEXT: ret189 %shl = shl i32 %c, 4190 %and = and i32 %shl, 268435440 ; 0x0ffffff0191 %or = or i32 %and, 268435458 ; 0x10000002192 ret i32 %or193}194 195;; Pattern 8: a = b | (c & shifted_mask)196;; Similar to pattern 7 but without shift to c.197define i32 @pat8(i32 %c) nounwind {198; CHECK-LABEL: pat8:199; CHECK: # %bb.0:200; CHECK-NEXT: srli.w $a1, $a0, 4201; CHECK-NEXT: lu12i.w $a0, 65536202; CHECK-NEXT: ori $a0, $a0, 2203; CHECK-NEXT: bstrins.w $a0, $a1, 27, 4204; CHECK-NEXT: ret205 %and = and i32 %c, 268435440 ; 0x0ffffff0206 %or = or i32 %and, 268435458 ; 0x10000002207 ret i32 %or208}209 210define i32 @pat9(i32 %a) {211; CHECK-LABEL: pat9:212; CHECK: # %bb.0:213; CHECK-NEXT: lu12i.w $a1, -8214; CHECK-NEXT: ori $a1, $a1, 564215; CHECK-NEXT: bstrins.w $a0, $a1, 31, 16216; CHECK-NEXT: ret217 %and = and i32 %a, 65535 ; 0x0000ffff218 %or = or i32 %and, -2110521344 ; 0x82340000219 ret i32 %or220}221 222;; Test that bstrins.w is not generated because constant OR operand223;; doesn't fit into bits cleared by constant AND operand.224define i32 @no_bstrins_w(i32 %a) nounwind {225; CHECK-LABEL: no_bstrins_w:226; CHECK: # %bb.0:227; CHECK-NEXT: lu12i.w $a1, 291228; CHECK-NEXT: ori $a1, $a1, 1104229; CHECK-NEXT: or $a0, $a0, $a1230; CHECK-NEXT: lu12i.w $a1, -3805231; CHECK-NEXT: ori $a1, $a1, 1279232; CHECK-NEXT: and $a0, $a0, $a1233; CHECK-NEXT: ret234 %and = and i32 %a, 4278190335 ; 0xff0000ff235 %or = or i32 %and, 1193040 ; 0x00123450236 ret i32 %or237}238