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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc --mtriple=loongarch64 -mattr=+d < %s | FileCheck %s3 4define i64 @lshr40_and255(i64 %a) {5; CHECK-LABEL: lshr40_and255:6; CHECK: # %bb.0:7; CHECK-NEXT: bstrpick.d $a0, $a0, 47, 408; CHECK-NEXT: ret9 %shr = lshr i64 %a, 4010 %and = and i64 %shr, 25511 ret i64 %and12}13 14define i64 @ashr50_and511(i64 %a) {15; CHECK-LABEL: ashr50_and511:16; CHECK: # %bb.0:17; CHECK-NEXT: bstrpick.d $a0, $a0, 58, 5018; CHECK-NEXT: ret19 %shr = ashr i64 %a, 5020 %and = and i64 %shr, 51121 ret i64 %and22}23 24define i64 @zext_i32_to_i64(i32 %a) {25; CHECK-LABEL: zext_i32_to_i64:26; CHECK: # %bb.0:27; CHECK-NEXT: bstrpick.d $a0, $a0, 31, 028; CHECK-NEXT: ret29 %res = zext i32 %a to i6430 ret i64 %res31}32 33define i64 @and8191(i64 %a) {34; CHECK-LABEL: and8191:35; CHECK: # %bb.0:36; CHECK-NEXT: bstrpick.d $a0, $a0, 12, 037; CHECK-NEXT: ret38 %and = and i64 %a, 819139 ret i64 %and40}41 42;; Check that andi but not bstrpick.d is generated.43define i64 @and4095(i64 %a) {44; CHECK-LABEL: and4095:45; CHECK: # %bb.0:46; CHECK-NEXT: andi $a0, $a0, 409547; CHECK-NEXT: ret48 %and = and i64 %a, 409549 ret i64 %and50}51 52;; (srl (and a, 0xff0), 4) => (BSTRPICK a, 11, 4)53define i64 @and0xff0_lshr4(i64 %a) {54; CHECK-LABEL: and0xff0_lshr4:55; CHECK: # %bb.0:56; CHECK-NEXT: bstrpick.d $a0, $a0, 11, 457; CHECK-NEXT: ret58 %and = and i64 %a, 408059 %shr = lshr i64 %and, 460 ret i64 %shr61}62 63;; (sra (and a, 0xff0), 5) can also be combined to (BSTRPICK a, 11, 5).64;; This is because (sra (and a, 0xff0)) would be combined to (srl (and a, 0xff0), 5)65;; firstly by DAGCombiner::SimplifyDemandedBits.66define i64 @and4080_ashr5(i64 %a) {67; CHECK-LABEL: and4080_ashr5:68; CHECK: # %bb.0:69; CHECK-NEXT: bstrpick.d $a0, $a0, 11, 570; CHECK-NEXT: ret71 %and = and i64 %a, 408072 %shr = ashr i64 %and, 573 ret i64 %shr74}75 76;; Negative test: the second operand of AND is not a shifted mask77define i64 @and0xf30_lshr4(i64 %a) {78; CHECK-LABEL: and0xf30_lshr4:79; CHECK: # %bb.0:80; CHECK-NEXT: andi $a0, $a0, 388881; CHECK-NEXT: srli.d $a0, $a0, 482; CHECK-NEXT: ret83 %and = and i64 %a, 388884 %shr = lshr i64 %and, 485 ret i64 %shr86}87 88;; Negative test: Shamt < MaskIdx89define i64 @and0xff0_lshr3(i64 %a) {90; CHECK-LABEL: and0xff0_lshr3:91; CHECK: # %bb.0:92; CHECK-NEXT: andi $a0, $a0, 408093; CHECK-NEXT: srli.d $a0, $a0, 394; CHECK-NEXT: ret95 %and = and i64 %a, 408096 %shr = lshr i64 %and, 397 ret i64 %shr98}99