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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc --mtriple=loongarch32 -mattr=+32s,+d < %s | FileCheck %s3 4define i32 @lshr10_and255(i32 %a) {5; CHECK-LABEL: lshr10_and255:6; CHECK: # %bb.0:7; CHECK-NEXT: bstrpick.w $a0, $a0, 17, 108; CHECK-NEXT: ret9 %shr = lshr i32 %a, 1010 %and = and i32 %shr, 25511 ret i32 %and12}13 14define i32 @ashr20_and511(i32 %a) {15; CHECK-LABEL: ashr20_and511:16; CHECK: # %bb.0:17; CHECK-NEXT: bstrpick.w $a0, $a0, 28, 2018; CHECK-NEXT: ret19 %shr = ashr i32 %a, 2020 %and = and i32 %shr, 51121 ret i32 %and22}23 24define i32 @zext_i16_to_i32(i16 %a) {25; CHECK-LABEL: zext_i16_to_i32:26; CHECK: # %bb.0:27; CHECK-NEXT: bstrpick.w $a0, $a0, 15, 028; CHECK-NEXT: ret29 %res = zext i16 %a to i3230 ret i32 %res31}32 33define i32 @and8191(i32 %a) {34; CHECK-LABEL: and8191:35; CHECK: # %bb.0:36; CHECK-NEXT: bstrpick.w $a0, $a0, 12, 037; CHECK-NEXT: ret38 %and = and i32 %a, 819139 ret i32 %and40}41 42;; Check that andi but not bstrpick.d is generated.43define i32 @and4095(i32 %a) {44; CHECK-LABEL: and4095:45; CHECK: # %bb.0:46; CHECK-NEXT: andi $a0, $a0, 409547; CHECK-NEXT: ret48 %and = and i32 %a, 409549 ret i32 %and50}51 52;; (srl (and a, 0xff0), 4) => (BSTRPICK a, 11, 4)53define i32 @and0xff0_lshr4(i32 %a) {54; CHECK-LABEL: and0xff0_lshr4:55; CHECK: # %bb.0:56; CHECK-NEXT: bstrpick.w $a0, $a0, 11, 457; CHECK-NEXT: ret58 %and = and i32 %a, 408059 %shr = lshr i32 %and, 460 ret i32 %shr61}62 63;; (sra (and a, 0xff0), 5) can also be combined to (BSTRPICK a, 11, 5).64;; This is because (sra (and a, 0xff0)) would be combined to (srl (and a, 0xff0), 5)65;; firstly by DAGCombiner::SimplifyDemandedBits.66define i32 @and4080_ashr5(i32 %a) {67; CHECK-LABEL: and4080_ashr5:68; CHECK: # %bb.0:69; CHECK-NEXT: bstrpick.w $a0, $a0, 11, 570; CHECK-NEXT: ret71 %and = and i32 %a, 408072 %shr = ashr i32 %and, 573 ret i32 %shr74}75 76;; Negative test: the second operand of AND is not a shifted mask77define i32 @and0xf30_lshr4(i32 %a) {78; CHECK-LABEL: and0xf30_lshr4:79; CHECK: # %bb.0:80; CHECK-NEXT: andi $a0, $a0, 388881; CHECK-NEXT: srli.w $a0, $a0, 482; CHECK-NEXT: ret83 %and = and i32 %a, 388884 %shr = lshr i32 %and, 485 ret i32 %shr86}87 88;; Negative test: Shamt < MaskIdx89define i32 @and0xff0_lshr3(i32 %a) {90; CHECK-LABEL: and0xff0_lshr3:91; CHECK: # %bb.0:92; CHECK-NEXT: andi $a0, $a0, 408093; CHECK-NEXT: srli.w $a0, $a0, 394; CHECK-NEXT: ret95 %and = and i32 %a, 408096 %shr = lshr i32 %and, 397 ret i32 %shr98}99