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1; RUN: llc --mtriple=loongarch32 --mattr=+f --verify-machineinstrs < %s | FileCheck %s2; RUN: llc --mtriple=loongarch64 --mattr=+f --verify-machineinstrs < %s | FileCheck %s3 4declare i32 @llvm.loongarch.csrxchg.w(i32, i32, i32 immarg)5 6;; Check that the rj operand of csrxchg is not R0.7define void @csrxchg_w_rj_not_r0(i32 signext %a) {8; CHECK-NOT: csrxchg ${{[a-z]*}}, $r0, 09; CHECK-NOT: csrxchg ${{[a-z]*}}, $zero, 010entry:11 %0 = tail call i32 @llvm.loongarch.csrxchg.w(i32 %a, i32 0, i32 0)12 ret void13}14 15;; Check that the rj operand of csrxchg is not R1.16define i32 @csrxchg_w_rj_not_r1(i32 %0) {17; CHECK-NOT: csrxchg ${{[a-z]*}}, $r1, 018; CHECK-NOT: csrxchg ${{[a-z]*}}, $ra, 019entry:20 %2 = tail call i32 asm "", "={$r1},{$r1}"(i32 0)21 %3 = tail call i32 @llvm.loongarch.csrxchg.w(i32 %0, i32 %2, i32 0)22 ret i32 %323}24