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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc --mtriple=loongarch32 --mattr=+d --target-abi=ilp32d --verify-machineinstrs < %s \3; RUN: | FileCheck --check-prefix=LA32 %s4; RUN: llc --mtriple=loongarch64 --mattr=+d --target-abi=lp64d --verify-machineinstrs < %s \5; RUN: | FileCheck --check-prefix=LA64 %s6 7;; Check that callee-saved registers clobbered by inlineasm are correctly saved.8;;9;; $r23: $s0 (callee-saved register under all ABIs)10;; $r24: $s1 (callee-saved register under all ABIs)11;; $f24: $fs0 (callee-saved register under *d/*f ABIs)12;; $f25: $fs1 (callee-saved register under *d/*f ABIs)13 14;; TODO: test other ABIs.15 16define void @test() nounwind {17; LA32-LABEL: test:18; LA32: # %bb.0:19; LA32-NEXT: addi.w $sp, $sp, -3220; LA32-NEXT: st.w $s0, $sp, 28 # 4-byte Folded Spill21; LA32-NEXT: st.w $s1, $sp, 24 # 4-byte Folded Spill22; LA32-NEXT: fst.d $fs0, $sp, 16 # 8-byte Folded Spill23; LA32-NEXT: fst.d $fs1, $sp, 8 # 8-byte Folded Spill24; LA32-NEXT: #APP25; LA32-NEXT: #NO_APP26; LA32-NEXT: fld.d $fs1, $sp, 8 # 8-byte Folded Reload27; LA32-NEXT: fld.d $fs0, $sp, 16 # 8-byte Folded Reload28; LA32-NEXT: ld.w $s1, $sp, 24 # 4-byte Folded Reload29; LA32-NEXT: ld.w $s0, $sp, 28 # 4-byte Folded Reload30; LA32-NEXT: addi.w $sp, $sp, 3231; LA32-NEXT: ret32;33; LA64-LABEL: test:34; LA64: # %bb.0:35; LA64-NEXT: addi.d $sp, $sp, -3236; LA64-NEXT: st.d $s0, $sp, 24 # 8-byte Folded Spill37; LA64-NEXT: st.d $s1, $sp, 16 # 8-byte Folded Spill38; LA64-NEXT: fst.d $fs0, $sp, 8 # 8-byte Folded Spill39; LA64-NEXT: fst.d $fs1, $sp, 0 # 8-byte Folded Spill40; LA64-NEXT: #APP41; LA64-NEXT: #NO_APP42; LA64-NEXT: fld.d $fs1, $sp, 0 # 8-byte Folded Reload43; LA64-NEXT: fld.d $fs0, $sp, 8 # 8-byte Folded Reload44; LA64-NEXT: ld.d $s1, $sp, 16 # 8-byte Folded Reload45; LA64-NEXT: ld.d $s0, $sp, 24 # 8-byte Folded Reload46; LA64-NEXT: addi.d $sp, $sp, 3247; LA64-NEXT: ret48 tail call void asm sideeffect "", "~{$f24},~{$f25},~{$r23},~{$r24}"()49 ret void50}51