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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc --mtriple=loongarch32 --mattr=+f,+d --target-abi=ilp32d --verify-machineinstrs < %s \3; RUN: | FileCheck --check-prefix=LA32 %s4; RUN: llc --mtriple=loongarch64 --mattr=+f,+d --target-abi=lp64d --verify-machineinstrs < %s \5; RUN: | FileCheck --check-prefix=LA64 %s6 7;; These test that we can use architectural names ($f[0-9]*) refer to registers in8;; inline asm constraint lists. In each case, the named register should be used9;; for the source register of the `fabs.d`. It is very likely that `$fa0` will10;; be chosen as the designation register, but this is left to the compiler to11;; choose.12;;13;; Parenthesised registers in comments are the other aliases for this register.14 15define double @register_f0(double %a) nounwind {16; LA32-LABEL: register_f0:17; LA32: # %bb.0:18; LA32-NEXT: #APP19; LA32-NEXT: fabs.d $fa0, $fa020; LA32-NEXT: #NO_APP21; LA32-NEXT: ret22;23; LA64-LABEL: register_f0:24; LA64: # %bb.0:25; LA64-NEXT: #APP26; LA64-NEXT: fabs.d $fa0, $fa027; LA64-NEXT: #NO_APP28; LA64-NEXT: ret29 %1 = tail call double asm "fabs.d $0, $1", "=f,{$f0}"(double %a)30 ret double %131}32 33;; NOTE: This test uses `$f24` (`$fs0`) as an input, so it should be saved.34define double @register_f24(double %a) nounwind {35; LA32-LABEL: register_f24:36; LA32: # %bb.0:37; LA32-NEXT: addi.w $sp, $sp, -1638; LA32-NEXT: fst.d $fs0, $sp, 8 # 8-byte Folded Spill39; LA32-NEXT: fmov.d $fs0, $fa040; LA32-NEXT: #APP41; LA32-NEXT: fabs.d $fa0, $fs042; LA32-NEXT: #NO_APP43; LA32-NEXT: fld.d $fs0, $sp, 8 # 8-byte Folded Reload44; LA32-NEXT: addi.w $sp, $sp, 1645; LA32-NEXT: ret46;47; LA64-LABEL: register_f24:48; LA64: # %bb.0:49; LA64-NEXT: addi.d $sp, $sp, -1650; LA64-NEXT: fst.d $fs0, $sp, 8 # 8-byte Folded Spill51; LA64-NEXT: fmov.d $fs0, $fa052; LA64-NEXT: #APP53; LA64-NEXT: fabs.d $fa0, $fs054; LA64-NEXT: #NO_APP55; LA64-NEXT: fld.d $fs0, $sp, 8 # 8-byte Folded Reload56; LA64-NEXT: addi.d $sp, $sp, 1657; LA64-NEXT: ret58 %1 = tail call double asm "fabs.d $0, $1", "=f,{$f24}"(double %a)59 ret double %160}61 62;; NOTE: This test uses `$f31` (`$fs7`) as an input, so it should be saved.63define double @register_f31(double %a) nounwind {64; LA32-LABEL: register_f31:65; LA32: # %bb.0:66; LA32-NEXT: addi.w $sp, $sp, -1667; LA32-NEXT: fst.d $fs7, $sp, 8 # 8-byte Folded Spill68; LA32-NEXT: fmov.d $fs7, $fa069; LA32-NEXT: #APP70; LA32-NEXT: fabs.d $fa0, $fs771; LA32-NEXT: #NO_APP72; LA32-NEXT: fld.d $fs7, $sp, 8 # 8-byte Folded Reload73; LA32-NEXT: addi.w $sp, $sp, 1674; LA32-NEXT: ret75;76; LA64-LABEL: register_f31:77; LA64: # %bb.0:78; LA64-NEXT: addi.d $sp, $sp, -1679; LA64-NEXT: fst.d $fs7, $sp, 8 # 8-byte Folded Spill80; LA64-NEXT: fmov.d $fs7, $fa081; LA64-NEXT: #APP82; LA64-NEXT: fabs.d $fa0, $fs783; LA64-NEXT: #NO_APP84; LA64-NEXT: fld.d $fs7, $sp, 8 # 8-byte Folded Reload85; LA64-NEXT: addi.d $sp, $sp, 1686; LA64-NEXT: ret87 %1 = tail call double asm "fabs.d $0, $1", "=f,{$f31}"(double %a)88 ret double %189}90