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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc --mtriple=loongarch32 -mattr=+d --verify-machineinstrs < %s \3; RUN: | FileCheck --check-prefix=LA32 %s4; RUN: llc --mtriple=loongarch64 -mattr=+d --verify-machineinstrs < %s \5; RUN: | FileCheck --check-prefix=LA64 %s6 7;; These test that we can use architectural names ($r*) refer to registers in8;; inline asm constraint lists. In each case, the named register should be used9;; for the source register of the `addi.w`. It is very likely that `$a0` will10;; be chosen as the designation register, but this is left to the compiler to11;; choose.12;;13;; Parenthesised registers in comments are the other aliases for this register.14 15;; NOTE: This test has to pass in 0 to the inline asm, because that's the only16;; value `$r0` (`$zero`) can take.17define i32 @register_r0() nounwind {18; LA32-LABEL: register_r0:19; LA32: # %bb.0:20; LA32-NEXT: #APP21; LA32-NEXT: addi.w $a0, $zero, 022; LA32-NEXT: #NO_APP23; LA32-NEXT: ret24;25; LA64-LABEL: register_r0:26; LA64: # %bb.0:27; LA64-NEXT: #APP28; LA64-NEXT: addi.w $a0, $zero, 029; LA64-NEXT: #NO_APP30; LA64-NEXT: ret31 %1 = tail call i32 asm "addi.w $0, $1, 0", "=r,{$r0}"(i32 0)32 ret i32 %133}34 35define i32 @register_r4(i32 %a) nounwind {36; LA32-LABEL: register_r4:37; LA32: # %bb.0:38; LA32-NEXT: #APP39; LA32-NEXT: addi.w $a0, $a0, 140; LA32-NEXT: #NO_APP41; LA32-NEXT: ret42;43; LA64-LABEL: register_r4:44; LA64: # %bb.0:45; LA64-NEXT: #APP46; LA64-NEXT: addi.w $a0, $a0, 147; LA64-NEXT: #NO_APP48; LA64-NEXT: ret49 %1 = tail call i32 asm "addi.w $0, $1, 1", "=r,{$r4}"(i32 %a)50 ret i32 %151}52 53;; NOTE: This test uses `$r22` (`$s9`, `$fp`) as an input, so it should be saved.54define i32 @register_r22(i32 %a) nounwind {55; LA32-LABEL: register_r22:56; LA32: # %bb.0:57; LA32-NEXT: addi.w $sp, $sp, -1658; LA32-NEXT: st.w $fp, $sp, 12 # 4-byte Folded Spill59; LA32-NEXT: move $fp, $a060; LA32-NEXT: #APP61; LA32-NEXT: addi.w $a0, $fp, 162; LA32-NEXT: #NO_APP63; LA32-NEXT: ld.w $fp, $sp, 12 # 4-byte Folded Reload64; LA32-NEXT: addi.w $sp, $sp, 1665; LA32-NEXT: ret66;67; LA64-LABEL: register_r22:68; LA64: # %bb.0:69; LA64-NEXT: addi.d $sp, $sp, -1670; LA64-NEXT: st.d $fp, $sp, 8 # 8-byte Folded Spill71; LA64-NEXT: move $fp, $a072; LA64-NEXT: #APP73; LA64-NEXT: addi.w $a0, $fp, 174; LA64-NEXT: #NO_APP75; LA64-NEXT: ld.d $fp, $sp, 8 # 8-byte Folded Reload76; LA64-NEXT: addi.d $sp, $sp, 1677; LA64-NEXT: ret78 %1 = tail call i32 asm "addi.w $0, $1, 1", "=r,{$r22}"(i32 %a)79 ret i32 %180}81 82;; NOTE: This test uses `$r31` (`$s8`) as an input, so it should be saved.83define i32 @register_r31(i32 %a) nounwind {84; LA32-LABEL: register_r31:85; LA32: # %bb.0:86; LA32-NEXT: addi.w $sp, $sp, -1687; LA32-NEXT: st.w $s8, $sp, 12 # 4-byte Folded Spill88; LA32-NEXT: move $s8, $a089; LA32-NEXT: #APP90; LA32-NEXT: addi.w $a0, $s8, 191; LA32-NEXT: #NO_APP92; LA32-NEXT: ld.w $s8, $sp, 12 # 4-byte Folded Reload93; LA32-NEXT: addi.w $sp, $sp, 1694; LA32-NEXT: ret95;96; LA64-LABEL: register_r31:97; LA64: # %bb.0:98; LA64-NEXT: addi.d $sp, $sp, -1699; LA64-NEXT: st.d $s8, $sp, 8 # 8-byte Folded Spill100; LA64-NEXT: move $s8, $a0101; LA64-NEXT: #APP102; LA64-NEXT: addi.w $a0, $s8, 1103; LA64-NEXT: #NO_APP104; LA64-NEXT: ld.d $s8, $sp, 8 # 8-byte Folded Reload105; LA64-NEXT: addi.d $sp, $sp, 16106; LA64-NEXT: ret107 %1 = tail call i32 asm "addi.w $0, $1, 1", "=r,{$r31}"(i32 %a)108 ret i32 %1109}110