98 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc --mtriple=loongarch64 -mattr=+d,-div32 < %s | FileCheck %s --check-prefix=LA643; RUN: llc --mtriple=loongarch64 -mattr=+d,+div32 < %s | FileCheck %s --check-prefix=LA64-DIV324 5define i32 @divw(i64 %a, i64 %b) {6; LA64-LABEL: divw:7; LA64: # %bb.0:8; LA64-NEXT: addi.w $a1, $a1, 09; LA64-NEXT: addi.w $a0, $a0, 010; LA64-NEXT: div.w $a0, $a0, $a111; LA64-NEXT: ret12;13; LA64-DIV32-LABEL: divw:14; LA64-DIV32: # %bb.0:15; LA64-DIV32-NEXT: div.w $a0, $a0, $a116; LA64-DIV32-NEXT: ret17 %conv1 = trunc i64 %a to i3218 %conv2 = trunc i64 %b to i3219 %r = sdiv i32 %conv1, %conv220 ret i32 %r21}22 23define i32 @divwu(i64 %a, i64 %b) {24; LA64-LABEL: divwu:25; LA64: # %bb.0:26; LA64-NEXT: addi.w $a1, $a1, 027; LA64-NEXT: addi.w $a0, $a0, 028; LA64-NEXT: div.wu $a0, $a0, $a129; LA64-NEXT: ret30;31; LA64-DIV32-LABEL: divwu:32; LA64-DIV32: # %bb.0:33; LA64-DIV32-NEXT: div.wu $a0, $a0, $a134; LA64-DIV32-NEXT: ret35 %conv1 = trunc i64 %a to i3236 %conv2 = trunc i64 %b to i3237 %r = udiv i32 %conv1, %conv238 ret i32 %r39}40 41define i32 @modw(i64 %a, i64 %b) {42; LA64-LABEL: modw:43; LA64: # %bb.0:44; LA64-NEXT: addi.w $a1, $a1, 045; LA64-NEXT: addi.w $a0, $a0, 046; LA64-NEXT: mod.w $a0, $a0, $a147; LA64-NEXT: ret48;49; LA64-DIV32-LABEL: modw:50; LA64-DIV32: # %bb.0:51; LA64-DIV32-NEXT: mod.w $a0, $a0, $a152; LA64-DIV32-NEXT: ret53 %conv1 = trunc i64 %a to i3254 %conv2 = trunc i64 %b to i3255 %r = srem i32 %conv1, %conv256 ret i32 %r57}58 59define i32 @modwu(i64 %a, i64 %b) {60; LA64-LABEL: modwu:61; LA64: # %bb.0:62; LA64-NEXT: addi.w $a1, $a1, 063; LA64-NEXT: addi.w $a0, $a0, 064; LA64-NEXT: mod.wu $a0, $a0, $a165; LA64-NEXT: ret66;67; LA64-DIV32-LABEL: modwu:68; LA64-DIV32: # %bb.0:69; LA64-DIV32-NEXT: mod.wu $a0, $a0, $a170; LA64-DIV32-NEXT: ret71 %conv1 = trunc i64 %a to i3272 %conv2 = trunc i64 %b to i3273 %r = urem i32 %conv1, %conv274 ret i32 %r75}76 77define signext i32 @sextw_rmv(i32 signext %a, i32 signext %b, i32 signext %c) {78; LA64-LABEL: sextw_rmv:79; LA64: # %bb.0: # %entry80; LA64-NEXT: mul.w $a0, $a1, $a081; LA64-NEXT: div.w $a1, $a2, $a082; LA64-NEXT: sltu $a0, $a1, $a083; LA64-NEXT: ret84;85; LA64-DIV32-LABEL: sextw_rmv:86; LA64-DIV32: # %bb.0: # %entry87; LA64-DIV32-NEXT: mul.w $a0, $a1, $a088; LA64-DIV32-NEXT: div.w $a1, $a2, $a089; LA64-DIV32-NEXT: sltu $a0, $a1, $a090; LA64-DIV32-NEXT: ret91entry:92 %mul = mul nsw i32 %b, %a93 %div = sdiv i32 %c, %mul94 %cmp = icmp ult i32 %div, %mul95 %conv = zext i1 %cmp to i3296 ret i32 %conv97}98