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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 32; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA323; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA644 5define void @buildvector_v32i8_splat(ptr %dst, i8 %a0) nounwind {6; CHECK-LABEL: buildvector_v32i8_splat:7; CHECK: # %bb.0: # %entry8; CHECK-NEXT: xvreplgr2vr.b $xr0, $a19; CHECK-NEXT: xvst $xr0, $a0, 010; CHECK-NEXT: ret11entry:12 %insert = insertelement <32 x i8> undef, i8 %a0, i8 013 %splat = shufflevector <32 x i8> %insert, <32 x i8> undef, <32 x i32> zeroinitializer14 store <32 x i8> %splat, ptr %dst15 ret void16}17 18define void @buildvector_v16i16_splat(ptr %dst, i16 %a0) nounwind {19; CHECK-LABEL: buildvector_v16i16_splat:20; CHECK: # %bb.0: # %entry21; CHECK-NEXT: xvreplgr2vr.h $xr0, $a122; CHECK-NEXT: xvst $xr0, $a0, 023; CHECK-NEXT: ret24entry:25 %insert = insertelement <16 x i16> undef, i16 %a0, i8 026 %splat = shufflevector <16 x i16> %insert, <16 x i16> undef, <16 x i32> zeroinitializer27 store <16 x i16> %splat, ptr %dst28 ret void29}30 31define void @buildvector_v8i32_splat(ptr %dst, i32 %a0) nounwind {32; CHECK-LABEL: buildvector_v8i32_splat:33; CHECK: # %bb.0: # %entry34; CHECK-NEXT: xvreplgr2vr.w $xr0, $a135; CHECK-NEXT: xvst $xr0, $a0, 036; CHECK-NEXT: ret37entry:38 %insert = insertelement <8 x i32> undef, i32 %a0, i8 039 %splat = shufflevector <8 x i32> %insert, <8 x i32> undef, <8 x i32> zeroinitializer40 store <8 x i32> %splat, ptr %dst41 ret void42}43 44define void @buildvector_v4i64_splat(ptr %dst, i64 %a0) nounwind {45; LA32-LABEL: buildvector_v4i64_splat:46; LA32: # %bb.0: # %entry47; LA32-NEXT: vinsgr2vr.w $vr0, $a1, 048; LA32-NEXT: vinsgr2vr.w $vr0, $a2, 149; LA32-NEXT: xvreplve0.d $xr0, $xr050; LA32-NEXT: xvst $xr0, $a0, 051; LA32-NEXT: ret52;53; LA64-LABEL: buildvector_v4i64_splat:54; LA64: # %bb.0: # %entry55; LA64-NEXT: xvreplgr2vr.d $xr0, $a156; LA64-NEXT: xvst $xr0, $a0, 057; LA64-NEXT: ret58entry:59 %insert = insertelement <4 x i64> undef, i64 %a0, i8 060 %splat = shufflevector <4 x i64> %insert, <4 x i64> undef, <4 x i32> zeroinitializer61 store <4 x i64> %splat, ptr %dst62 ret void63}64 65define void @buildvector_v8f32_splat(ptr %dst, float %a0) nounwind {66; CHECK-LABEL: buildvector_v8f32_splat:67; CHECK: # %bb.0: # %entry68; CHECK-NEXT: # kill: def $f0 killed $f0 def $xr069; CHECK-NEXT: xvreplve0.w $xr0, $xr070; CHECK-NEXT: xvst $xr0, $a0, 071; CHECK-NEXT: ret72entry:73 %insert = insertelement <8 x float> undef, float %a0, i8 074 %splat = shufflevector <8 x float> %insert, <8 x float> undef, <8 x i32> zeroinitializer75 store <8 x float> %splat, ptr %dst76 ret void77}78 79define void @buildvector_v4f64_splat(ptr %dst, double %a0) nounwind {80; CHECK-LABEL: buildvector_v4f64_splat:81; CHECK: # %bb.0: # %entry82; CHECK-NEXT: # kill: def $f0_64 killed $f0_64 def $xr083; CHECK-NEXT: xvreplve0.d $xr0, $xr084; CHECK-NEXT: xvst $xr0, $a0, 085; CHECK-NEXT: ret86entry:87 %insert = insertelement <4 x double> undef, double %a0, i8 088 %splat = shufflevector <4 x double> %insert, <4 x double> undef, <4 x i32> zeroinitializer89 store <4 x double> %splat, ptr %dst90 ret void91}92 93define void @buildvector_v32i8_const_splat(ptr %dst) nounwind {94; CHECK-LABEL: buildvector_v32i8_const_splat:95; CHECK: # %bb.0: # %entry96; CHECK-NEXT: xvrepli.b $xr0, 197; CHECK-NEXT: xvst $xr0, $a0, 098; CHECK-NEXT: ret99entry:100 store <32 x i8> <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>, ptr %dst101 ret void102}103 104define void @buildvector_v32i8_const_splat_v4i64(ptr %dst) nounwind {105; LA32-LABEL: buildvector_v32i8_const_splat_v4i64:106; LA32: # %bb.0: # %entry107; LA32-NEXT: pcalau12i $a1, %pc_hi20(.LCPI7_0)108; LA32-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI7_0)109; LA32-NEXT: xvst $xr0, $a0, 0110; LA32-NEXT: ret111;112; LA64-LABEL: buildvector_v32i8_const_splat_v4i64:113; LA64: # %bb.0: # %entry114; LA64-NEXT: lu12i.w $a1, 7115; LA64-NEXT: ori $a1, $a1, 3453116; LA64-NEXT: xvreplgr2vr.d $xr0, $a1117; LA64-NEXT: xvst $xr0, $a0, 0118; LA64-NEXT: ret119entry:120 store <32 x i8> <i8 125, i8 125, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 125, i8 125, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 125, i8 125, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 125, i8 125, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0>, ptr %dst121 ret void122}123 124define void @buildvector_v16i16_const_splat(ptr %dst) nounwind {125; CHECK-LABEL: buildvector_v16i16_const_splat:126; CHECK: # %bb.0: # %entry127; CHECK-NEXT: xvrepli.h $xr0, 1128; CHECK-NEXT: xvst $xr0, $a0, 0129; CHECK-NEXT: ret130entry:131 store <16 x i16> <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>, ptr %dst132 ret void133}134 135define void @buildvector_v16i16_const_splat_v4i64(ptr %dst) nounwind {136; LA32-LABEL: buildvector_v16i16_const_splat_v4i64:137; LA32: # %bb.0: # %entry138; LA32-NEXT: pcalau12i $a1, %pc_hi20(.LCPI9_0)139; LA32-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI9_0)140; LA32-NEXT: xvst $xr0, $a0, 0141; LA32-NEXT: ret142;143; LA64-LABEL: buildvector_v16i16_const_splat_v4i64:144; LA64: # %bb.0: # %entry145; LA64-NEXT: ori $a1, $zero, 512146; LA64-NEXT: xvreplgr2vr.d $xr0, $a1147; LA64-NEXT: xvst $xr0, $a0, 0148; LA64-NEXT: ret149entry:150 store <16 x i16> <i16 512, i16 0, i16 0, i16 0, i16 512, i16 0, i16 0, i16 0, i16 512, i16 0, i16 0, i16 0, i16 512, i16 0, i16 0, i16 0>, ptr %dst151 ret void152}153 154define void @buildvector_v8i32_const_splat(ptr %dst) nounwind {155; CHECK-LABEL: buildvector_v8i32_const_splat:156; CHECK: # %bb.0: # %entry157; CHECK-NEXT: xvrepli.w $xr0, 1158; CHECK-NEXT: xvst $xr0, $a0, 0159; CHECK-NEXT: ret160entry:161 store <8 x i32> <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>, ptr %dst162 ret void163}164 165define void @buildvector_v8i32_const_splat_v4i64(ptr %dst) nounwind {166; LA32-LABEL: buildvector_v8i32_const_splat_v4i64:167; LA32: # %bb.0: # %entry168; LA32-NEXT: pcalau12i $a1, %pc_hi20(.LCPI11_0)169; LA32-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI11_0)170; LA32-NEXT: xvst $xr0, $a0, 0171; LA32-NEXT: ret172;173; LA64-LABEL: buildvector_v8i32_const_splat_v4i64:174; LA64: # %bb.0: # %entry175; LA64-NEXT: ori $a1, $zero, 512176; LA64-NEXT: xvreplgr2vr.d $xr0, $a1177; LA64-NEXT: xvst $xr0, $a0, 0178; LA64-NEXT: ret179entry:180 store <8 x i32> <i32 512, i32 0, i32 512, i32 0, i32 512, i32 0, i32 512, i32 0>, ptr %dst181 ret void182}183 184define void @buildvector_v4i64_const_splat(ptr %dst) nounwind {185; CHECK-LABEL: buildvector_v4i64_const_splat:186; CHECK: # %bb.0: # %entry187; CHECK-NEXT: xvrepli.d $xr0, 1188; CHECK-NEXT: xvst $xr0, $a0, 0189; CHECK-NEXT: ret190entry:191 store <4 x i64> <i64 1, i64 1, i64 1, i64 1>, ptr %dst192 ret void193}194 195;; Also check buildvector_const_splat_xvldi_1010.196define void @buildvector_v8f32_const_splat(ptr %dst) nounwind {197; CHECK-LABEL: buildvector_v8f32_const_splat:198; CHECK: # %bb.0: # %entry199; CHECK-NEXT: xvldi $xr0, -1424200; CHECK-NEXT: xvst $xr0, $a0, 0201; CHECK-NEXT: ret202entry:203 store <8 x float> <float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0, float 1.0>, ptr %dst204 ret void205}206 207;; Also check buildvector_const_splat_xvldi_1100.208define void @buildvector_v4f64_const_splat(ptr %dst) nounwind {209; CHECK-LABEL: buildvector_v4f64_const_splat:210; CHECK: # %bb.0: # %entry211; CHECK-NEXT: xvldi $xr0, -912212; CHECK-NEXT: xvst $xr0, $a0, 0213; CHECK-NEXT: ret214entry:215 store <4 x double> <double 1.0, double 1.0, double 1.0, double 1.0>, ptr %dst216 ret void217}218 219;; imm[11:8] == 4'b0000/4'b0100/4'b1000 can be represented using xvrepli.[whb].220define void @buildvector_const_splat_xvldi_0001(ptr %dst) nounwind {221; CHECK-LABEL: buildvector_const_splat_xvldi_0001:222; CHECK: # %bb.0: # %entry223; CHECK-NEXT: xvldi $xr0, -3837224; CHECK-NEXT: xvst $xr0, $a0, 0225; CHECK-NEXT: ret226entry:227 store <8 x i32> <i32 768, i32 768, i32 768, i32 768, i32 768, i32 768, i32 768, i32 768>, ptr %dst228 ret void229}230 231define void @buildvector_const_splat_xvldi_0010(ptr %dst) nounwind {232; CHECK-LABEL: buildvector_const_splat_xvldi_0010:233; CHECK: # %bb.0: # %entry234; CHECK-NEXT: xvldi $xr0, -3583235; CHECK-NEXT: xvst $xr0, $a0, 0236; CHECK-NEXT: ret237entry:238 store <8 x i32> <i32 65536, i32 65536, i32 65536, i32 65536, i32 65536, i32 65536, i32 65536, i32 65536>, ptr %dst239 ret void240}241 242define void @buildvector_const_splat_xvldi_0011(ptr %dst) nounwind {243; CHECK-LABEL: buildvector_const_splat_xvldi_0011:244; CHECK: # %bb.0: # %entry245; CHECK-NEXT: xvldi $xr0, -3327246; CHECK-NEXT: xvst $xr0, $a0, 0247; CHECK-NEXT: ret248entry:249 store <8 x i32> <i32 16777216, i32 16777216, i32 16777216, i32 16777216, i32 16777216, i32 16777216, i32 16777216, i32 16777216>, ptr %dst250 ret void251}252 253define void @buildvector_const_splat_xvldi_0101(ptr %dst) {254; CHECK-LABEL: buildvector_const_splat_xvldi_0101:255; CHECK: # %bb.0: # %entry256; CHECK-NEXT: xvldi $xr0, -2813257; CHECK-NEXT: xvst $xr0, $a0, 0258; CHECK-NEXT: ret259entry:260 store <16 x i16> <i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768, i16 768>, ptr %dst261 ret void262}263 264define void @buildvector_const_splat_xvldi_0110(ptr %dst) nounwind {265; CHECK-LABEL: buildvector_const_splat_xvldi_0110:266; CHECK: # %bb.0: # %entry267; CHECK-NEXT: xvldi $xr0, -2557268; CHECK-NEXT: xvst $xr0, $a0, 0269; CHECK-NEXT: ret270entry:271 store <8 x i32> <i32 1023, i32 1023, i32 1023, i32 1023, i32 1023, i32 1023, i32 1023, i32 1023>, ptr %dst272 ret void273}274 275define void @buildvector_const_splat_xvldi_0111(ptr %dst) nounwind {276; CHECK-LABEL: buildvector_const_splat_xvldi_0111:277; CHECK: # %bb.0: # %entry278; CHECK-NEXT: xvldi $xr0, -2305279; CHECK-NEXT: xvst $xr0, $a0, 0280; CHECK-NEXT: ret281entry:282 store <8 x i32> <i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535, i32 65535>, ptr %dst283 ret void284}285 286define void @buildvector_const_splat_xvldi_1001(ptr %dst) nounwind {287; CHECK-LABEL: buildvector_const_splat_xvldi_1001:288; CHECK: # %bb.0: # %entry289; CHECK-NEXT: xvldi $xr0, -1789290; CHECK-NEXT: xvst $xr0, $a0, 0291; CHECK-NEXT: ret292entry:293 store <8 x i32> <i32 65535, i32 0, i32 65535, i32 0, i32 65535, i32 0, i32 65535, i32 0>, ptr %dst294 ret void295}296 297define void @buildvector_const_splat_xvldi_1011(ptr %dst) nounwind {298; CHECK-LABEL: buildvector_const_splat_xvldi_1011:299; CHECK: # %bb.0: # %entry300; CHECK-NEXT: xvldi $xr0, -1280301; CHECK-NEXT: xvst $xr0, $a0, 0302; CHECK-NEXT: ret303entry:304 store <8 x float> <float 2.0, float 0.0, float 2.0, float 0.0, float 2.0, float 0.0, float 2.0, float 0.0>, ptr %dst305 ret void306}307 308define void @buildvector_v32i8_const(ptr %dst) nounwind {309; CHECK-LABEL: buildvector_v32i8_const:310; CHECK: # %bb.0: # %entry311; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI23_0)312; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI23_0)313; CHECK-NEXT: xvst $xr0, $a0, 0314; CHECK-NEXT: ret315entry:316 store <32 x i8> <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8, i8 9, i8 10, i8 11, i8 12, i8 13, i8 14, i8 15, i8 16, i8 17, i8 18, i8 19, i8 20, i8 21, i8 22, i8 23, i8 24, i8 25, i8 26, i8 27, i8 28, i8 29, i8 30, i8 31>, ptr %dst317 ret void318}319 320define void @buildvector_v16i16_const(ptr %dst) nounwind {321; CHECK-LABEL: buildvector_v16i16_const:322; CHECK: # %bb.0: # %entry323; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI24_0)324; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI24_0)325; CHECK-NEXT: xvst $xr0, $a0, 0326; CHECK-NEXT: ret327entry:328 store <16 x i16> <i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>, ptr %dst329 ret void330}331 332define void @buildvector_v8i32_const(ptr %dst) nounwind {333; CHECK-LABEL: buildvector_v8i32_const:334; CHECK: # %bb.0: # %entry335; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI25_0)336; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI25_0)337; CHECK-NEXT: xvst $xr0, $a0, 0338; CHECK-NEXT: ret339entry:340 store <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>, ptr %dst341 ret void342}343 344define void @buildvector_v4i64_const(ptr %dst) nounwind {345; CHECK-LABEL: buildvector_v4i64_const:346; CHECK: # %bb.0: # %entry347; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI26_0)348; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI26_0)349; CHECK-NEXT: xvst $xr0, $a0, 0350; CHECK-NEXT: ret351entry:352 store <4 x i64> <i64 0, i64 1, i64 2, i64 3>, ptr %dst353 ret void354}355 356define void @buildvector_v2f32_const(ptr %dst) nounwind {357; CHECK-LABEL: buildvector_v2f32_const:358; CHECK: # %bb.0: # %entry359; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI27_0)360; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI27_0)361; CHECK-NEXT: xvst $xr0, $a0, 0362; CHECK-NEXT: ret363entry:364 store <8 x float> <float 0.0, float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0>, ptr %dst365 ret void366}367 368define void @buildvector_v4f64_const(ptr %dst) nounwind {369; CHECK-LABEL: buildvector_v4f64_const:370; CHECK: # %bb.0: # %entry371; CHECK-NEXT: pcalau12i $a1, %pc_hi20(.LCPI28_0)372; CHECK-NEXT: xvld $xr0, $a1, %pc_lo12(.LCPI28_0)373; CHECK-NEXT: xvst $xr0, $a0, 0374; CHECK-NEXT: ret375entry:376 store <4 x double> <double 0.0, double 1.0, double 2.0, double 3.0>, ptr %dst377 ret void378}379 380define void @buildvector_v32i8(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7, i8 %a8, i8 %a9, i8 %a10, i8 %a11, i8 %a12, i8 %a13, i8 %a14, i8 %a15, i8 %a16, i8 %a17, i8 %a18, i8 %a19, i8 %a20, i8 %a21, i8 %a22, i8 %a23, i8 %a24, i8 %a25, i8 %a26, i8 %a27, i8 %a28, i8 %a29, i8 %a30, i8 %a31) nounwind {381; LA32-LABEL: buildvector_v32i8:382; LA32: # %bb.0: # %entry383; LA32-NEXT: ld.b $t0, $sp, 36384; LA32-NEXT: ld.b $t1, $sp, 92385; LA32-NEXT: ld.b $t2, $sp, 40386; LA32-NEXT: ld.b $t3, $sp, 44387; LA32-NEXT: vinsgr2vr.b $vr0, $t0, 0388; LA32-NEXT: ld.b $t0, $sp, 48389; LA32-NEXT: vinsgr2vr.b $vr0, $t2, 1390; LA32-NEXT: ld.b $t2, $sp, 52391; LA32-NEXT: vinsgr2vr.b $vr0, $t3, 2392; LA32-NEXT: ld.b $t3, $sp, 56393; LA32-NEXT: vinsgr2vr.b $vr0, $t0, 3394; LA32-NEXT: ld.b $t0, $sp, 60395; LA32-NEXT: vinsgr2vr.b $vr0, $t2, 4396; LA32-NEXT: ld.b $t2, $sp, 64397; LA32-NEXT: vinsgr2vr.b $vr0, $t3, 5398; LA32-NEXT: ld.b $t3, $sp, 68399; LA32-NEXT: vinsgr2vr.b $vr0, $t0, 6400; LA32-NEXT: ld.b $t0, $sp, 72401; LA32-NEXT: vinsgr2vr.b $vr0, $t2, 7402; LA32-NEXT: ld.b $t2, $sp, 76403; LA32-NEXT: vinsgr2vr.b $vr0, $t3, 8404; LA32-NEXT: ld.b $t3, $sp, 80405; LA32-NEXT: vinsgr2vr.b $vr0, $t0, 9406; LA32-NEXT: ld.b $t0, $sp, 84407; LA32-NEXT: vinsgr2vr.b $vr0, $t2, 10408; LA32-NEXT: ld.b $t2, $sp, 88409; LA32-NEXT: vinsgr2vr.b $vr0, $t3, 11410; LA32-NEXT: ld.b $t3, $sp, 96411; LA32-NEXT: vinsgr2vr.b $vr0, $t0, 12412; LA32-NEXT: vinsgr2vr.b $vr0, $t2, 13413; LA32-NEXT: vinsgr2vr.b $vr0, $t1, 14414; LA32-NEXT: vinsgr2vr.b $vr0, $t3, 15415; LA32-NEXT: vinsgr2vr.b $vr1, $a1, 0416; LA32-NEXT: vinsgr2vr.b $vr1, $a2, 1417; LA32-NEXT: vinsgr2vr.b $vr1, $a3, 2418; LA32-NEXT: vinsgr2vr.b $vr1, $a4, 3419; LA32-NEXT: ld.b $a1, $sp, 28420; LA32-NEXT: vinsgr2vr.b $vr1, $a5, 4421; LA32-NEXT: ld.b $a2, $sp, 0422; LA32-NEXT: vinsgr2vr.b $vr1, $a6, 5423; LA32-NEXT: ld.b $a3, $sp, 4424; LA32-NEXT: vinsgr2vr.b $vr1, $a7, 6425; LA32-NEXT: ld.b $a4, $sp, 8426; LA32-NEXT: vinsgr2vr.b $vr1, $a2, 7427; LA32-NEXT: ld.b $a2, $sp, 12428; LA32-NEXT: vinsgr2vr.b $vr1, $a3, 8429; LA32-NEXT: ld.b $a3, $sp, 16430; LA32-NEXT: vinsgr2vr.b $vr1, $a4, 9431; LA32-NEXT: ld.b $a4, $sp, 20432; LA32-NEXT: vinsgr2vr.b $vr1, $a2, 10433; LA32-NEXT: ld.b $a2, $sp, 24434; LA32-NEXT: vinsgr2vr.b $vr1, $a3, 11435; LA32-NEXT: ld.b $a3, $sp, 32436; LA32-NEXT: vinsgr2vr.b $vr1, $a4, 12437; LA32-NEXT: vinsgr2vr.b $vr1, $a2, 13438; LA32-NEXT: vinsgr2vr.b $vr1, $a1, 14439; LA32-NEXT: vinsgr2vr.b $vr1, $a3, 15440; LA32-NEXT: xvpermi.q $xr1, $xr0, 2441; LA32-NEXT: xvst $xr1, $a0, 0442; LA32-NEXT: ret443;444; LA64-LABEL: buildvector_v32i8:445; LA64: # %bb.0: # %entry446; LA64-NEXT: ld.b $t0, $sp, 72447; LA64-NEXT: ld.b $t1, $sp, 184448; LA64-NEXT: ld.b $t2, $sp, 80449; LA64-NEXT: ld.b $t3, $sp, 88450; LA64-NEXT: vinsgr2vr.b $vr0, $t0, 0451; LA64-NEXT: ld.b $t0, $sp, 96452; LA64-NEXT: vinsgr2vr.b $vr0, $t2, 1453; LA64-NEXT: ld.b $t2, $sp, 104454; LA64-NEXT: vinsgr2vr.b $vr0, $t3, 2455; LA64-NEXT: ld.b $t3, $sp, 112456; LA64-NEXT: vinsgr2vr.b $vr0, $t0, 3457; LA64-NEXT: ld.b $t0, $sp, 120458; LA64-NEXT: vinsgr2vr.b $vr0, $t2, 4459; LA64-NEXT: ld.b $t2, $sp, 128460; LA64-NEXT: vinsgr2vr.b $vr0, $t3, 5461; LA64-NEXT: ld.b $t3, $sp, 136462; LA64-NEXT: vinsgr2vr.b $vr0, $t0, 6463; LA64-NEXT: ld.b $t0, $sp, 144464; LA64-NEXT: vinsgr2vr.b $vr0, $t2, 7465; LA64-NEXT: ld.b $t2, $sp, 152466; LA64-NEXT: vinsgr2vr.b $vr0, $t3, 8467; LA64-NEXT: ld.b $t3, $sp, 160468; LA64-NEXT: vinsgr2vr.b $vr0, $t0, 9469; LA64-NEXT: ld.b $t0, $sp, 168470; LA64-NEXT: vinsgr2vr.b $vr0, $t2, 10471; LA64-NEXT: ld.b $t2, $sp, 176472; LA64-NEXT: vinsgr2vr.b $vr0, $t3, 11473; LA64-NEXT: ld.b $t3, $sp, 192474; LA64-NEXT: vinsgr2vr.b $vr0, $t0, 12475; LA64-NEXT: vinsgr2vr.b $vr0, $t2, 13476; LA64-NEXT: vinsgr2vr.b $vr0, $t1, 14477; LA64-NEXT: vinsgr2vr.b $vr0, $t3, 15478; LA64-NEXT: vinsgr2vr.b $vr1, $a1, 0479; LA64-NEXT: vinsgr2vr.b $vr1, $a2, 1480; LA64-NEXT: vinsgr2vr.b $vr1, $a3, 2481; LA64-NEXT: vinsgr2vr.b $vr1, $a4, 3482; LA64-NEXT: ld.b $a1, $sp, 56483; LA64-NEXT: vinsgr2vr.b $vr1, $a5, 4484; LA64-NEXT: ld.b $a2, $sp, 0485; LA64-NEXT: vinsgr2vr.b $vr1, $a6, 5486; LA64-NEXT: ld.b $a3, $sp, 8487; LA64-NEXT: vinsgr2vr.b $vr1, $a7, 6488; LA64-NEXT: ld.b $a4, $sp, 16489; LA64-NEXT: vinsgr2vr.b $vr1, $a2, 7490; LA64-NEXT: ld.b $a2, $sp, 24491; LA64-NEXT: vinsgr2vr.b $vr1, $a3, 8492; LA64-NEXT: ld.b $a3, $sp, 32493; LA64-NEXT: vinsgr2vr.b $vr1, $a4, 9494; LA64-NEXT: ld.b $a4, $sp, 40495; LA64-NEXT: vinsgr2vr.b $vr1, $a2, 10496; LA64-NEXT: ld.b $a2, $sp, 48497; LA64-NEXT: vinsgr2vr.b $vr1, $a3, 11498; LA64-NEXT: ld.b $a3, $sp, 64499; LA64-NEXT: vinsgr2vr.b $vr1, $a4, 12500; LA64-NEXT: vinsgr2vr.b $vr1, $a2, 13501; LA64-NEXT: vinsgr2vr.b $vr1, $a1, 14502; LA64-NEXT: vinsgr2vr.b $vr1, $a3, 15503; LA64-NEXT: xvpermi.q $xr1, $xr0, 2504; LA64-NEXT: xvst $xr1, $a0, 0505; LA64-NEXT: ret506entry:507 %ins0 = insertelement <32 x i8> undef, i8 %a0, i32 0508 %ins1 = insertelement <32 x i8> %ins0, i8 %a1, i32 1509 %ins2 = insertelement <32 x i8> %ins1, i8 %a2, i32 2510 %ins3 = insertelement <32 x i8> %ins2, i8 %a3, i32 3511 %ins4 = insertelement <32 x i8> %ins3, i8 %a4, i32 4512 %ins5 = insertelement <32 x i8> %ins4, i8 %a5, i32 5513 %ins6 = insertelement <32 x i8> %ins5, i8 %a6, i32 6514 %ins7 = insertelement <32 x i8> %ins6, i8 %a7, i32 7515 %ins8 = insertelement <32 x i8> %ins7, i8 %a8, i32 8516 %ins9 = insertelement <32 x i8> %ins8, i8 %a9, i32 9517 %ins10 = insertelement <32 x i8> %ins9, i8 %a10, i32 10518 %ins11 = insertelement <32 x i8> %ins10, i8 %a11, i32 11519 %ins12 = insertelement <32 x i8> %ins11, i8 %a12, i32 12520 %ins13 = insertelement <32 x i8> %ins12, i8 %a13, i32 13521 %ins14 = insertelement <32 x i8> %ins13, i8 %a14, i32 14522 %ins15 = insertelement <32 x i8> %ins14, i8 %a15, i32 15523 %ins16 = insertelement <32 x i8> %ins15, i8 %a16, i32 16524 %ins17 = insertelement <32 x i8> %ins16, i8 %a17, i32 17525 %ins18 = insertelement <32 x i8> %ins17, i8 %a18, i32 18526 %ins19 = insertelement <32 x i8> %ins18, i8 %a19, i32 19527 %ins20 = insertelement <32 x i8> %ins19, i8 %a20, i32 20528 %ins21 = insertelement <32 x i8> %ins20, i8 %a21, i32 21529 %ins22 = insertelement <32 x i8> %ins21, i8 %a22, i32 22530 %ins23 = insertelement <32 x i8> %ins22, i8 %a23, i32 23531 %ins24 = insertelement <32 x i8> %ins23, i8 %a24, i32 24532 %ins25 = insertelement <32 x i8> %ins24, i8 %a25, i32 25533 %ins26 = insertelement <32 x i8> %ins25, i8 %a26, i32 26534 %ins27 = insertelement <32 x i8> %ins26, i8 %a27, i32 27535 %ins28 = insertelement <32 x i8> %ins27, i8 %a28, i32 28536 %ins29 = insertelement <32 x i8> %ins28, i8 %a29, i32 29537 %ins30 = insertelement <32 x i8> %ins29, i8 %a30, i32 30538 %ins31 = insertelement <32 x i8> %ins30, i8 %a31, i32 31539 store <32 x i8> %ins31, ptr %dst540 ret void541}542 543define void @buildvector_v32i8_partial(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a5, i8 %a7, i8 %a8, i8 %a15, i8 %a17, i8 %a18, i8 %a20, i8 %a22, i8 %a23, i8 %a27, i8 %a28, i8 %a31) nounwind {544; LA32-LABEL: buildvector_v32i8_partial:545; LA32: # %bb.0: # %entry546; LA32-NEXT: ld.b $t0, $sp, 28547; LA32-NEXT: ld.b $t1, $sp, 24548; LA32-NEXT: ld.b $t2, $sp, 20549; LA32-NEXT: ld.b $t3, $sp, 16550; LA32-NEXT: ld.b $t4, $sp, 12551; LA32-NEXT: ld.b $t5, $sp, 8552; LA32-NEXT: ld.b $t6, $sp, 4553; LA32-NEXT: ld.b $t7, $sp, 0554; LA32-NEXT: vinsgr2vr.b $vr0, $a1, 0555; LA32-NEXT: vinsgr2vr.b $vr0, $a2, 1556; LA32-NEXT: vinsgr2vr.b $vr0, $a3, 2557; LA32-NEXT: vinsgr2vr.b $vr0, $a4, 5558; LA32-NEXT: vinsgr2vr.b $vr0, $a5, 7559; LA32-NEXT: vinsgr2vr.b $vr0, $a6, 8560; LA32-NEXT: vinsgr2vr.b $vr0, $a7, 15561; LA32-NEXT: vinsgr2vr.b $vr1, $t7, 1562; LA32-NEXT: vinsgr2vr.b $vr1, $t6, 2563; LA32-NEXT: vinsgr2vr.b $vr1, $t5, 4564; LA32-NEXT: vinsgr2vr.b $vr1, $t4, 6565; LA32-NEXT: vinsgr2vr.b $vr1, $t3, 7566; LA32-NEXT: vinsgr2vr.b $vr1, $t2, 11567; LA32-NEXT: vinsgr2vr.b $vr1, $t1, 12568; LA32-NEXT: vinsgr2vr.b $vr1, $t0, 15569; LA32-NEXT: xvpermi.q $xr0, $xr1, 2570; LA32-NEXT: xvst $xr0, $a0, 0571; LA32-NEXT: ret572;573; LA64-LABEL: buildvector_v32i8_partial:574; LA64: # %bb.0: # %entry575; LA64-NEXT: ld.b $t0, $sp, 56576; LA64-NEXT: ld.b $t1, $sp, 48577; LA64-NEXT: ld.b $t2, $sp, 40578; LA64-NEXT: ld.b $t3, $sp, 32579; LA64-NEXT: ld.b $t4, $sp, 24580; LA64-NEXT: ld.b $t5, $sp, 16581; LA64-NEXT: ld.b $t6, $sp, 8582; LA64-NEXT: ld.b $t7, $sp, 0583; LA64-NEXT: vinsgr2vr.b $vr0, $a1, 0584; LA64-NEXT: vinsgr2vr.b $vr0, $a2, 1585; LA64-NEXT: vinsgr2vr.b $vr0, $a3, 2586; LA64-NEXT: vinsgr2vr.b $vr0, $a4, 5587; LA64-NEXT: vinsgr2vr.b $vr0, $a5, 7588; LA64-NEXT: vinsgr2vr.b $vr0, $a6, 8589; LA64-NEXT: vinsgr2vr.b $vr0, $a7, 15590; LA64-NEXT: vinsgr2vr.b $vr1, $t7, 1591; LA64-NEXT: vinsgr2vr.b $vr1, $t6, 2592; LA64-NEXT: vinsgr2vr.b $vr1, $t5, 4593; LA64-NEXT: vinsgr2vr.b $vr1, $t4, 6594; LA64-NEXT: vinsgr2vr.b $vr1, $t3, 7595; LA64-NEXT: vinsgr2vr.b $vr1, $t2, 11596; LA64-NEXT: vinsgr2vr.b $vr1, $t1, 12597; LA64-NEXT: vinsgr2vr.b $vr1, $t0, 15598; LA64-NEXT: xvpermi.q $xr0, $xr1, 2599; LA64-NEXT: xvst $xr0, $a0, 0600; LA64-NEXT: ret601entry:602 %ins0 = insertelement <32 x i8> undef, i8 %a0, i32 0603 %ins1 = insertelement <32 x i8> %ins0, i8 %a1, i32 1604 %ins2 = insertelement <32 x i8> %ins1, i8 %a2, i32 2605 %ins3 = insertelement <32 x i8> %ins2, i8 undef, i32 3606 %ins4 = insertelement <32 x i8> %ins3, i8 undef, i32 4607 %ins5 = insertelement <32 x i8> %ins4, i8 %a5, i32 5608 %ins6 = insertelement <32 x i8> %ins5, i8 undef, i32 6609 %ins7 = insertelement <32 x i8> %ins6, i8 %a7, i32 7610 %ins8 = insertelement <32 x i8> %ins7, i8 %a8, i32 8611 %ins9 = insertelement <32 x i8> %ins8, i8 undef, i32 9612 %ins10 = insertelement <32 x i8> %ins9, i8 undef, i32 10613 %ins11 = insertelement <32 x i8> %ins10, i8 undef, i32 11614 %ins12 = insertelement <32 x i8> %ins11, i8 undef, i32 12615 %ins13 = insertelement <32 x i8> %ins12, i8 undef, i32 13616 %ins14 = insertelement <32 x i8> %ins13, i8 undef, i32 14617 %ins15 = insertelement <32 x i8> %ins14, i8 %a15, i32 15618 %ins16 = insertelement <32 x i8> %ins15, i8 undef, i32 16619 %ins17 = insertelement <32 x i8> %ins16, i8 %a17, i32 17620 %ins18 = insertelement <32 x i8> %ins17, i8 %a18, i32 18621 %ins19 = insertelement <32 x i8> %ins18, i8 undef, i32 19622 %ins20 = insertelement <32 x i8> %ins19, i8 %a20, i32 20623 %ins21 = insertelement <32 x i8> %ins20, i8 undef, i32 21624 %ins22 = insertelement <32 x i8> %ins21, i8 %a22, i32 22625 %ins23 = insertelement <32 x i8> %ins22, i8 %a23, i32 23626 %ins24 = insertelement <32 x i8> %ins23, i8 undef, i32 24627 %ins25 = insertelement <32 x i8> %ins24, i8 undef, i32 25628 %ins26 = insertelement <32 x i8> %ins25, i8 undef, i32 26629 %ins27 = insertelement <32 x i8> %ins26, i8 %a27, i32 27630 %ins28 = insertelement <32 x i8> %ins27, i8 %a28, i32 28631 %ins29 = insertelement <32 x i8> %ins28, i8 undef, i32 29632 %ins30 = insertelement <32 x i8> %ins29, i8 undef, i32 30633 %ins31 = insertelement <32 x i8> %ins30, i8 %a31, i32 31634 store <32 x i8> %ins31, ptr %dst635 ret void636}637 638define void @buildvector_v32i8_with_constant(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a5, i8 %a8, i8 %a9, i8 %a15, i8 %a17, i8 %a18, i8 %a20, i8 %a22, i8 %a23, i8 %a27, i8 %a28, i8 %a31) nounwind {639; LA32-LABEL: buildvector_v32i8_with_constant:640; LA32: # %bb.0: # %entry641; LA32-NEXT: ld.b $t0, $sp, 28642; LA32-NEXT: ld.b $t1, $sp, 24643; LA32-NEXT: ld.b $t2, $sp, 20644; LA32-NEXT: ld.b $t3, $sp, 16645; LA32-NEXT: ld.b $t4, $sp, 12646; LA32-NEXT: ld.b $t5, $sp, 8647; LA32-NEXT: ld.b $t6, $sp, 4648; LA32-NEXT: ld.b $t7, $sp, 0649; LA32-NEXT: xvrepli.b $xr0, 0650; LA32-NEXT: xvreplgr2vr.b $xr1, $a1651; LA32-NEXT: xvpermi.q $xr1, $xr0, 18652; LA32-NEXT: xvextrins.b $xr0, $xr1, 0653; LA32-NEXT: xvreplgr2vr.b $xr1, $a2654; LA32-NEXT: xvpermi.q $xr1, $xr0, 18655; LA32-NEXT: xvextrins.b $xr0, $xr1, 17656; LA32-NEXT: xvreplgr2vr.b $xr1, $a3657; LA32-NEXT: xvpermi.q $xr1, $xr0, 18658; LA32-NEXT: xvextrins.b $xr0, $xr1, 34659; LA32-NEXT: xvreplgr2vr.b $xr1, $a4660; LA32-NEXT: xvpermi.q $xr1, $xr0, 18661; LA32-NEXT: xvextrins.b $xr0, $xr1, 85662; LA32-NEXT: xvreplgr2vr.b $xr1, $a5663; LA32-NEXT: xvpermi.q $xr1, $xr0, 18664; LA32-NEXT: xvextrins.b $xr0, $xr1, 136665; LA32-NEXT: xvreplgr2vr.b $xr1, $a6666; LA32-NEXT: xvpermi.q $xr1, $xr0, 18667; LA32-NEXT: xvextrins.b $xr0, $xr1, 153668; LA32-NEXT: xvreplgr2vr.b $xr1, $a7669; LA32-NEXT: xvpermi.q $xr1, $xr0, 18670; LA32-NEXT: xvextrins.b $xr0, $xr1, 255671; LA32-NEXT: xvreplgr2vr.b $xr1, $t7672; LA32-NEXT: xvpermi.q $xr1, $xr0, 48673; LA32-NEXT: xvextrins.b $xr0, $xr1, 17674; LA32-NEXT: xvreplgr2vr.b $xr1, $t6675; LA32-NEXT: xvpermi.q $xr1, $xr0, 48676; LA32-NEXT: xvextrins.b $xr0, $xr1, 34677; LA32-NEXT: xvreplgr2vr.b $xr1, $t5678; LA32-NEXT: xvpermi.q $xr1, $xr0, 48679; LA32-NEXT: xvextrins.b $xr0, $xr1, 68680; LA32-NEXT: xvreplgr2vr.b $xr1, $t4681; LA32-NEXT: xvpermi.q $xr1, $xr0, 48682; LA32-NEXT: xvextrins.b $xr0, $xr1, 102683; LA32-NEXT: xvreplgr2vr.b $xr1, $t3684; LA32-NEXT: xvpermi.q $xr1, $xr0, 48685; LA32-NEXT: xvextrins.b $xr0, $xr1, 119686; LA32-NEXT: xvreplgr2vr.b $xr1, $t2687; LA32-NEXT: xvpermi.q $xr1, $xr0, 48688; LA32-NEXT: xvextrins.b $xr0, $xr1, 187689; LA32-NEXT: xvreplgr2vr.b $xr1, $t1690; LA32-NEXT: xvpermi.q $xr1, $xr0, 48691; LA32-NEXT: xvextrins.b $xr0, $xr1, 204692; LA32-NEXT: xvreplgr2vr.b $xr1, $t0693; LA32-NEXT: xvpermi.q $xr1, $xr0, 48694; LA32-NEXT: xvextrins.b $xr0, $xr1, 255695; LA32-NEXT: xvst $xr0, $a0, 0696; LA32-NEXT: ret697;698; LA64-LABEL: buildvector_v32i8_with_constant:699; LA64: # %bb.0: # %entry700; LA64-NEXT: ld.b $t0, $sp, 56701; LA64-NEXT: ld.b $t1, $sp, 48702; LA64-NEXT: ld.b $t2, $sp, 40703; LA64-NEXT: ld.b $t3, $sp, 32704; LA64-NEXT: ld.b $t4, $sp, 24705; LA64-NEXT: ld.b $t5, $sp, 16706; LA64-NEXT: ld.b $t6, $sp, 8707; LA64-NEXT: ld.b $t7, $sp, 0708; LA64-NEXT: xvrepli.b $xr0, 0709; LA64-NEXT: xvreplgr2vr.b $xr1, $a1710; LA64-NEXT: xvpermi.q $xr1, $xr0, 18711; LA64-NEXT: xvextrins.b $xr0, $xr1, 0712; LA64-NEXT: xvreplgr2vr.b $xr1, $a2713; LA64-NEXT: xvpermi.q $xr1, $xr0, 18714; LA64-NEXT: xvextrins.b $xr0, $xr1, 17715; LA64-NEXT: xvreplgr2vr.b $xr1, $a3716; LA64-NEXT: xvpermi.q $xr1, $xr0, 18717; LA64-NEXT: xvextrins.b $xr0, $xr1, 34718; LA64-NEXT: xvreplgr2vr.b $xr1, $a4719; LA64-NEXT: xvpermi.q $xr1, $xr0, 18720; LA64-NEXT: xvextrins.b $xr0, $xr1, 85721; LA64-NEXT: xvreplgr2vr.b $xr1, $a5722; LA64-NEXT: xvpermi.q $xr1, $xr0, 18723; LA64-NEXT: xvextrins.b $xr0, $xr1, 136724; LA64-NEXT: xvreplgr2vr.b $xr1, $a6725; LA64-NEXT: xvpermi.q $xr1, $xr0, 18726; LA64-NEXT: xvextrins.b $xr0, $xr1, 153727; LA64-NEXT: xvreplgr2vr.b $xr1, $a7728; LA64-NEXT: xvpermi.q $xr1, $xr0, 18729; LA64-NEXT: xvextrins.b $xr0, $xr1, 255730; LA64-NEXT: xvreplgr2vr.b $xr1, $t7731; LA64-NEXT: xvpermi.q $xr1, $xr0, 48732; LA64-NEXT: xvextrins.b $xr0, $xr1, 17733; LA64-NEXT: xvreplgr2vr.b $xr1, $t6734; LA64-NEXT: xvpermi.q $xr1, $xr0, 48735; LA64-NEXT: xvextrins.b $xr0, $xr1, 34736; LA64-NEXT: xvreplgr2vr.b $xr1, $t5737; LA64-NEXT: xvpermi.q $xr1, $xr0, 48738; LA64-NEXT: xvextrins.b $xr0, $xr1, 68739; LA64-NEXT: xvreplgr2vr.b $xr1, $t4740; LA64-NEXT: xvpermi.q $xr1, $xr0, 48741; LA64-NEXT: xvextrins.b $xr0, $xr1, 102742; LA64-NEXT: xvreplgr2vr.b $xr1, $t3743; LA64-NEXT: xvpermi.q $xr1, $xr0, 48744; LA64-NEXT: xvextrins.b $xr0, $xr1, 119745; LA64-NEXT: xvreplgr2vr.b $xr1, $t2746; LA64-NEXT: xvpermi.q $xr1, $xr0, 48747; LA64-NEXT: xvextrins.b $xr0, $xr1, 187748; LA64-NEXT: xvreplgr2vr.b $xr1, $t1749; LA64-NEXT: xvpermi.q $xr1, $xr0, 48750; LA64-NEXT: xvextrins.b $xr0, $xr1, 204751; LA64-NEXT: xvreplgr2vr.b $xr1, $t0752; LA64-NEXT: xvpermi.q $xr1, $xr0, 48753; LA64-NEXT: xvextrins.b $xr0, $xr1, 255754; LA64-NEXT: xvst $xr0, $a0, 0755; LA64-NEXT: ret756entry:757 %ins0 = insertelement <32 x i8> undef, i8 %a0, i32 0758 %ins1 = insertelement <32 x i8> %ins0, i8 %a1, i32 1759 %ins2 = insertelement <32 x i8> %ins1, i8 %a2, i32 2760 %ins3 = insertelement <32 x i8> %ins2, i8 0, i32 3761 %ins4 = insertelement <32 x i8> %ins3, i8 0, i32 4762 %ins5 = insertelement <32 x i8> %ins4, i8 %a5, i32 5763 %ins6 = insertelement <32 x i8> %ins5, i8 undef, i32 6764 %ins7 = insertelement <32 x i8> %ins6, i8 0, i32 7765 %ins8 = insertelement <32 x i8> %ins7, i8 %a8, i32 8766 %ins9 = insertelement <32 x i8> %ins8, i8 %a9, i32 9767 %ins10 = insertelement <32 x i8> %ins9, i8 0, i32 10768 %ins11 = insertelement <32 x i8> %ins10, i8 undef, i32 11769 %ins12 = insertelement <32 x i8> %ins11, i8 0, i32 12770 %ins13 = insertelement <32 x i8> %ins12, i8 0, i32 13771 %ins14 = insertelement <32 x i8> %ins13, i8 undef, i32 14772 %ins15 = insertelement <32 x i8> %ins14, i8 %a15, i32 15773 %ins16 = insertelement <32 x i8> %ins15, i8 0, i32 16774 %ins17 = insertelement <32 x i8> %ins16, i8 %a17, i32 17775 %ins18 = insertelement <32 x i8> %ins17, i8 %a18, i32 18776 %ins19 = insertelement <32 x i8> %ins18, i8 0, i32 19777 %ins20 = insertelement <32 x i8> %ins19, i8 %a20, i32 20778 %ins21 = insertelement <32 x i8> %ins20, i8 0, i32 21779 %ins22 = insertelement <32 x i8> %ins21, i8 %a22, i32 22780 %ins23 = insertelement <32 x i8> %ins22, i8 %a23, i32 23781 %ins24 = insertelement <32 x i8> %ins23, i8 0, i32 24782 %ins25 = insertelement <32 x i8> %ins24, i8 undef, i32 25783 %ins26 = insertelement <32 x i8> %ins25, i8 undef, i32 26784 %ins27 = insertelement <32 x i8> %ins26, i8 %a27, i32 27785 %ins28 = insertelement <32 x i8> %ins27, i8 %a28, i32 28786 %ins29 = insertelement <32 x i8> %ins28, i8 0, i32 29787 %ins30 = insertelement <32 x i8> %ins29, i8 undef, i32 30788 %ins31 = insertelement <32 x i8> %ins30, i8 %a31, i32 31789 store <32 x i8> %ins31, ptr %dst790 ret void791}792 793define void @buildvector_v32i8_subseq_2(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7, i8 %a8, i8 %a9, i8 %a10, i8 %a11, i8 %a12, i8 %a13, i8 %a14, i8 %a15) nounwind {794; LA32-LABEL: buildvector_v32i8_subseq_2:795; LA32: # %bb.0: # %entry796; LA32-NEXT: ld.b $t0, $sp, 32797; LA32-NEXT: ld.b $t1, $sp, 28798; LA32-NEXT: ld.b $t2, $sp, 24799; LA32-NEXT: ld.b $t3, $sp, 20800; LA32-NEXT: ld.b $t4, $sp, 16801; LA32-NEXT: ld.b $t5, $sp, 12802; LA32-NEXT: ld.b $t6, $sp, 8803; LA32-NEXT: ld.b $t7, $sp, 4804; LA32-NEXT: ld.b $t8, $sp, 0805; LA32-NEXT: vinsgr2vr.b $vr0, $a1, 0806; LA32-NEXT: vinsgr2vr.b $vr0, $a2, 1807; LA32-NEXT: vinsgr2vr.b $vr0, $a3, 2808; LA32-NEXT: vinsgr2vr.b $vr0, $a4, 3809; LA32-NEXT: vinsgr2vr.b $vr0, $a5, 4810; LA32-NEXT: vinsgr2vr.b $vr0, $a6, 5811; LA32-NEXT: vinsgr2vr.b $vr0, $a7, 6812; LA32-NEXT: vinsgr2vr.b $vr0, $t8, 7813; LA32-NEXT: vinsgr2vr.b $vr0, $t7, 8814; LA32-NEXT: vinsgr2vr.b $vr0, $t6, 9815; LA32-NEXT: vinsgr2vr.b $vr0, $t5, 10816; LA32-NEXT: vinsgr2vr.b $vr0, $t4, 11817; LA32-NEXT: vinsgr2vr.b $vr0, $t3, 12818; LA32-NEXT: vinsgr2vr.b $vr0, $t2, 13819; LA32-NEXT: vinsgr2vr.b $vr0, $t1, 14820; LA32-NEXT: vinsgr2vr.b $vr0, $t0, 15821; LA32-NEXT: xvreplve0.q $xr0, $xr0822; LA32-NEXT: xvst $xr0, $a0, 0823; LA32-NEXT: ret824;825; LA64-LABEL: buildvector_v32i8_subseq_2:826; LA64: # %bb.0: # %entry827; LA64-NEXT: ld.b $t0, $sp, 64828; LA64-NEXT: ld.b $t1, $sp, 56829; LA64-NEXT: ld.b $t2, $sp, 48830; LA64-NEXT: ld.b $t3, $sp, 40831; LA64-NEXT: ld.b $t4, $sp, 32832; LA64-NEXT: ld.b $t5, $sp, 24833; LA64-NEXT: ld.b $t6, $sp, 16834; LA64-NEXT: ld.b $t7, $sp, 8835; LA64-NEXT: ld.b $t8, $sp, 0836; LA64-NEXT: vinsgr2vr.b $vr0, $a1, 0837; LA64-NEXT: vinsgr2vr.b $vr0, $a2, 1838; LA64-NEXT: vinsgr2vr.b $vr0, $a3, 2839; LA64-NEXT: vinsgr2vr.b $vr0, $a4, 3840; LA64-NEXT: vinsgr2vr.b $vr0, $a5, 4841; LA64-NEXT: vinsgr2vr.b $vr0, $a6, 5842; LA64-NEXT: vinsgr2vr.b $vr0, $a7, 6843; LA64-NEXT: vinsgr2vr.b $vr0, $t8, 7844; LA64-NEXT: vinsgr2vr.b $vr0, $t7, 8845; LA64-NEXT: vinsgr2vr.b $vr0, $t6, 9846; LA64-NEXT: vinsgr2vr.b $vr0, $t5, 10847; LA64-NEXT: vinsgr2vr.b $vr0, $t4, 11848; LA64-NEXT: vinsgr2vr.b $vr0, $t3, 12849; LA64-NEXT: vinsgr2vr.b $vr0, $t2, 13850; LA64-NEXT: vinsgr2vr.b $vr0, $t1, 14851; LA64-NEXT: vinsgr2vr.b $vr0, $t0, 15852; LA64-NEXT: xvreplve0.q $xr0, $xr0853; LA64-NEXT: xvst $xr0, $a0, 0854; LA64-NEXT: ret855entry:856 %ins0 = insertelement <32 x i8> undef, i8 %a0, i32 0857 %ins1 = insertelement <32 x i8> %ins0, i8 %a1, i32 1858 %ins2 = insertelement <32 x i8> %ins1, i8 %a2, i32 2859 %ins3 = insertelement <32 x i8> %ins2, i8 %a3, i32 3860 %ins4 = insertelement <32 x i8> %ins3, i8 %a4, i32 4861 %ins5 = insertelement <32 x i8> %ins4, i8 %a5, i32 5862 %ins6 = insertelement <32 x i8> %ins5, i8 %a6, i32 6863 %ins7 = insertelement <32 x i8> %ins6, i8 %a7, i32 7864 %ins8 = insertelement <32 x i8> %ins7, i8 %a8, i32 8865 %ins9 = insertelement <32 x i8> %ins8, i8 %a9, i32 9866 %ins10 = insertelement <32 x i8> %ins9, i8 %a10, i32 10867 %ins11 = insertelement <32 x i8> %ins10, i8 %a11, i32 11868 %ins12 = insertelement <32 x i8> %ins11, i8 %a12, i32 12869 %ins13 = insertelement <32 x i8> %ins12, i8 %a13, i32 13870 %ins14 = insertelement <32 x i8> %ins13, i8 %a14, i32 14871 %ins15 = insertelement <32 x i8> %ins14, i8 %a15, i32 15872 %ins16 = insertelement <32 x i8> %ins15, i8 %a0, i32 16873 %ins17 = insertelement <32 x i8> %ins16, i8 %a1, i32 17874 %ins18 = insertelement <32 x i8> %ins17, i8 %a2, i32 18875 %ins19 = insertelement <32 x i8> %ins18, i8 %a3, i32 19876 %ins20 = insertelement <32 x i8> %ins19, i8 %a4, i32 20877 %ins21 = insertelement <32 x i8> %ins20, i8 %a5, i32 21878 %ins22 = insertelement <32 x i8> %ins21, i8 %a6, i32 22879 %ins23 = insertelement <32 x i8> %ins22, i8 %a7, i32 23880 %ins24 = insertelement <32 x i8> %ins23, i8 %a8, i32 24881 %ins25 = insertelement <32 x i8> %ins24, i8 %a9, i32 25882 %ins26 = insertelement <32 x i8> %ins25, i8 %a10, i32 26883 %ins27 = insertelement <32 x i8> %ins26, i8 %a11, i32 27884 %ins28 = insertelement <32 x i8> %ins27, i8 %a12, i32 28885 %ins29 = insertelement <32 x i8> %ins28, i8 %a13, i32 29886 %ins30 = insertelement <32 x i8> %ins29, i8 %a14, i32 30887 %ins31 = insertelement <32 x i8> %ins30, i8 %a15, i32 31888 store <32 x i8> %ins31, ptr %dst889 ret void890}891 892define void @buildvector_v32i8_subseq_4(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a3, i8 %a4, i8 %a5, i8 %a6, i8 %a7) nounwind {893; CHECK-LABEL: buildvector_v32i8_subseq_4:894; CHECK: # %bb.0: # %entry895; CHECK-NEXT: ld.b $t0, $sp, 0896; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 0897; CHECK-NEXT: vinsgr2vr.b $vr0, $a2, 1898; CHECK-NEXT: vinsgr2vr.b $vr0, $a3, 2899; CHECK-NEXT: vinsgr2vr.b $vr0, $a4, 3900; CHECK-NEXT: vinsgr2vr.b $vr0, $a5, 4901; CHECK-NEXT: vinsgr2vr.b $vr0, $a6, 5902; CHECK-NEXT: vinsgr2vr.b $vr0, $a7, 6903; CHECK-NEXT: vinsgr2vr.b $vr0, $t0, 7904; CHECK-NEXT: xvreplve0.d $xr0, $xr0905; CHECK-NEXT: xvst $xr0, $a0, 0906; CHECK-NEXT: ret907entry:908 %ins0 = insertelement <32 x i8> undef, i8 %a0, i32 0909 %ins1 = insertelement <32 x i8> %ins0, i8 %a1, i32 1910 %ins2 = insertelement <32 x i8> %ins1, i8 %a2, i32 2911 %ins3 = insertelement <32 x i8> %ins2, i8 %a3, i32 3912 %ins4 = insertelement <32 x i8> %ins3, i8 %a4, i32 4913 %ins5 = insertelement <32 x i8> %ins4, i8 %a5, i32 5914 %ins6 = insertelement <32 x i8> %ins5, i8 %a6, i32 6915 %ins7 = insertelement <32 x i8> %ins6, i8 %a7, i32 7916 %ins8 = insertelement <32 x i8> %ins7, i8 %a0, i32 8917 %ins9 = insertelement <32 x i8> %ins8, i8 %a1, i32 9918 %ins10 = insertelement <32 x i8> %ins9, i8 %a2, i32 10919 %ins11 = insertelement <32 x i8> %ins10, i8 %a3, i32 11920 %ins12 = insertelement <32 x i8> %ins11, i8 %a4, i32 12921 %ins13 = insertelement <32 x i8> %ins12, i8 %a5, i32 13922 %ins14 = insertelement <32 x i8> %ins13, i8 %a6, i32 14923 %ins15 = insertelement <32 x i8> %ins14, i8 %a7, i32 15924 %ins16 = insertelement <32 x i8> %ins15, i8 %a0, i32 16925 %ins17 = insertelement <32 x i8> %ins16, i8 %a1, i32 17926 %ins18 = insertelement <32 x i8> %ins17, i8 %a2, i32 18927 %ins19 = insertelement <32 x i8> %ins18, i8 %a3, i32 19928 %ins20 = insertelement <32 x i8> %ins19, i8 %a4, i32 20929 %ins21 = insertelement <32 x i8> %ins20, i8 %a5, i32 21930 %ins22 = insertelement <32 x i8> %ins21, i8 %a6, i32 22931 %ins23 = insertelement <32 x i8> %ins22, i8 %a7, i32 23932 %ins24 = insertelement <32 x i8> %ins23, i8 %a0, i32 24933 %ins25 = insertelement <32 x i8> %ins24, i8 %a1, i32 25934 %ins26 = insertelement <32 x i8> %ins25, i8 %a2, i32 26935 %ins27 = insertelement <32 x i8> %ins26, i8 %a3, i32 27936 %ins28 = insertelement <32 x i8> %ins27, i8 %a4, i32 28937 %ins29 = insertelement <32 x i8> %ins28, i8 %a5, i32 29938 %ins30 = insertelement <32 x i8> %ins29, i8 %a6, i32 30939 %ins31 = insertelement <32 x i8> %ins30, i8 %a7, i32 31940 store <32 x i8> %ins31, ptr %dst941 ret void942}943 944define void @buildvector_v32i8_subseq_8(ptr %dst, i8 %a0, i8 %a1, i8 %a2, i8 %a3) nounwind {945; CHECK-LABEL: buildvector_v32i8_subseq_8:946; CHECK: # %bb.0: # %entry947; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 0948; CHECK-NEXT: vinsgr2vr.b $vr0, $a2, 1949; CHECK-NEXT: vinsgr2vr.b $vr0, $a3, 2950; CHECK-NEXT: vinsgr2vr.b $vr0, $a4, 3951; CHECK-NEXT: xvreplve0.w $xr0, $xr0952; CHECK-NEXT: xvst $xr0, $a0, 0953; CHECK-NEXT: ret954entry:955 %ins0 = insertelement <32 x i8> undef, i8 %a0, i32 0956 %ins1 = insertelement <32 x i8> %ins0, i8 %a1, i32 1957 %ins2 = insertelement <32 x i8> %ins1, i8 %a2, i32 2958 %ins3 = insertelement <32 x i8> %ins2, i8 %a3, i32 3959 %ins4 = insertelement <32 x i8> %ins3, i8 %a0, i32 4960 %ins5 = insertelement <32 x i8> %ins4, i8 %a1, i32 5961 %ins6 = insertelement <32 x i8> %ins5, i8 %a2, i32 6962 %ins7 = insertelement <32 x i8> %ins6, i8 %a3, i32 7963 %ins8 = insertelement <32 x i8> %ins7, i8 %a0, i32 8964 %ins9 = insertelement <32 x i8> %ins8, i8 %a1, i32 9965 %ins10 = insertelement <32 x i8> %ins9, i8 %a2, i32 10966 %ins11 = insertelement <32 x i8> %ins10, i8 %a3, i32 11967 %ins12 = insertelement <32 x i8> %ins11, i8 %a0, i32 12968 %ins13 = insertelement <32 x i8> %ins12, i8 %a1, i32 13969 %ins14 = insertelement <32 x i8> %ins13, i8 %a2, i32 14970 %ins15 = insertelement <32 x i8> %ins14, i8 %a3, i32 15971 %ins16 = insertelement <32 x i8> %ins15, i8 %a0, i32 16972 %ins17 = insertelement <32 x i8> %ins16, i8 %a1, i32 17973 %ins18 = insertelement <32 x i8> %ins17, i8 %a2, i32 18974 %ins19 = insertelement <32 x i8> %ins18, i8 %a3, i32 19975 %ins20 = insertelement <32 x i8> %ins19, i8 %a0, i32 20976 %ins21 = insertelement <32 x i8> %ins20, i8 %a1, i32 21977 %ins22 = insertelement <32 x i8> %ins21, i8 %a2, i32 22978 %ins23 = insertelement <32 x i8> %ins22, i8 %a3, i32 23979 %ins24 = insertelement <32 x i8> %ins23, i8 %a0, i32 24980 %ins25 = insertelement <32 x i8> %ins24, i8 %a1, i32 25981 %ins26 = insertelement <32 x i8> %ins25, i8 %a2, i32 26982 %ins27 = insertelement <32 x i8> %ins26, i8 %a3, i32 27983 %ins28 = insertelement <32 x i8> %ins27, i8 %a0, i32 28984 %ins29 = insertelement <32 x i8> %ins28, i8 %a1, i32 29985 %ins30 = insertelement <32 x i8> %ins29, i8 %a2, i32 30986 %ins31 = insertelement <32 x i8> %ins30, i8 %a3, i32 31987 store <32 x i8> %ins31, ptr %dst988 ret void989}990 991define void @buildvector_v32i8_subseq_16(ptr %dst, i8 %a0, i8 %a1) nounwind {992; CHECK-LABEL: buildvector_v32i8_subseq_16:993; CHECK: # %bb.0: # %entry994; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 0995; CHECK-NEXT: vinsgr2vr.b $vr0, $a2, 1996; CHECK-NEXT: xvreplve0.h $xr0, $xr0997; CHECK-NEXT: xvst $xr0, $a0, 0998; CHECK-NEXT: ret999entry:1000 %ins0 = insertelement <32 x i8> undef, i8 %a0, i32 01001 %ins1 = insertelement <32 x i8> %ins0, i8 %a1, i32 11002 %ins2 = insertelement <32 x i8> %ins1, i8 %a0, i32 21003 %ins3 = insertelement <32 x i8> %ins2, i8 %a1, i32 31004 %ins4 = insertelement <32 x i8> %ins3, i8 %a0, i32 41005 %ins5 = insertelement <32 x i8> %ins4, i8 %a1, i32 51006 %ins6 = insertelement <32 x i8> %ins5, i8 %a0, i32 61007 %ins7 = insertelement <32 x i8> %ins6, i8 %a1, i32 71008 %ins8 = insertelement <32 x i8> %ins7, i8 %a0, i32 81009 %ins9 = insertelement <32 x i8> %ins8, i8 %a1, i32 91010 %ins10 = insertelement <32 x i8> %ins9, i8 %a0, i32 101011 %ins11 = insertelement <32 x i8> %ins10, i8 %a1, i32 111012 %ins12 = insertelement <32 x i8> %ins11, i8 %a0, i32 121013 %ins13 = insertelement <32 x i8> %ins12, i8 %a1, i32 131014 %ins14 = insertelement <32 x i8> %ins13, i8 %a0, i32 141015 %ins15 = insertelement <32 x i8> %ins14, i8 %a1, i32 151016 %ins16 = insertelement <32 x i8> %ins15, i8 %a0, i32 161017 %ins17 = insertelement <32 x i8> %ins16, i8 %a1, i32 171018 %ins18 = insertelement <32 x i8> %ins17, i8 %a0, i32 181019 %ins19 = insertelement <32 x i8> %ins18, i8 %a1, i32 191020 %ins20 = insertelement <32 x i8> %ins19, i8 %a0, i32 201021 %ins21 = insertelement <32 x i8> %ins20, i8 %a1, i32 211022 %ins22 = insertelement <32 x i8> %ins21, i8 %a0, i32 221023 %ins23 = insertelement <32 x i8> %ins22, i8 %a1, i32 231024 %ins24 = insertelement <32 x i8> %ins23, i8 %a0, i32 241025 %ins25 = insertelement <32 x i8> %ins24, i8 %a1, i32 251026 %ins26 = insertelement <32 x i8> %ins25, i8 %a0, i32 261027 %ins27 = insertelement <32 x i8> %ins26, i8 %a1, i32 271028 %ins28 = insertelement <32 x i8> %ins27, i8 %a0, i32 281029 %ins29 = insertelement <32 x i8> %ins28, i8 %a1, i32 291030 %ins30 = insertelement <32 x i8> %ins29, i8 %a0, i32 301031 %ins31 = insertelement <32 x i8> %ins30, i8 %a1, i32 311032 store <32 x i8> %ins31, ptr %dst1033 ret void1034}1035 1036define void @buildvector_v16i16(ptr %dst, i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7, i16 %a8, i16 %a9, i16 %a10, i16 %a11, i16 %a12, i16 %a13, i16 %a14, i16 %a15) nounwind {1037; LA32-LABEL: buildvector_v16i16:1038; LA32: # %bb.0: # %entry1039; LA32-NEXT: ld.h $t0, $sp, 01040; LA32-NEXT: ld.h $t1, $sp, 321041; LA32-NEXT: ld.h $t2, $sp, 281042; LA32-NEXT: ld.h $t3, $sp, 241043; LA32-NEXT: ld.h $t4, $sp, 201044; LA32-NEXT: ld.h $t5, $sp, 41045; LA32-NEXT: ld.h $t6, $sp, 81046; LA32-NEXT: ld.h $t7, $sp, 121047; LA32-NEXT: ld.h $t8, $sp, 161048; LA32-NEXT: vinsgr2vr.h $vr0, $t5, 01049; LA32-NEXT: vinsgr2vr.h $vr0, $t6, 11050; LA32-NEXT: vinsgr2vr.h $vr0, $t7, 21051; LA32-NEXT: vinsgr2vr.h $vr0, $t8, 31052; LA32-NEXT: vinsgr2vr.h $vr0, $t4, 41053; LA32-NEXT: vinsgr2vr.h $vr0, $t3, 51054; LA32-NEXT: vinsgr2vr.h $vr0, $t2, 61055; LA32-NEXT: vinsgr2vr.h $vr0, $t1, 71056; LA32-NEXT: vinsgr2vr.h $vr1, $a1, 01057; LA32-NEXT: vinsgr2vr.h $vr1, $a2, 11058; LA32-NEXT: vinsgr2vr.h $vr1, $a3, 21059; LA32-NEXT: vinsgr2vr.h $vr1, $a4, 31060; LA32-NEXT: vinsgr2vr.h $vr1, $a5, 41061; LA32-NEXT: vinsgr2vr.h $vr1, $a6, 51062; LA32-NEXT: vinsgr2vr.h $vr1, $a7, 61063; LA32-NEXT: vinsgr2vr.h $vr1, $t0, 71064; LA32-NEXT: xvpermi.q $xr1, $xr0, 21065; LA32-NEXT: xvst $xr1, $a0, 01066; LA32-NEXT: ret1067;1068; LA64-LABEL: buildvector_v16i16:1069; LA64: # %bb.0: # %entry1070; LA64-NEXT: ld.h $t0, $sp, 01071; LA64-NEXT: ld.h $t1, $sp, 641072; LA64-NEXT: ld.h $t2, $sp, 561073; LA64-NEXT: ld.h $t3, $sp, 481074; LA64-NEXT: ld.h $t4, $sp, 401075; LA64-NEXT: ld.h $t5, $sp, 81076; LA64-NEXT: ld.h $t6, $sp, 161077; LA64-NEXT: ld.h $t7, $sp, 241078; LA64-NEXT: ld.h $t8, $sp, 321079; LA64-NEXT: vinsgr2vr.h $vr0, $t5, 01080; LA64-NEXT: vinsgr2vr.h $vr0, $t6, 11081; LA64-NEXT: vinsgr2vr.h $vr0, $t7, 21082; LA64-NEXT: vinsgr2vr.h $vr0, $t8, 31083; LA64-NEXT: vinsgr2vr.h $vr0, $t4, 41084; LA64-NEXT: vinsgr2vr.h $vr0, $t3, 51085; LA64-NEXT: vinsgr2vr.h $vr0, $t2, 61086; LA64-NEXT: vinsgr2vr.h $vr0, $t1, 71087; LA64-NEXT: vinsgr2vr.h $vr1, $a1, 01088; LA64-NEXT: vinsgr2vr.h $vr1, $a2, 11089; LA64-NEXT: vinsgr2vr.h $vr1, $a3, 21090; LA64-NEXT: vinsgr2vr.h $vr1, $a4, 31091; LA64-NEXT: vinsgr2vr.h $vr1, $a5, 41092; LA64-NEXT: vinsgr2vr.h $vr1, $a6, 51093; LA64-NEXT: vinsgr2vr.h $vr1, $a7, 61094; LA64-NEXT: vinsgr2vr.h $vr1, $t0, 71095; LA64-NEXT: xvpermi.q $xr1, $xr0, 21096; LA64-NEXT: xvst $xr1, $a0, 01097; LA64-NEXT: ret1098entry:1099 %ins0 = insertelement <16 x i16> undef, i16 %a0, i32 01100 %ins1 = insertelement <16 x i16> %ins0, i16 %a1, i32 11101 %ins2 = insertelement <16 x i16> %ins1, i16 %a2, i32 21102 %ins3 = insertelement <16 x i16> %ins2, i16 %a3, i32 31103 %ins4 = insertelement <16 x i16> %ins3, i16 %a4, i32 41104 %ins5 = insertelement <16 x i16> %ins4, i16 %a5, i32 51105 %ins6 = insertelement <16 x i16> %ins5, i16 %a6, i32 61106 %ins7 = insertelement <16 x i16> %ins6, i16 %a7, i32 71107 %ins8 = insertelement <16 x i16> %ins7, i16 %a8, i32 81108 %ins9 = insertelement <16 x i16> %ins8, i16 %a9, i32 91109 %ins10 = insertelement <16 x i16> %ins9, i16 %a10, i32 101110 %ins11 = insertelement <16 x i16> %ins10, i16 %a11, i32 111111 %ins12 = insertelement <16 x i16> %ins11, i16 %a12, i32 121112 %ins13 = insertelement <16 x i16> %ins12, i16 %a13, i32 131113 %ins14 = insertelement <16 x i16> %ins13, i16 %a14, i32 141114 %ins15 = insertelement <16 x i16> %ins14, i16 %a15, i32 151115 store <16 x i16> %ins15, ptr %dst1116 ret void1117}1118 1119define void @buildvector_v16i16_partial(ptr %dst, i16 %a0, i16 %a2, i16 %a5, i16 %a6, i16 %a7, i16 %a12, i16 %a13) nounwind {1120; CHECK-LABEL: buildvector_v16i16_partial:1121; CHECK: # %bb.0: # %entry1122; CHECK-NEXT: vinsgr2vr.h $vr0, $a6, 41123; CHECK-NEXT: vinsgr2vr.h $vr0, $a7, 51124; CHECK-NEXT: vinsgr2vr.h $vr1, $a1, 01125; CHECK-NEXT: vinsgr2vr.h $vr1, $a2, 21126; CHECK-NEXT: vinsgr2vr.h $vr1, $a3, 51127; CHECK-NEXT: vinsgr2vr.h $vr1, $a4, 61128; CHECK-NEXT: vinsgr2vr.h $vr1, $a5, 71129; CHECK-NEXT: xvpermi.q $xr1, $xr0, 21130; CHECK-NEXT: xvst $xr1, $a0, 01131; CHECK-NEXT: ret1132entry:1133 %ins0 = insertelement <16 x i16> undef, i16 %a0, i32 01134 %ins1 = insertelement <16 x i16> %ins0, i16 undef, i32 11135 %ins2 = insertelement <16 x i16> %ins1, i16 %a2, i32 21136 %ins3 = insertelement <16 x i16> %ins2, i16 undef, i32 31137 %ins4 = insertelement <16 x i16> %ins3, i16 undef, i32 41138 %ins5 = insertelement <16 x i16> %ins4, i16 %a5, i32 51139 %ins6 = insertelement <16 x i16> %ins5, i16 %a6, i32 61140 %ins7 = insertelement <16 x i16> %ins6, i16 %a7, i32 71141 %ins8 = insertelement <16 x i16> %ins7, i16 undef, i32 81142 %ins9 = insertelement <16 x i16> %ins8, i16 undef, i32 91143 %ins10 = insertelement <16 x i16> %ins9, i16 undef, i32 101144 %ins11 = insertelement <16 x i16> %ins10, i16 undef, i32 111145 %ins12 = insertelement <16 x i16> %ins11, i16 %a12, i32 121146 %ins13 = insertelement <16 x i16> %ins12, i16 %a13, i32 131147 %ins14 = insertelement <16 x i16> %ins13, i16 undef, i32 141148 %ins15 = insertelement <16 x i16> %ins14, i16 undef, i32 151149 store <16 x i16> %ins15, ptr %dst1150 ret void1151}1152 1153define void @buildvector_v16i16_with_constant(ptr %dst, i16 %a2, i16 %a3, i16 %a5, i16 %a6, i16 %a7, i16 %a12, i16 %a13) nounwind {1154; CHECK-LABEL: buildvector_v16i16_with_constant:1155; CHECK: # %bb.0: # %entry1156; CHECK-NEXT: xvrepli.h $xr0, 21157; CHECK-NEXT: xvreplgr2vr.h $xr1, $a11158; CHECK-NEXT: xvpermi.q $xr1, $xr0, 181159; CHECK-NEXT: xvextrins.h $xr0, $xr1, 341160; CHECK-NEXT: xvreplgr2vr.h $xr1, $a21161; CHECK-NEXT: xvpermi.q $xr1, $xr0, 181162; CHECK-NEXT: xvextrins.h $xr0, $xr1, 511163; CHECK-NEXT: xvreplgr2vr.h $xr1, $a31164; CHECK-NEXT: xvpermi.q $xr1, $xr0, 181165; CHECK-NEXT: xvextrins.h $xr0, $xr1, 851166; CHECK-NEXT: xvreplgr2vr.h $xr1, $a41167; CHECK-NEXT: xvpermi.q $xr1, $xr0, 181168; CHECK-NEXT: xvextrins.h $xr0, $xr1, 1021169; CHECK-NEXT: xvreplgr2vr.h $xr1, $a51170; CHECK-NEXT: xvpermi.q $xr1, $xr0, 181171; CHECK-NEXT: xvextrins.h $xr0, $xr1, 1191172; CHECK-NEXT: xvreplgr2vr.h $xr1, $a61173; CHECK-NEXT: xvpermi.q $xr1, $xr0, 481174; CHECK-NEXT: xvextrins.h $xr0, $xr1, 681175; CHECK-NEXT: xvreplgr2vr.h $xr1, $a71176; CHECK-NEXT: xvpermi.q $xr1, $xr0, 481177; CHECK-NEXT: xvextrins.h $xr0, $xr1, 851178; CHECK-NEXT: xvst $xr0, $a0, 01179; CHECK-NEXT: ret1180entry:1181 %ins0 = insertelement <16 x i16> undef, i16 2, i32 01182 %ins1 = insertelement <16 x i16> %ins0, i16 2, i32 11183 %ins2 = insertelement <16 x i16> %ins1, i16 %a2, i32 21184 %ins3 = insertelement <16 x i16> %ins2, i16 %a3, i32 31185 %ins4 = insertelement <16 x i16> %ins3, i16 2, i32 41186 %ins5 = insertelement <16 x i16> %ins4, i16 %a5, i32 51187 %ins6 = insertelement <16 x i16> %ins5, i16 %a6, i32 61188 %ins7 = insertelement <16 x i16> %ins6, i16 %a7, i32 71189 %ins8 = insertelement <16 x i16> %ins7, i16 2, i32 81190 %ins9 = insertelement <16 x i16> %ins8, i16 2, i32 91191 %ins10 = insertelement <16 x i16> %ins9, i16 2, i32 101192 %ins11 = insertelement <16 x i16> %ins10, i16 2, i32 111193 %ins12 = insertelement <16 x i16> %ins11, i16 %a12, i32 121194 %ins13 = insertelement <16 x i16> %ins12, i16 %a13, i32 131195 %ins14 = insertelement <16 x i16> %ins13, i16 2, i32 141196 %ins15 = insertelement <16 x i16> %ins14, i16 2, i32 151197 store <16 x i16> %ins15, ptr %dst1198 ret void1199}1200 1201define void @buildvector_v16i16_subseq_2(ptr %dst, i16 %a0, i16 %a1, i16 %a2, i16 %a3, i16 %a4, i16 %a5, i16 %a6, i16 %a7) nounwind {1202; CHECK-LABEL: buildvector_v16i16_subseq_2:1203; CHECK: # %bb.0: # %entry1204; CHECK-NEXT: ld.h $t0, $sp, 01205; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 01206; CHECK-NEXT: vinsgr2vr.h $vr0, $a2, 11207; CHECK-NEXT: vinsgr2vr.h $vr0, $a3, 21208; CHECK-NEXT: vinsgr2vr.h $vr0, $a4, 31209; CHECK-NEXT: vinsgr2vr.h $vr0, $a5, 41210; CHECK-NEXT: vinsgr2vr.h $vr0, $a6, 51211; CHECK-NEXT: vinsgr2vr.h $vr0, $a7, 61212; CHECK-NEXT: vinsgr2vr.h $vr0, $t0, 71213; CHECK-NEXT: xvreplve0.q $xr0, $xr01214; CHECK-NEXT: xvst $xr0, $a0, 01215; CHECK-NEXT: ret1216entry:1217 %ins0 = insertelement <16 x i16> undef, i16 %a0, i32 01218 %ins1 = insertelement <16 x i16> %ins0, i16 %a1, i32 11219 %ins2 = insertelement <16 x i16> %ins1, i16 %a2, i32 21220 %ins3 = insertelement <16 x i16> %ins2, i16 %a3, i32 31221 %ins4 = insertelement <16 x i16> %ins3, i16 %a4, i32 41222 %ins5 = insertelement <16 x i16> %ins4, i16 %a5, i32 51223 %ins6 = insertelement <16 x i16> %ins5, i16 %a6, i32 61224 %ins7 = insertelement <16 x i16> %ins6, i16 %a7, i32 71225 %ins8 = insertelement <16 x i16> %ins7, i16 %a0, i32 81226 %ins9 = insertelement <16 x i16> %ins8, i16 %a1, i32 91227 %ins10 = insertelement <16 x i16> %ins9, i16 %a2, i32 101228 %ins11 = insertelement <16 x i16> %ins10, i16 %a3, i32 111229 %ins12 = insertelement <16 x i16> %ins11, i16 %a4, i32 121230 %ins13 = insertelement <16 x i16> %ins12, i16 %a5, i32 131231 %ins14 = insertelement <16 x i16> %ins13, i16 %a6, i32 141232 %ins15 = insertelement <16 x i16> %ins14, i16 %a7, i32 151233 store <16 x i16> %ins15, ptr %dst1234 ret void1235}1236 1237define void @buildvector_v16i16_subseq_4(ptr %dst, i16 %a0, i16 %a1, i16 %a2, i16 %a3) nounwind {1238; CHECK-LABEL: buildvector_v16i16_subseq_4:1239; CHECK: # %bb.0: # %entry1240; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 01241; CHECK-NEXT: vinsgr2vr.h $vr0, $a2, 11242; CHECK-NEXT: vinsgr2vr.h $vr0, $a3, 21243; CHECK-NEXT: vinsgr2vr.h $vr0, $a4, 31244; CHECK-NEXT: xvreplve0.d $xr0, $xr01245; CHECK-NEXT: xvst $xr0, $a0, 01246; CHECK-NEXT: ret1247entry:1248 %ins0 = insertelement <16 x i16> undef, i16 %a0, i32 01249 %ins1 = insertelement <16 x i16> %ins0, i16 %a1, i32 11250 %ins2 = insertelement <16 x i16> %ins1, i16 %a2, i32 21251 %ins3 = insertelement <16 x i16> %ins2, i16 %a3, i32 31252 %ins4 = insertelement <16 x i16> %ins3, i16 %a0, i32 41253 %ins5 = insertelement <16 x i16> %ins4, i16 %a1, i32 51254 %ins6 = insertelement <16 x i16> %ins5, i16 %a2, i32 61255 %ins7 = insertelement <16 x i16> %ins6, i16 %a3, i32 71256 %ins8 = insertelement <16 x i16> %ins7, i16 %a0, i32 81257 %ins9 = insertelement <16 x i16> %ins8, i16 %a1, i32 91258 %ins10 = insertelement <16 x i16> %ins9, i16 %a2, i32 101259 %ins11 = insertelement <16 x i16> %ins10, i16 %a3, i32 111260 %ins12 = insertelement <16 x i16> %ins11, i16 %a0, i32 121261 %ins13 = insertelement <16 x i16> %ins12, i16 %a1, i32 131262 %ins14 = insertelement <16 x i16> %ins13, i16 %a2, i32 141263 %ins15 = insertelement <16 x i16> %ins14, i16 %a3, i32 151264 store <16 x i16> %ins15, ptr %dst1265 ret void1266}1267 1268define void @buildvector_v16i16_subseq_8(ptr %dst, i16 %a0, i16 %a1) nounwind {1269; CHECK-LABEL: buildvector_v16i16_subseq_8:1270; CHECK: # %bb.0: # %entry1271; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 01272; CHECK-NEXT: vinsgr2vr.h $vr0, $a2, 11273; CHECK-NEXT: xvreplve0.w $xr0, $xr01274; CHECK-NEXT: xvst $xr0, $a0, 01275; CHECK-NEXT: ret1276entry:1277 %ins0 = insertelement <16 x i16> undef, i16 %a0, i32 01278 %ins1 = insertelement <16 x i16> %ins0, i16 %a1, i32 11279 %ins2 = insertelement <16 x i16> %ins1, i16 %a0, i32 21280 %ins3 = insertelement <16 x i16> %ins2, i16 %a1, i32 31281 %ins4 = insertelement <16 x i16> %ins3, i16 %a0, i32 41282 %ins5 = insertelement <16 x i16> %ins4, i16 %a1, i32 51283 %ins6 = insertelement <16 x i16> %ins5, i16 %a0, i32 61284 %ins7 = insertelement <16 x i16> %ins6, i16 %a1, i32 71285 %ins8 = insertelement <16 x i16> %ins7, i16 %a0, i32 81286 %ins9 = insertelement <16 x i16> %ins8, i16 %a1, i32 91287 %ins10 = insertelement <16 x i16> %ins9, i16 %a0, i32 101288 %ins11 = insertelement <16 x i16> %ins10, i16 %a1, i32 111289 %ins12 = insertelement <16 x i16> %ins11, i16 %a0, i32 121290 %ins13 = insertelement <16 x i16> %ins12, i16 %a1, i32 131291 %ins14 = insertelement <16 x i16> %ins13, i16 %a0, i32 141292 %ins15 = insertelement <16 x i16> %ins14, i16 %a1, i32 151293 store <16 x i16> %ins15, ptr %dst1294 ret void1295}1296 1297define void @buildvector_v8i32(ptr %dst, i32 %a0, i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, i32 %a6, i32 %a7) nounwind {1298; CHECK-LABEL: buildvector_v8i32:1299; CHECK: # %bb.0: # %entry1300; CHECK-NEXT: ld.w $t0, $sp, 01301; CHECK-NEXT: vinsgr2vr.w $vr0, $a5, 01302; CHECK-NEXT: vinsgr2vr.w $vr0, $a6, 11303; CHECK-NEXT: vinsgr2vr.w $vr0, $a7, 21304; CHECK-NEXT: vinsgr2vr.w $vr0, $t0, 31305; CHECK-NEXT: vinsgr2vr.w $vr1, $a1, 01306; CHECK-NEXT: vinsgr2vr.w $vr1, $a2, 11307; CHECK-NEXT: vinsgr2vr.w $vr1, $a3, 21308; CHECK-NEXT: vinsgr2vr.w $vr1, $a4, 31309; CHECK-NEXT: xvpermi.q $xr1, $xr0, 21310; CHECK-NEXT: xvst $xr1, $a0, 01311; CHECK-NEXT: ret1312entry:1313 %ins0 = insertelement <8 x i32> undef, i32 %a0, i32 01314 %ins1 = insertelement <8 x i32> %ins0, i32 %a1, i32 11315 %ins2 = insertelement <8 x i32> %ins1, i32 %a2, i32 21316 %ins3 = insertelement <8 x i32> %ins2, i32 %a3, i32 31317 %ins4 = insertelement <8 x i32> %ins3, i32 %a4, i32 41318 %ins5 = insertelement <8 x i32> %ins4, i32 %a5, i32 51319 %ins6 = insertelement <8 x i32> %ins5, i32 %a6, i32 61320 %ins7 = insertelement <8 x i32> %ins6, i32 %a7, i32 71321 store <8 x i32> %ins7, ptr %dst1322 ret void1323}1324 1325define void @buildvector_v8i32_partial(ptr %dst, i32 %a2, i32 %a4, i32 %a5, i32 %a6) nounwind {1326; CHECK-LABEL: buildvector_v8i32_partial:1327; CHECK: # %bb.0: # %entry1328; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 21329; CHECK-NEXT: vinsgr2vr.w $vr1, $a2, 01330; CHECK-NEXT: vinsgr2vr.w $vr1, $a3, 11331; CHECK-NEXT: vinsgr2vr.w $vr1, $a4, 21332; CHECK-NEXT: xvpermi.q $xr0, $xr1, 21333; CHECK-NEXT: xvst $xr0, $a0, 01334; CHECK-NEXT: ret1335entry:1336 %ins0 = insertelement <8 x i32> undef, i32 undef, i32 01337 %ins1 = insertelement <8 x i32> %ins0, i32 undef, i32 11338 %ins2 = insertelement <8 x i32> %ins1, i32 %a2, i32 21339 %ins3 = insertelement <8 x i32> %ins2, i32 undef, i32 31340 %ins4 = insertelement <8 x i32> %ins3, i32 %a4, i32 41341 %ins5 = insertelement <8 x i32> %ins4, i32 %a5, i32 51342 %ins6 = insertelement <8 x i32> %ins5, i32 %a6, i32 61343 %ins7 = insertelement <8 x i32> %ins6, i32 undef, i32 71344 store <8 x i32> %ins7, ptr %dst1345 ret void1346}1347 1348define void @buildvector_v8i32_with_constant(ptr %dst, i32 %a2, i32 %a4, i32 %a5, i32 %a6) nounwind {1349; CHECK-LABEL: buildvector_v8i32_with_constant:1350; CHECK: # %bb.0: # %entry1351; CHECK-NEXT: xvrepli.b $xr0, 01352; CHECK-NEXT: xvinsgr2vr.w $xr0, $a1, 21353; CHECK-NEXT: xvinsgr2vr.w $xr0, $a2, 41354; CHECK-NEXT: xvinsgr2vr.w $xr0, $a3, 51355; CHECK-NEXT: xvinsgr2vr.w $xr0, $a4, 61356; CHECK-NEXT: xvst $xr0, $a0, 01357; CHECK-NEXT: ret1358entry:1359 %ins0 = insertelement <8 x i32> undef, i32 0, i32 01360 %ins1 = insertelement <8 x i32> %ins0, i32 0, i32 11361 %ins2 = insertelement <8 x i32> %ins1, i32 %a2, i32 21362 %ins3 = insertelement <8 x i32> %ins2, i32 0, i32 31363 %ins4 = insertelement <8 x i32> %ins3, i32 %a4, i32 41364 %ins5 = insertelement <8 x i32> %ins4, i32 %a5, i32 51365 %ins6 = insertelement <8 x i32> %ins5, i32 %a6, i32 61366 %ins7 = insertelement <8 x i32> %ins6, i32 0, i32 71367 store <8 x i32> %ins7, ptr %dst1368 ret void1369}1370 1371define void @buildvector_v8i32_subseq_2(ptr %dst, i32 %a0, i32 %a1, i32 %a2, i32 %a3) nounwind {1372; CHECK-LABEL: buildvector_v8i32_subseq_2:1373; CHECK: # %bb.0: # %entry1374; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 01375; CHECK-NEXT: vinsgr2vr.w $vr0, $a2, 11376; CHECK-NEXT: vinsgr2vr.w $vr0, $a3, 21377; CHECK-NEXT: vinsgr2vr.w $vr0, $a4, 31378; CHECK-NEXT: xvreplve0.q $xr0, $xr01379; CHECK-NEXT: xvst $xr0, $a0, 01380; CHECK-NEXT: ret1381entry:1382 %ins0 = insertelement <8 x i32> undef, i32 %a0, i32 01383 %ins1 = insertelement <8 x i32> %ins0, i32 %a1, i32 11384 %ins2 = insertelement <8 x i32> %ins1, i32 %a2, i32 21385 %ins3 = insertelement <8 x i32> %ins2, i32 %a3, i32 31386 %ins4 = insertelement <8 x i32> %ins3, i32 %a0, i32 41387 %ins5 = insertelement <8 x i32> %ins4, i32 %a1, i32 51388 %ins6 = insertelement <8 x i32> %ins5, i32 %a2, i32 61389 %ins7 = insertelement <8 x i32> %ins6, i32 %a3, i32 71390 store <8 x i32> %ins7, ptr %dst1391 ret void1392}1393 1394define void @buildvector_v8i32_subseq_4(ptr %dst, i32 %a0, i32 %a1) nounwind {1395; CHECK-LABEL: buildvector_v8i32_subseq_4:1396; CHECK: # %bb.0: # %entry1397; CHECK-NEXT: vinsgr2vr.w $vr0, $a1, 01398; CHECK-NEXT: vinsgr2vr.w $vr0, $a2, 11399; CHECK-NEXT: xvreplve0.d $xr0, $xr01400; CHECK-NEXT: xvst $xr0, $a0, 01401; CHECK-NEXT: ret1402entry:1403 %ins0 = insertelement <8 x i32> undef, i32 %a0, i32 01404 %ins1 = insertelement <8 x i32> %ins0, i32 %a1, i32 11405 %ins2 = insertelement <8 x i32> %ins1, i32 %a0, i32 21406 %ins3 = insertelement <8 x i32> %ins2, i32 %a1, i32 31407 %ins4 = insertelement <8 x i32> %ins3, i32 %a0, i32 41408 %ins5 = insertelement <8 x i32> %ins4, i32 %a1, i32 51409 %ins6 = insertelement <8 x i32> %ins5, i32 %a0, i32 61410 %ins7 = insertelement <8 x i32> %ins6, i32 %a1, i32 71411 store <8 x i32> %ins7, ptr %dst1412 ret void1413}1414 1415define void @buildvector_v4i64(ptr %dst, i64 %a0, i64 %a1, i64 %a2, i64 %a3) nounwind {1416; LA32-LABEL: buildvector_v4i64:1417; LA32: # %bb.0: # %entry1418; LA32-NEXT: ld.w $t0, $sp, 01419; LA32-NEXT: vinsgr2vr.w $vr0, $a5, 01420; LA32-NEXT: vinsgr2vr.w $vr0, $a6, 11421; LA32-NEXT: vinsgr2vr.w $vr0, $a7, 21422; LA32-NEXT: vinsgr2vr.w $vr0, $t0, 31423; LA32-NEXT: vinsgr2vr.w $vr1, $a1, 01424; LA32-NEXT: vinsgr2vr.w $vr1, $a2, 11425; LA32-NEXT: vinsgr2vr.w $vr1, $a3, 21426; LA32-NEXT: vinsgr2vr.w $vr1, $a4, 31427; LA32-NEXT: xvpermi.q $xr1, $xr0, 21428; LA32-NEXT: xvst $xr1, $a0, 01429; LA32-NEXT: ret1430;1431; LA64-LABEL: buildvector_v4i64:1432; LA64: # %bb.0: # %entry1433; LA64-NEXT: vinsgr2vr.d $vr0, $a3, 01434; LA64-NEXT: vinsgr2vr.d $vr0, $a4, 11435; LA64-NEXT: vinsgr2vr.d $vr1, $a1, 01436; LA64-NEXT: vinsgr2vr.d $vr1, $a2, 11437; LA64-NEXT: xvpermi.q $xr1, $xr0, 21438; LA64-NEXT: xvst $xr1, $a0, 01439; LA64-NEXT: ret1440entry:1441 %ins0 = insertelement <4 x i64> undef, i64 %a0, i32 01442 %ins1 = insertelement <4 x i64> %ins0, i64 %a1, i32 11443 %ins2 = insertelement <4 x i64> %ins1, i64 %a2, i32 21444 %ins3 = insertelement <4 x i64> %ins2, i64 %a3, i32 31445 store <4 x i64> %ins3, ptr %dst1446 ret void1447}1448 1449define void @buildvector_v4i64_partial(ptr %dst, i64 %a1, i64 %a2) nounwind {1450; LA32-LABEL: buildvector_v4i64_partial:1451; LA32: # %bb.0: # %entry1452; LA32-NEXT: vinsgr2vr.w $vr0, $a3, 01453; LA32-NEXT: vinsgr2vr.w $vr0, $a4, 11454; LA32-NEXT: vinsgr2vr.w $vr1, $a1, 21455; LA32-NEXT: vinsgr2vr.w $vr1, $a2, 31456; LA32-NEXT: xvpermi.q $xr1, $xr0, 21457; LA32-NEXT: xvst $xr1, $a0, 01458; LA32-NEXT: ret1459;1460; LA64-LABEL: buildvector_v4i64_partial:1461; LA64: # %bb.0: # %entry1462; LA64-NEXT: xvinsgr2vr.d $xr0, $a1, 11463; LA64-NEXT: xvinsgr2vr.d $xr0, $a2, 21464; LA64-NEXT: xvst $xr0, $a0, 01465; LA64-NEXT: ret1466entry:1467 %ins0 = insertelement <4 x i64> undef, i64 undef, i32 01468 %ins1 = insertelement <4 x i64> %ins0, i64 %a1, i32 11469 %ins2 = insertelement <4 x i64> %ins1, i64 %a2, i32 21470 %ins3 = insertelement <4 x i64> %ins2, i64 undef, i32 31471 store <4 x i64> %ins3, ptr %dst1472 ret void1473}1474 1475define void @buildvector_v4i64_with_constant(ptr %dst, i64 %a0, i64 %a2) nounwind {1476; LA32-LABEL: buildvector_v4i64_with_constant:1477; LA32: # %bb.0: # %entry1478; LA32-NEXT: xvrepli.b $xr0, 01479; LA32-NEXT: xvinsgr2vr.w $xr0, $a1, 01480; LA32-NEXT: xvinsgr2vr.w $xr0, $a2, 11481; LA32-NEXT: xvinsgr2vr.w $xr0, $a3, 41482; LA32-NEXT: xvinsgr2vr.w $xr0, $a4, 51483; LA32-NEXT: xvst $xr0, $a0, 01484; LA32-NEXT: ret1485;1486; LA64-LABEL: buildvector_v4i64_with_constant:1487; LA64: # %bb.0: # %entry1488; LA64-NEXT: xvrepli.b $xr0, 01489; LA64-NEXT: xvinsgr2vr.d $xr0, $a1, 01490; LA64-NEXT: xvinsgr2vr.d $xr0, $a2, 21491; LA64-NEXT: xvst $xr0, $a0, 01492; LA64-NEXT: ret1493entry:1494 %ins0 = insertelement <4 x i64> undef, i64 %a0, i32 01495 %ins1 = insertelement <4 x i64> %ins0, i64 0, i32 11496 %ins2 = insertelement <4 x i64> %ins1, i64 %a2, i32 21497 %ins3 = insertelement <4 x i64> %ins2, i64 0, i32 31498 store <4 x i64> %ins3, ptr %dst1499 ret void1500}1501 1502define void @buildvector_v4i64_subseq_2(ptr %dst, i64 %a0, i64 %a1) nounwind {1503; LA32-LABEL: buildvector_v4i64_subseq_2:1504; LA32: # %bb.0: # %entry1505; LA32-NEXT: vinsgr2vr.w $vr0, $a1, 01506; LA32-NEXT: vinsgr2vr.w $vr0, $a2, 11507; LA32-NEXT: vinsgr2vr.w $vr0, $a3, 21508; LA32-NEXT: vinsgr2vr.w $vr0, $a4, 31509; LA32-NEXT: xvreplve0.q $xr0, $xr01510; LA32-NEXT: xvst $xr0, $a0, 01511; LA32-NEXT: ret1512;1513; LA64-LABEL: buildvector_v4i64_subseq_2:1514; LA64: # %bb.0: # %entry1515; LA64-NEXT: vinsgr2vr.d $vr0, $a1, 01516; LA64-NEXT: vinsgr2vr.d $vr0, $a2, 11517; LA64-NEXT: xvreplve0.q $xr0, $xr01518; LA64-NEXT: xvst $xr0, $a0, 01519; LA64-NEXT: ret1520entry:1521 %ins0 = insertelement <4 x i64> undef, i64 %a0, i32 01522 %ins1 = insertelement <4 x i64> %ins0, i64 %a1, i32 11523 %ins2 = insertelement <4 x i64> %ins1, i64 %a0, i32 21524 %ins3 = insertelement <4 x i64> %ins2, i64 %a1, i32 31525 store <4 x i64> %ins3, ptr %dst1526 ret void1527}1528 1529define void @buildvector_v8f32(ptr %dst, float %a0, float %a1, float %a2, float %a3, float %a4, float %a5, float %a6, float %a7) nounwind {1530; CHECK-LABEL: buildvector_v8f32:1531; CHECK: # %bb.0: # %entry1532; CHECK-NEXT: # kill: def $f7 killed $f7 def $vr71533; CHECK-NEXT: # kill: def $f6 killed $f6 def $vr61534; CHECK-NEXT: # kill: def $f5 killed $f5 def $vr51535; CHECK-NEXT: # kill: def $f4 killed $f4 def $xr41536; CHECK-NEXT: # kill: def $f3 killed $f3 def $vr31537; CHECK-NEXT: # kill: def $f2 killed $f2 def $vr21538; CHECK-NEXT: # kill: def $f1 killed $f1 def $vr11539; CHECK-NEXT: # kill: def $f0 killed $f0 def $xr01540; CHECK-NEXT: vextrins.w $vr4, $vr5, 161541; CHECK-NEXT: vextrins.w $vr4, $vr6, 321542; CHECK-NEXT: vextrins.w $vr4, $vr7, 481543; CHECK-NEXT: vextrins.w $vr0, $vr1, 161544; CHECK-NEXT: vextrins.w $vr0, $vr2, 321545; CHECK-NEXT: vextrins.w $vr0, $vr3, 481546; CHECK-NEXT: xvpermi.q $xr0, $xr4, 21547; CHECK-NEXT: xvst $xr0, $a0, 01548; CHECK-NEXT: ret1549entry:1550 %ins0 = insertelement <8 x float> undef, float %a0, i32 01551 %ins1 = insertelement <8 x float> %ins0, float %a1, i32 11552 %ins2 = insertelement <8 x float> %ins1, float %a2, i32 21553 %ins3 = insertelement <8 x float> %ins2, float %a3, i32 31554 %ins4 = insertelement <8 x float> %ins3, float %a4, i32 41555 %ins5 = insertelement <8 x float> %ins4, float %a5, i32 51556 %ins6 = insertelement <8 x float> %ins5, float %a6, i32 61557 %ins7 = insertelement <8 x float> %ins6, float %a7, i32 71558 store <8 x float> %ins7, ptr %dst1559 ret void1560}1561 1562define void @buildvector_v8f32_partial(ptr %dst, float %a1, float %a2, float %a5, float %a7) nounwind {1563; CHECK-LABEL: buildvector_v8f32_partial:1564; CHECK: # %bb.0: # %entry1565; CHECK-NEXT: # kill: def $f3 killed $f3 def $vr31566; CHECK-NEXT: # kill: def $f2 killed $f2 def $vr21567; CHECK-NEXT: # kill: def $f1 killed $f1 def $vr11568; CHECK-NEXT: # kill: def $f0 killed $f0 def $vr01569; CHECK-NEXT: vextrins.w $vr2, $vr2, 161570; CHECK-NEXT: vextrins.w $vr2, $vr3, 481571; CHECK-NEXT: vextrins.w $vr0, $vr0, 161572; CHECK-NEXT: vextrins.w $vr0, $vr1, 321573; CHECK-NEXT: xvpermi.q $xr0, $xr2, 21574; CHECK-NEXT: xvst $xr0, $a0, 01575; CHECK-NEXT: ret1576entry:1577 %ins0 = insertelement <8 x float> undef, float undef, i32 01578 %ins1 = insertelement <8 x float> %ins0, float %a1, i32 11579 %ins2 = insertelement <8 x float> %ins1, float %a2, i32 21580 %ins3 = insertelement <8 x float> %ins2, float undef, i32 31581 %ins4 = insertelement <8 x float> %ins3, float undef, i32 41582 %ins5 = insertelement <8 x float> %ins4, float %a5, i32 51583 %ins6 = insertelement <8 x float> %ins5, float undef, i32 61584 %ins7 = insertelement <8 x float> %ins6, float %a7, i32 71585 store <8 x float> %ins7, ptr %dst1586 ret void1587}1588 1589define void @buildvector_v8f32_with_constant(ptr %dst, float %a1, float %a2, float %a5, float %a7) nounwind {1590; CHECK-LABEL: buildvector_v8f32_with_constant:1591; CHECK: # %bb.0: # %entry1592; CHECK-NEXT: # kill: def $f3 killed $f3 def $xr31593; CHECK-NEXT: # kill: def $f2 killed $f2 def $xr21594; CHECK-NEXT: # kill: def $f1 killed $f1 def $xr11595; CHECK-NEXT: # kill: def $f0 killed $f0 def $xr01596; CHECK-NEXT: xvldi $xr4, -32641597; CHECK-NEXT: xvinsve0.w $xr4, $xr0, 11598; CHECK-NEXT: xvinsve0.w $xr4, $xr1, 21599; CHECK-NEXT: xvinsve0.w $xr4, $xr2, 51600; CHECK-NEXT: xvinsve0.w $xr4, $xr3, 71601; CHECK-NEXT: xvst $xr4, $a0, 01602; CHECK-NEXT: ret1603entry:1604 %ins0 = insertelement <8 x float> undef, float 2.0, i32 01605 %ins1 = insertelement <8 x float> %ins0, float %a1, i32 11606 %ins2 = insertelement <8 x float> %ins1, float %a2, i32 21607 %ins3 = insertelement <8 x float> %ins2, float 2.0, i32 31608 %ins4 = insertelement <8 x float> %ins3, float 2.0, i32 41609 %ins5 = insertelement <8 x float> %ins4, float %a5, i32 51610 %ins6 = insertelement <8 x float> %ins5, float 2.0, i32 61611 %ins7 = insertelement <8 x float> %ins6, float %a7, i32 71612 store <8 x float> %ins7, ptr %dst1613 ret void1614}1615 1616define void @buildvector_v8f32_subseq_2(ptr %dst, float %a0, float %a1, float %a2, float %a3) nounwind {1617; CHECK-LABEL: buildvector_v8f32_subseq_2:1618; CHECK: # %bb.0: # %entry1619; CHECK-NEXT: # kill: def $f3 killed $f3 def $vr31620; CHECK-NEXT: # kill: def $f2 killed $f2 def $vr21621; CHECK-NEXT: # kill: def $f1 killed $f1 def $vr11622; CHECK-NEXT: # kill: def $f0 killed $f0 def $xr01623; CHECK-NEXT: vextrins.w $vr0, $vr1, 161624; CHECK-NEXT: vextrins.w $vr0, $vr2, 321625; CHECK-NEXT: vextrins.w $vr0, $vr3, 481626; CHECK-NEXT: xvreplve0.q $xr0, $xr01627; CHECK-NEXT: xvst $xr0, $a0, 01628; CHECK-NEXT: ret1629entry:1630 %ins0 = insertelement <8 x float> undef, float %a0, i32 01631 %ins1 = insertelement <8 x float> %ins0, float %a1, i32 11632 %ins2 = insertelement <8 x float> %ins1, float %a2, i32 21633 %ins3 = insertelement <8 x float> %ins2, float %a3, i32 31634 %ins4 = insertelement <8 x float> %ins3, float %a0, i32 41635 %ins5 = insertelement <8 x float> %ins4, float %a1, i32 51636 %ins6 = insertelement <8 x float> %ins5, float %a2, i32 61637 %ins7 = insertelement <8 x float> %ins6, float %a3, i32 71638 store <8 x float> %ins7, ptr %dst1639 ret void1640}1641 1642define void @buildvector_v8f32_subseq_4(ptr %dst, float %a0, float %a1) nounwind {1643; CHECK-LABEL: buildvector_v8f32_subseq_4:1644; CHECK: # %bb.0: # %entry1645; CHECK-NEXT: # kill: def $f1 killed $f1 def $vr11646; CHECK-NEXT: # kill: def $f0 killed $f0 def $xr01647; CHECK-NEXT: vextrins.w $vr0, $vr1, 161648; CHECK-NEXT: xvreplve0.d $xr0, $xr01649; CHECK-NEXT: xvst $xr0, $a0, 01650; CHECK-NEXT: ret1651entry:1652 %ins0 = insertelement <8 x float> undef, float %a0, i32 01653 %ins1 = insertelement <8 x float> %ins0, float %a1, i32 11654 %ins2 = insertelement <8 x float> %ins1, float %a0, i32 21655 %ins3 = insertelement <8 x float> %ins2, float %a1, i32 31656 %ins4 = insertelement <8 x float> %ins3, float %a0, i32 41657 %ins5 = insertelement <8 x float> %ins4, float %a1, i32 51658 %ins6 = insertelement <8 x float> %ins5, float %a0, i32 61659 %ins7 = insertelement <8 x float> %ins6, float %a1, i32 71660 store <8 x float> %ins7, ptr %dst1661 ret void1662}1663 1664define void @buildvector_v4f64(ptr %dst, double %a0, double %a1, double %a2, double %a3) nounwind {1665; CHECK-LABEL: buildvector_v4f64:1666; CHECK: # %bb.0: # %entry1667; CHECK-NEXT: # kill: def $f3_64 killed $f3_64 def $vr31668; CHECK-NEXT: # kill: def $f2_64 killed $f2_64 def $xr21669; CHECK-NEXT: # kill: def $f1_64 killed $f1_64 def $vr11670; CHECK-NEXT: # kill: def $f0_64 killed $f0_64 def $xr01671; CHECK-NEXT: vextrins.d $vr2, $vr3, 161672; CHECK-NEXT: vextrins.d $vr0, $vr1, 161673; CHECK-NEXT: xvpermi.q $xr0, $xr2, 21674; CHECK-NEXT: xvst $xr0, $a0, 01675; CHECK-NEXT: ret1676entry:1677 %ins0 = insertelement <4 x double> undef, double %a0, i32 01678 %ins1 = insertelement <4 x double> %ins0, double %a1, i32 11679 %ins2 = insertelement <4 x double> %ins1, double %a2, i32 21680 %ins3 = insertelement <4 x double> %ins2, double %a3, i32 31681 store <4 x double> %ins3, ptr %dst1682 ret void1683}1684 1685define void @buildvector_v4f64_partial(ptr %dst, double %a0, double %a3) nounwind {1686; CHECK-LABEL: buildvector_v4f64_partial:1687; CHECK: # %bb.0: # %entry1688; CHECK-NEXT: # kill: def $f1_64 killed $f1_64 def $xr11689; CHECK-NEXT: # kill: def $f0_64 killed $f0_64 def $xr01690; CHECK-NEXT: xvinsve0.d $xr0, $xr1, 31691; CHECK-NEXT: xvst $xr0, $a0, 01692; CHECK-NEXT: ret1693entry:1694 %ins0 = insertelement <4 x double> undef, double %a0, i32 01695 %ins1 = insertelement <4 x double> %ins0, double undef, i32 11696 %ins2 = insertelement <4 x double> %ins1, double undef, i32 21697 %ins3 = insertelement <4 x double> %ins2, double %a3, i32 31698 store <4 x double> %ins3, ptr %dst1699 ret void1700}1701 1702define void @buildvector_v4f64_with_constant(ptr %dst, double %a0, double %a3) nounwind {1703; CHECK-LABEL: buildvector_v4f64_with_constant:1704; CHECK: # %bb.0: # %entry1705; CHECK-NEXT: # kill: def $f1_64 killed $f1_64 def $xr11706; CHECK-NEXT: # kill: def $f0_64 killed $f0_64 def $xr01707; CHECK-NEXT: xvrepli.b $xr2, 01708; CHECK-NEXT: xvinsve0.d $xr2, $xr0, 01709; CHECK-NEXT: xvinsve0.d $xr2, $xr1, 31710; CHECK-NEXT: xvst $xr2, $a0, 01711; CHECK-NEXT: ret1712entry:1713 %ins0 = insertelement <4 x double> undef, double %a0, i32 01714 %ins1 = insertelement <4 x double> %ins0, double 0.0, i32 11715 %ins2 = insertelement <4 x double> %ins1, double 0.0, i32 21716 %ins3 = insertelement <4 x double> %ins2, double %a3, i32 31717 store <4 x double> %ins3, ptr %dst1718 ret void1719}1720 1721define void @buildvector_v4f64_subseq_2(ptr %dst, double %a0, double %a1) nounwind {1722; CHECK-LABEL: buildvector_v4f64_subseq_2:1723; CHECK: # %bb.0: # %entry1724; CHECK-NEXT: # kill: def $f1_64 killed $f1_64 def $vr11725; CHECK-NEXT: # kill: def $f0_64 killed $f0_64 def $xr01726; CHECK-NEXT: vextrins.d $vr0, $vr1, 161727; CHECK-NEXT: xvreplve0.q $xr0, $xr01728; CHECK-NEXT: xvst $xr0, $a0, 01729; CHECK-NEXT: ret1730entry:1731 %ins0 = insertelement <4 x double> undef, double %a0, i32 01732 %ins1 = insertelement <4 x double> %ins0, double %a1, i32 11733 %ins2 = insertelement <4 x double> %ins1, double %a0, i32 21734 %ins3 = insertelement <4 x double> %ins2, double %a1, i32 31735 store <4 x double> %ins3, ptr %dst1736 ret void1737}1738