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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s3; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s4 5declare i32 @llvm.loongarch.lasx.xvpickve2gr.w(<8 x i32>, i32)6 7define i32 @lasx_xvpickve2gr_w(<8 x i32> %va) nounwind {8; CHECK-LABEL: lasx_xvpickve2gr_w:9; CHECK: # %bb.0: # %entry10; CHECK-NEXT: xvpickve2gr.w $a0, $xr0, 111; CHECK-NEXT: ret12entry:13 %res = call i32 @llvm.loongarch.lasx.xvpickve2gr.w(<8 x i32> %va, i32 1)14 ret i32 %res15}16 17declare i32 @llvm.loongarch.lasx.xvpickve2gr.wu(<8 x i32>, i32)18 19define i32 @lasx_xvpickve2gr_wu(<8 x i32> %va) nounwind {20; CHECK-LABEL: lasx_xvpickve2gr_wu:21; CHECK: # %bb.0: # %entry22; CHECK-NEXT: xvpickve2gr.wu $a0, $xr0, 123; CHECK-NEXT: ret24entry:25 %res = call i32 @llvm.loongarch.lasx.xvpickve2gr.wu(<8 x i32> %va, i32 1)26 ret i32 %res27}28