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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s3; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s4 5declare <32 x i8> @llvm.loongarch.lasx.xvrepl128vei.b(<32 x i8>, i32)6 7define <32 x i8> @lasx_xvrepl128vei_b(<32 x i8> %va) nounwind {8; CHECK-LABEL: lasx_xvrepl128vei_b:9; CHECK: # %bb.0: # %entry10; CHECK-NEXT: xvrepl128vei.b $xr0, $xr0, 111; CHECK-NEXT: ret12entry:13 %res = call <32 x i8> @llvm.loongarch.lasx.xvrepl128vei.b(<32 x i8> %va, i32 1)14 ret <32 x i8> %res15}16 17declare <16 x i16> @llvm.loongarch.lasx.xvrepl128vei.h(<16 x i16>, i32)18 19define <16 x i16> @lasx_xvrepl128vei_h(<16 x i16> %va) nounwind {20; CHECK-LABEL: lasx_xvrepl128vei_h:21; CHECK: # %bb.0: # %entry22; CHECK-NEXT: xvrepl128vei.h $xr0, $xr0, 123; CHECK-NEXT: ret24entry:25 %res = call <16 x i16> @llvm.loongarch.lasx.xvrepl128vei.h(<16 x i16> %va, i32 1)26 ret <16 x i16> %res27}28 29declare <8 x i32> @llvm.loongarch.lasx.xvrepl128vei.w(<8 x i32>, i32)30 31define <8 x i32> @lasx_xvrepl128vei_w(<8 x i32> %va) nounwind {32; CHECK-LABEL: lasx_xvrepl128vei_w:33; CHECK: # %bb.0: # %entry34; CHECK-NEXT: xvrepl128vei.w $xr0, $xr0, 135; CHECK-NEXT: ret36entry:37 %res = call <8 x i32> @llvm.loongarch.lasx.xvrepl128vei.w(<8 x i32> %va, i32 1)38 ret <8 x i32> %res39}40 41declare <4 x i64> @llvm.loongarch.lasx.xvrepl128vei.d(<4 x i64>, i32)42 43define <4 x i64> @lasx_xvrepl128vei_d(<4 x i64> %va) nounwind {44; CHECK-LABEL: lasx_xvrepl128vei_d:45; CHECK: # %bb.0: # %entry46; CHECK-NEXT: xvrepl128vei.d $xr0, $xr0, 147; CHECK-NEXT: ret48entry:49 %res = call <4 x i64> @llvm.loongarch.lasx.xvrepl128vei.d(<4 x i64> %va, i32 1)50 ret <4 x i64> %res51}52