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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 62; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s3; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s4 5define void @xvavg_b(ptr %res, ptr %a, ptr %b) nounwind {6; CHECK-LABEL: xvavg_b:7; CHECK: # %bb.0: # %entry8; CHECK-NEXT: xvld $xr0, $a1, 09; CHECK-NEXT: xvld $xr1, $a2, 010; CHECK-NEXT: xvand.v $xr2, $xr0, $xr111; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr112; CHECK-NEXT: xvsrai.b $xr0, $xr0, 113; CHECK-NEXT: xvadd.b $xr0, $xr2, $xr014; CHECK-NEXT: xvst $xr0, $a0, 015; CHECK-NEXT: ret16entry:17 %va = load <32 x i8>, ptr %a18 %vb = load <32 x i8>, ptr %b19 %ea = sext <32 x i8> %va to <32 x i16>20 %eb = sext <32 x i8> %vb to <32 x i16>21 %add = add <32 x i16> %ea, %eb22 %shr = lshr <32 x i16> %add, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>23 %r = trunc <32 x i16> %shr to <32 x i8>24 store <32 x i8> %r, ptr %res25 ret void26}27 28define void @xvavg_h(ptr %res, ptr %a, ptr %b) nounwind {29; CHECK-LABEL: xvavg_h:30; CHECK: # %bb.0: # %entry31; CHECK-NEXT: xvld $xr0, $a1, 032; CHECK-NEXT: xvld $xr1, $a2, 033; CHECK-NEXT: xvand.v $xr2, $xr0, $xr134; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr135; CHECK-NEXT: xvsrai.h $xr0, $xr0, 136; CHECK-NEXT: xvadd.h $xr0, $xr2, $xr037; CHECK-NEXT: xvst $xr0, $a0, 038; CHECK-NEXT: ret39entry:40 %va = load <16 x i16>, ptr %a41 %vb = load <16 x i16>, ptr %b42 %ea = sext <16 x i16> %va to <16 x i32>43 %eb = sext <16 x i16> %vb to <16 x i32>44 %add = add <16 x i32> %ea, %eb45 %shr = lshr <16 x i32> %add, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>46 %r = trunc <16 x i32> %shr to <16 x i16>47 store <16 x i16> %r, ptr %res48 ret void49}50 51define void @xvavg_w(ptr %res, ptr %a, ptr %b) nounwind {52; CHECK-LABEL: xvavg_w:53; CHECK: # %bb.0: # %entry54; CHECK-NEXT: xvld $xr0, $a1, 055; CHECK-NEXT: xvld $xr1, $a2, 056; CHECK-NEXT: xvand.v $xr2, $xr0, $xr157; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr158; CHECK-NEXT: xvsrai.w $xr0, $xr0, 159; CHECK-NEXT: xvadd.w $xr0, $xr2, $xr060; CHECK-NEXT: xvst $xr0, $a0, 061; CHECK-NEXT: ret62entry:63 %va = load <8 x i32>, ptr %a64 %vb = load <8 x i32>, ptr %b65 %ea = sext <8 x i32> %va to <8 x i64>66 %eb = sext <8 x i32> %vb to <8 x i64>67 %add = add <8 x i64> %ea, %eb68 %shr = lshr <8 x i64> %add, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>69 %r = trunc <8 x i64> %shr to <8 x i32>70 store <8 x i32> %r, ptr %res71 ret void72}73 74define void @xvavg_d(ptr %res, ptr %a, ptr %b) nounwind {75; CHECK-LABEL: xvavg_d:76; CHECK: # %bb.0: # %entry77; CHECK-NEXT: xvld $xr0, $a1, 078; CHECK-NEXT: xvld $xr1, $a2, 079; CHECK-NEXT: xvand.v $xr2, $xr0, $xr180; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr181; CHECK-NEXT: xvsrai.d $xr0, $xr0, 182; CHECK-NEXT: xvadd.d $xr0, $xr2, $xr083; CHECK-NEXT: xvst $xr0, $a0, 084; CHECK-NEXT: ret85entry:86 %va = load <4 x i64>, ptr %a87 %vb = load <4 x i64>, ptr %b88 %ea = sext <4 x i64> %va to <4 x i128>89 %eb = sext <4 x i64> %vb to <4 x i128>90 %add = add <4 x i128> %ea, %eb91 %shr = lshr <4 x i128> %add, <i128 1, i128 1, i128 1, i128 1>92 %r = trunc <4 x i128> %shr to <4 x i64>93 store <4 x i64> %r, ptr %res94 ret void95}96 97define void @xvavg_bu(ptr %res, ptr %a, ptr %b) nounwind {98; CHECK-LABEL: xvavg_bu:99; CHECK: # %bb.0: # %entry100; CHECK-NEXT: xvld $xr0, $a1, 0101; CHECK-NEXT: xvld $xr1, $a2, 0102; CHECK-NEXT: xvand.v $xr2, $xr0, $xr1103; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1104; CHECK-NEXT: xvsrli.b $xr0, $xr0, 1105; CHECK-NEXT: xvadd.b $xr0, $xr2, $xr0106; CHECK-NEXT: xvst $xr0, $a0, 0107; CHECK-NEXT: ret108entry:109 %va = load <32 x i8>, ptr %a110 %vb = load <32 x i8>, ptr %b111 %ea = zext <32 x i8> %va to <32 x i16>112 %eb = zext <32 x i8> %vb to <32 x i16>113 %add = add <32 x i16> %ea, %eb114 %shr = lshr <32 x i16> %add, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>115 %r = trunc <32 x i16> %shr to <32 x i8>116 store <32 x i8> %r, ptr %res117 ret void118}119 120define void @xvavg_hu(ptr %res, ptr %a, ptr %b) nounwind {121; CHECK-LABEL: xvavg_hu:122; CHECK: # %bb.0: # %entry123; CHECK-NEXT: xvld $xr0, $a1, 0124; CHECK-NEXT: xvld $xr1, $a2, 0125; CHECK-NEXT: xvand.v $xr2, $xr0, $xr1126; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1127; CHECK-NEXT: xvsrli.h $xr0, $xr0, 1128; CHECK-NEXT: xvadd.h $xr0, $xr2, $xr0129; CHECK-NEXT: xvst $xr0, $a0, 0130; CHECK-NEXT: ret131entry:132 %va = load <16 x i16>, ptr %a133 %vb = load <16 x i16>, ptr %b134 %ea = zext <16 x i16> %va to <16 x i32>135 %eb = zext <16 x i16> %vb to <16 x i32>136 %add = add <16 x i32> %ea, %eb137 %shr = lshr <16 x i32> %add, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>138 %r = trunc <16 x i32> %shr to <16 x i16>139 store <16 x i16> %r, ptr %res140 ret void141}142 143define void @xvavg_wu(ptr %res, ptr %a, ptr %b) nounwind {144; CHECK-LABEL: xvavg_wu:145; CHECK: # %bb.0: # %entry146; CHECK-NEXT: xvld $xr0, $a1, 0147; CHECK-NEXT: xvld $xr1, $a2, 0148; CHECK-NEXT: xvand.v $xr2, $xr0, $xr1149; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1150; CHECK-NEXT: xvsrli.w $xr0, $xr0, 1151; CHECK-NEXT: xvadd.w $xr0, $xr2, $xr0152; CHECK-NEXT: xvst $xr0, $a0, 0153; CHECK-NEXT: ret154entry:155 %va = load <8 x i32>, ptr %a156 %vb = load <8 x i32>, ptr %b157 %ea = zext <8 x i32> %va to <8 x i64>158 %eb = zext <8 x i32> %vb to <8 x i64>159 %add = add <8 x i64> %ea, %eb160 %shr = lshr <8 x i64> %add, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>161 %r = trunc <8 x i64> %shr to <8 x i32>162 store <8 x i32> %r, ptr %res163 ret void164}165 166define void @xvavg_du(ptr %res, ptr %a, ptr %b) nounwind {167; CHECK-LABEL: xvavg_du:168; CHECK: # %bb.0: # %entry169; CHECK-NEXT: xvld $xr0, $a1, 0170; CHECK-NEXT: xvld $xr1, $a2, 0171; CHECK-NEXT: xvand.v $xr2, $xr0, $xr1172; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1173; CHECK-NEXT: xvsrli.d $xr0, $xr0, 1174; CHECK-NEXT: xvadd.d $xr0, $xr2, $xr0175; CHECK-NEXT: xvst $xr0, $a0, 0176; CHECK-NEXT: ret177entry:178 %va = load <4 x i64>, ptr %a179 %vb = load <4 x i64>, ptr %b180 %ea = zext <4 x i64> %va to <4 x i128>181 %eb = zext <4 x i64> %vb to <4 x i128>182 %add = add <4 x i128> %ea, %eb183 %shr = lshr <4 x i128> %add, <i128 1, i128 1, i128 1, i128 1>184 %r = trunc <4 x i128> %shr to <4 x i64>185 store <4 x i64> %r, ptr %res186 ret void187}188 189define void @xvavgr_b(ptr %res, ptr %a, ptr %b) nounwind {190; CHECK-LABEL: xvavgr_b:191; CHECK: # %bb.0: # %entry192; CHECK-NEXT: xvld $xr0, $a1, 0193; CHECK-NEXT: xvld $xr1, $a2, 0194; CHECK-NEXT: xvor.v $xr2, $xr0, $xr1195; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1196; CHECK-NEXT: xvsrai.b $xr0, $xr0, 1197; CHECK-NEXT: xvsub.b $xr0, $xr2, $xr0198; CHECK-NEXT: xvst $xr0, $a0, 0199; CHECK-NEXT: ret200entry:201 %va = load <32 x i8>, ptr %a202 %vb = load <32 x i8>, ptr %b203 %ea = sext <32 x i8> %va to <32 x i16>204 %eb = sext <32 x i8> %vb to <32 x i16>205 %add = add <32 x i16> %ea, %eb206 %add1 = add <32 x i16> %add, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>207 %shr = lshr <32 x i16> %add1, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>208 %r = trunc <32 x i16> %shr to <32 x i8>209 store <32 x i8> %r, ptr %res210 ret void211}212 213define void @xvavgr_h(ptr %res, ptr %a, ptr %b) nounwind {214; CHECK-LABEL: xvavgr_h:215; CHECK: # %bb.0: # %entry216; CHECK-NEXT: xvld $xr0, $a1, 0217; CHECK-NEXT: xvld $xr1, $a2, 0218; CHECK-NEXT: xvor.v $xr2, $xr0, $xr1219; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1220; CHECK-NEXT: xvsrai.h $xr0, $xr0, 1221; CHECK-NEXT: xvsub.h $xr0, $xr2, $xr0222; CHECK-NEXT: xvst $xr0, $a0, 0223; CHECK-NEXT: ret224entry:225 %va = load <16 x i16>, ptr %a226 %vb = load <16 x i16>, ptr %b227 %ea = sext <16 x i16> %va to <16 x i32>228 %eb = sext <16 x i16> %vb to <16 x i32>229 %add = add <16 x i32> %ea, %eb230 %add1 = add <16 x i32> %add, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>231 %shr = lshr <16 x i32> %add1, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>232 %r = trunc <16 x i32> %shr to <16 x i16>233 store <16 x i16> %r, ptr %res234 ret void235}236 237define void @xvavgr_w(ptr %res, ptr %a, ptr %b) nounwind {238; CHECK-LABEL: xvavgr_w:239; CHECK: # %bb.0: # %entry240; CHECK-NEXT: xvld $xr0, $a1, 0241; CHECK-NEXT: xvld $xr1, $a2, 0242; CHECK-NEXT: xvor.v $xr2, $xr0, $xr1243; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1244; CHECK-NEXT: xvsrai.w $xr0, $xr0, 1245; CHECK-NEXT: xvsub.w $xr0, $xr2, $xr0246; CHECK-NEXT: xvst $xr0, $a0, 0247; CHECK-NEXT: ret248entry:249 %va = load <8 x i32>, ptr %a250 %vb = load <8 x i32>, ptr %b251 %ea = sext <8 x i32> %va to <8 x i64>252 %eb = sext <8 x i32> %vb to <8 x i64>253 %add = add <8 x i64> %ea, %eb254 %add1 = add <8 x i64> %add, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>255 %shr = lshr <8 x i64> %add1, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>256 %r = trunc <8 x i64> %shr to <8 x i32>257 store <8 x i32> %r, ptr %res258 ret void259}260 261define void @xvavgr_d(ptr %res, ptr %a, ptr %b) nounwind {262; CHECK-LABEL: xvavgr_d:263; CHECK: # %bb.0: # %entry264; CHECK-NEXT: xvld $xr0, $a1, 0265; CHECK-NEXT: xvld $xr1, $a2, 0266; CHECK-NEXT: xvor.v $xr2, $xr0, $xr1267; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1268; CHECK-NEXT: xvsrai.d $xr0, $xr0, 1269; CHECK-NEXT: xvsub.d $xr0, $xr2, $xr0270; CHECK-NEXT: xvst $xr0, $a0, 0271; CHECK-NEXT: ret272entry:273 %va = load <4 x i64>, ptr %a274 %vb = load <4 x i64>, ptr %b275 %ea = sext <4 x i64> %va to <4 x i128>276 %eb = sext <4 x i64> %vb to <4 x i128>277 %add = add <4 x i128> %ea, %eb278 %add1 = add <4 x i128> %add, <i128 1, i128 1, i128 1, i128 1>279 %shr = lshr <4 x i128> %add1, <i128 1, i128 1, i128 1, i128 1>280 %r = trunc <4 x i128> %shr to <4 x i64>281 store <4 x i64> %r, ptr %res282 ret void283}284 285define void @xvavgr_bu(ptr %res, ptr %a, ptr %b) nounwind {286; CHECK-LABEL: xvavgr_bu:287; CHECK: # %bb.0: # %entry288; CHECK-NEXT: xvld $xr0, $a1, 0289; CHECK-NEXT: xvld $xr1, $a2, 0290; CHECK-NEXT: xvor.v $xr2, $xr0, $xr1291; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1292; CHECK-NEXT: xvsrli.b $xr0, $xr0, 1293; CHECK-NEXT: xvsub.b $xr0, $xr2, $xr0294; CHECK-NEXT: xvst $xr0, $a0, 0295; CHECK-NEXT: ret296entry:297 %va = load <32 x i8>, ptr %a298 %vb = load <32 x i8>, ptr %b299 %ea = zext <32 x i8> %va to <32 x i16>300 %eb = zext <32 x i8> %vb to <32 x i16>301 %add = add <32 x i16> %ea, %eb302 %add1 = add <32 x i16> %add, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>303 %shr = lshr <32 x i16> %add1, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>304 %r = trunc <32 x i16> %shr to <32 x i8>305 store <32 x i8> %r, ptr %res306 ret void307}308 309define void @xvavgr_hu(ptr %res, ptr %a, ptr %b) nounwind {310; CHECK-LABEL: xvavgr_hu:311; CHECK: # %bb.0: # %entry312; CHECK-NEXT: xvld $xr0, $a1, 0313; CHECK-NEXT: xvld $xr1, $a2, 0314; CHECK-NEXT: xvor.v $xr2, $xr0, $xr1315; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1316; CHECK-NEXT: xvsrli.h $xr0, $xr0, 1317; CHECK-NEXT: xvsub.h $xr0, $xr2, $xr0318; CHECK-NEXT: xvst $xr0, $a0, 0319; CHECK-NEXT: ret320entry:321 %va = load <16 x i16>, ptr %a322 %vb = load <16 x i16>, ptr %b323 %ea = zext <16 x i16> %va to <16 x i32>324 %eb = zext <16 x i16> %vb to <16 x i32>325 %add = add <16 x i32> %ea, %eb326 %add1 = add <16 x i32> %add, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>327 %shr = lshr <16 x i32> %add1, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>328 %r = trunc <16 x i32> %shr to <16 x i16>329 store <16 x i16> %r, ptr %res330 ret void331}332 333define void @xvavgr_wu(ptr %res, ptr %a, ptr %b) nounwind {334; CHECK-LABEL: xvavgr_wu:335; CHECK: # %bb.0: # %entry336; CHECK-NEXT: xvld $xr0, $a1, 0337; CHECK-NEXT: xvld $xr1, $a2, 0338; CHECK-NEXT: xvor.v $xr2, $xr0, $xr1339; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1340; CHECK-NEXT: xvsrli.w $xr0, $xr0, 1341; CHECK-NEXT: xvsub.w $xr0, $xr2, $xr0342; CHECK-NEXT: xvst $xr0, $a0, 0343; CHECK-NEXT: ret344entry:345 %va = load <8 x i32>, ptr %a346 %vb = load <8 x i32>, ptr %b347 %ea = zext <8 x i32> %va to <8 x i64>348 %eb = zext <8 x i32> %vb to <8 x i64>349 %add = add <8 x i64> %ea, %eb350 %add1 = add <8 x i64> %add, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>351 %shr = lshr <8 x i64> %add1, <i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1, i64 1>352 %r = trunc <8 x i64> %shr to <8 x i32>353 store <8 x i32> %r, ptr %res354 ret void355}356 357define void @xvavgr_du(ptr %res, ptr %a, ptr %b) nounwind {358; CHECK-LABEL: xvavgr_du:359; CHECK: # %bb.0: # %entry360; CHECK-NEXT: xvld $xr0, $a1, 0361; CHECK-NEXT: xvld $xr1, $a2, 0362; CHECK-NEXT: xvor.v $xr2, $xr0, $xr1363; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1364; CHECK-NEXT: xvsrli.d $xr0, $xr0, 1365; CHECK-NEXT: xvsub.d $xr0, $xr2, $xr0366; CHECK-NEXT: xvst $xr0, $a0, 0367; CHECK-NEXT: ret368entry:369 %va = load <4 x i64>, ptr %a370 %vb = load <4 x i64>, ptr %b371 %ea = zext <4 x i64> %va to <4 x i128>372 %eb = zext <4 x i64> %vb to <4 x i128>373 %add = add <4 x i128> %ea, %eb374 %add1 = add <4 x i128> %add, <i128 1, i128 1, i128 1, i128 1>375 %shr = lshr <4 x i128> %add1, <i128 1, i128 1, i128 1, i128 1>376 %r = trunc <4 x i128> %shr to <4 x i64>377 store <4 x i64> %r, ptr %res378 ret void379}380