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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s3; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s4 5;; SETEQ6define void @v32i8_icmp_eq_imm(ptr %res, ptr %a0) nounwind {7; CHECK-LABEL: v32i8_icmp_eq_imm:8; CHECK: # %bb.0:9; CHECK-NEXT: xvld $xr0, $a1, 010; CHECK-NEXT: xvseqi.b $xr0, $xr0, 1511; CHECK-NEXT: xvst $xr0, $a0, 012; CHECK-NEXT: ret13 %v0 = load <32 x i8>, ptr %a014 %cmp = icmp eq <32 x i8> %v0, <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>15 %ext = sext <32 x i1> %cmp to <32 x i8>16 store <32 x i8> %ext, ptr %res17 ret void18}19 20define void @v32i8_icmp_eq(ptr %res, ptr %a0, ptr %a1) nounwind {21; CHECK-LABEL: v32i8_icmp_eq:22; CHECK: # %bb.0:23; CHECK-NEXT: xvld $xr0, $a1, 024; CHECK-NEXT: xvld $xr1, $a2, 025; CHECK-NEXT: xvseq.b $xr0, $xr0, $xr126; CHECK-NEXT: xvst $xr0, $a0, 027; CHECK-NEXT: ret28 %v0 = load <32 x i8>, ptr %a029 %v1 = load <32 x i8>, ptr %a130 %cmp = icmp eq <32 x i8> %v0, %v131 %ext = sext <32 x i1> %cmp to <32 x i8>32 store <32 x i8> %ext, ptr %res33 ret void34}35 36define void @v16i16_icmp_eq_imm(ptr %res, ptr %a0) nounwind {37; CHECK-LABEL: v16i16_icmp_eq_imm:38; CHECK: # %bb.0:39; CHECK-NEXT: xvld $xr0, $a1, 040; CHECK-NEXT: xvseqi.h $xr0, $xr0, 1541; CHECK-NEXT: xvst $xr0, $a0, 042; CHECK-NEXT: ret43 %v0 = load <16 x i16>, ptr %a044 %cmp = icmp eq <16 x i16> %v0, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>45 %ext = sext <16 x i1> %cmp to <16 x i16>46 store <16 x i16> %ext, ptr %res47 ret void48}49 50define void @v16i16_icmp_eq(ptr %res, ptr %a0, ptr %a1) nounwind {51; CHECK-LABEL: v16i16_icmp_eq:52; CHECK: # %bb.0:53; CHECK-NEXT: xvld $xr0, $a1, 054; CHECK-NEXT: xvld $xr1, $a2, 055; CHECK-NEXT: xvseq.h $xr0, $xr0, $xr156; CHECK-NEXT: xvst $xr0, $a0, 057; CHECK-NEXT: ret58 %v0 = load <16 x i16>, ptr %a059 %v1 = load <16 x i16>, ptr %a160 %cmp = icmp eq <16 x i16> %v0, %v161 %ext = sext <16 x i1> %cmp to <16 x i16>62 store <16 x i16> %ext, ptr %res63 ret void64}65 66define void @v8i32_icmp_eq_imm(ptr %res, ptr %a0) nounwind {67; CHECK-LABEL: v8i32_icmp_eq_imm:68; CHECK: # %bb.0:69; CHECK-NEXT: xvld $xr0, $a1, 070; CHECK-NEXT: xvseqi.w $xr0, $xr0, 1571; CHECK-NEXT: xvst $xr0, $a0, 072; CHECK-NEXT: ret73 %v0 = load <8 x i32>, ptr %a074 %cmp = icmp eq <8 x i32> %v0, <i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>75 %ext = sext <8 x i1> %cmp to <8 x i32>76 store <8 x i32> %ext, ptr %res77 ret void78}79 80define void @v8i32_icmp_eq(ptr %res, ptr %a0, ptr %a1) nounwind {81; CHECK-LABEL: v8i32_icmp_eq:82; CHECK: # %bb.0:83; CHECK-NEXT: xvld $xr0, $a1, 084; CHECK-NEXT: xvld $xr1, $a2, 085; CHECK-NEXT: xvseq.w $xr0, $xr0, $xr186; CHECK-NEXT: xvst $xr0, $a0, 087; CHECK-NEXT: ret88 %v0 = load <8 x i32>, ptr %a089 %v1 = load <8 x i32>, ptr %a190 %cmp = icmp eq <8 x i32> %v0, %v191 %ext = sext <8 x i1> %cmp to <8 x i32>92 store <8 x i32> %ext, ptr %res93 ret void94}95 96define void @v4i64_icmp_eq_imm(ptr %res, ptr %a0) nounwind {97; CHECK-LABEL: v4i64_icmp_eq_imm:98; CHECK: # %bb.0:99; CHECK-NEXT: xvld $xr0, $a1, 0100; CHECK-NEXT: xvseqi.d $xr0, $xr0, 15101; CHECK-NEXT: xvst $xr0, $a0, 0102; CHECK-NEXT: ret103 %v0 = load <4 x i64>, ptr %a0104 %cmp = icmp eq <4 x i64> %v0, <i64 15, i64 15, i64 15, i64 15>105 %ext = sext <4 x i1> %cmp to <4 x i64>106 store <4 x i64> %ext, ptr %res107 ret void108}109 110define void @v4i64_icmp_eq(ptr %res, ptr %a0, ptr %a1) nounwind {111; CHECK-LABEL: v4i64_icmp_eq:112; CHECK: # %bb.0:113; CHECK-NEXT: xvld $xr0, $a1, 0114; CHECK-NEXT: xvld $xr1, $a2, 0115; CHECK-NEXT: xvseq.d $xr0, $xr0, $xr1116; CHECK-NEXT: xvst $xr0, $a0, 0117; CHECK-NEXT: ret118 %v0 = load <4 x i64>, ptr %a0119 %v1 = load <4 x i64>, ptr %a1120 %cmp = icmp eq <4 x i64> %v0, %v1121 %ext = sext <4 x i1> %cmp to <4 x i64>122 store <4 x i64> %ext, ptr %res123 ret void124}125 126;; SETLE127define void @v32i8_icmp_sle_imm(ptr %res, ptr %a0) nounwind {128; CHECK-LABEL: v32i8_icmp_sle_imm:129; CHECK: # %bb.0:130; CHECK-NEXT: xvld $xr0, $a1, 0131; CHECK-NEXT: xvslei.b $xr0, $xr0, 15132; CHECK-NEXT: xvst $xr0, $a0, 0133; CHECK-NEXT: ret134 %v0 = load <32 x i8>, ptr %a0135 %cmp = icmp sle <32 x i8> %v0, <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>136 %ext = sext <32 x i1> %cmp to <32 x i8>137 store <32 x i8> %ext, ptr %res138 ret void139}140 141define void @v32i8_icmp_sle(ptr %res, ptr %a0, ptr %a1) nounwind {142; CHECK-LABEL: v32i8_icmp_sle:143; CHECK: # %bb.0:144; CHECK-NEXT: xvld $xr0, $a1, 0145; CHECK-NEXT: xvld $xr1, $a2, 0146; CHECK-NEXT: xvsle.b $xr0, $xr0, $xr1147; CHECK-NEXT: xvst $xr0, $a0, 0148; CHECK-NEXT: ret149 %v0 = load <32 x i8>, ptr %a0150 %v1 = load <32 x i8>, ptr %a1151 %cmp = icmp sle <32 x i8> %v0, %v1152 %ext = sext <32 x i1> %cmp to <32 x i8>153 store <32 x i8> %ext, ptr %res154 ret void155}156 157define void @v16i16_icmp_sle_imm(ptr %res, ptr %a0) nounwind {158; CHECK-LABEL: v16i16_icmp_sle_imm:159; CHECK: # %bb.0:160; CHECK-NEXT: xvld $xr0, $a1, 0161; CHECK-NEXT: xvslei.h $xr0, $xr0, 15162; CHECK-NEXT: xvst $xr0, $a0, 0163; CHECK-NEXT: ret164 %v0 = load <16 x i16>, ptr %a0165 %cmp = icmp sle <16 x i16> %v0, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>166 %ext = sext <16 x i1> %cmp to <16 x i16>167 store <16 x i16> %ext, ptr %res168 ret void169}170 171define void @v16i16_icmp_sle(ptr %res, ptr %a0, ptr %a1) nounwind {172; CHECK-LABEL: v16i16_icmp_sle:173; CHECK: # %bb.0:174; CHECK-NEXT: xvld $xr0, $a1, 0175; CHECK-NEXT: xvld $xr1, $a2, 0176; CHECK-NEXT: xvsle.h $xr0, $xr0, $xr1177; CHECK-NEXT: xvst $xr0, $a0, 0178; CHECK-NEXT: ret179 %v0 = load <16 x i16>, ptr %a0180 %v1 = load <16 x i16>, ptr %a1181 %cmp = icmp sle <16 x i16> %v0, %v1182 %ext = sext <16 x i1> %cmp to <16 x i16>183 store <16 x i16> %ext, ptr %res184 ret void185}186 187define void @v8i32_icmp_sle_imm(ptr %res, ptr %a0) nounwind {188; CHECK-LABEL: v8i32_icmp_sle_imm:189; CHECK: # %bb.0:190; CHECK-NEXT: xvld $xr0, $a1, 0191; CHECK-NEXT: xvslei.w $xr0, $xr0, 15192; CHECK-NEXT: xvst $xr0, $a0, 0193; CHECK-NEXT: ret194 %v0 = load <8 x i32>, ptr %a0195 %cmp = icmp sle <8 x i32> %v0, <i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>196 %ext = sext <8 x i1> %cmp to <8 x i32>197 store <8 x i32> %ext, ptr %res198 ret void199}200 201define void @v8i32_icmp_sle(ptr %res, ptr %a0, ptr %a1) nounwind {202; CHECK-LABEL: v8i32_icmp_sle:203; CHECK: # %bb.0:204; CHECK-NEXT: xvld $xr0, $a1, 0205; CHECK-NEXT: xvld $xr1, $a2, 0206; CHECK-NEXT: xvsle.w $xr0, $xr0, $xr1207; CHECK-NEXT: xvst $xr0, $a0, 0208; CHECK-NEXT: ret209 %v0 = load <8 x i32>, ptr %a0210 %v1 = load <8 x i32>, ptr %a1211 %cmp = icmp sle <8 x i32> %v0, %v1212 %ext = sext <8 x i1> %cmp to <8 x i32>213 store <8 x i32> %ext, ptr %res214 ret void215}216 217define void @v4i64_icmp_sle_imm(ptr %res, ptr %a0) nounwind {218; CHECK-LABEL: v4i64_icmp_sle_imm:219; CHECK: # %bb.0:220; CHECK-NEXT: xvld $xr0, $a1, 0221; CHECK-NEXT: xvslei.d $xr0, $xr0, 15222; CHECK-NEXT: xvst $xr0, $a0, 0223; CHECK-NEXT: ret224 %v0 = load <4 x i64>, ptr %a0225 %cmp = icmp sle <4 x i64> %v0, <i64 15, i64 15, i64 15, i64 15>226 %ext = sext <4 x i1> %cmp to <4 x i64>227 store <4 x i64> %ext, ptr %res228 ret void229}230 231define void @v4i64_icmp_sle(ptr %res, ptr %a0, ptr %a1) nounwind {232; CHECK-LABEL: v4i64_icmp_sle:233; CHECK: # %bb.0:234; CHECK-NEXT: xvld $xr0, $a1, 0235; CHECK-NEXT: xvld $xr1, $a2, 0236; CHECK-NEXT: xvsle.d $xr0, $xr0, $xr1237; CHECK-NEXT: xvst $xr0, $a0, 0238; CHECK-NEXT: ret239 %v0 = load <4 x i64>, ptr %a0240 %v1 = load <4 x i64>, ptr %a1241 %cmp = icmp sle <4 x i64> %v0, %v1242 %ext = sext <4 x i1> %cmp to <4 x i64>243 store <4 x i64> %ext, ptr %res244 ret void245}246 247;; SETULE248define void @v32i8_icmp_ule_imm(ptr %res, ptr %a0) nounwind {249; CHECK-LABEL: v32i8_icmp_ule_imm:250; CHECK: # %bb.0:251; CHECK-NEXT: xvld $xr0, $a1, 0252; CHECK-NEXT: xvslei.bu $xr0, $xr0, 31253; CHECK-NEXT: xvst $xr0, $a0, 0254; CHECK-NEXT: ret255 %v0 = load <32 x i8>, ptr %a0256 %cmp = icmp ule <32 x i8> %v0, <i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31>257 %ext = sext <32 x i1> %cmp to <32 x i8>258 store <32 x i8> %ext, ptr %res259 ret void260}261 262define void @v32i8_icmp_ule(ptr %res, ptr %a0, ptr %a1) nounwind {263; CHECK-LABEL: v32i8_icmp_ule:264; CHECK: # %bb.0:265; CHECK-NEXT: xvld $xr0, $a1, 0266; CHECK-NEXT: xvld $xr1, $a2, 0267; CHECK-NEXT: xvsle.bu $xr0, $xr0, $xr1268; CHECK-NEXT: xvst $xr0, $a0, 0269; CHECK-NEXT: ret270 %v0 = load <32 x i8>, ptr %a0271 %v1 = load <32 x i8>, ptr %a1272 %cmp = icmp ule <32 x i8> %v0, %v1273 %ext = sext <32 x i1> %cmp to <32 x i8>274 store <32 x i8> %ext, ptr %res275 ret void276}277 278define void @v16i16_icmp_ule_imm(ptr %res, ptr %a0) nounwind {279; CHECK-LABEL: v16i16_icmp_ule_imm:280; CHECK: # %bb.0:281; CHECK-NEXT: xvld $xr0, $a1, 0282; CHECK-NEXT: xvslei.hu $xr0, $xr0, 31283; CHECK-NEXT: xvst $xr0, $a0, 0284; CHECK-NEXT: ret285 %v0 = load <16 x i16>, ptr %a0286 %cmp = icmp ule <16 x i16> %v0, <i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31>287 %ext = sext <16 x i1> %cmp to <16 x i16>288 store <16 x i16> %ext, ptr %res289 ret void290}291 292define void @v16i16_icmp_ule(ptr %res, ptr %a0, ptr %a1) nounwind {293; CHECK-LABEL: v16i16_icmp_ule:294; CHECK: # %bb.0:295; CHECK-NEXT: xvld $xr0, $a1, 0296; CHECK-NEXT: xvld $xr1, $a2, 0297; CHECK-NEXT: xvsle.hu $xr0, $xr0, $xr1298; CHECK-NEXT: xvst $xr0, $a0, 0299; CHECK-NEXT: ret300 %v0 = load <16 x i16>, ptr %a0301 %v1 = load <16 x i16>, ptr %a1302 %cmp = icmp ule <16 x i16> %v0, %v1303 %ext = sext <16 x i1> %cmp to <16 x i16>304 store <16 x i16> %ext, ptr %res305 ret void306}307 308define void @v8i32_icmp_ule_imm(ptr %res, ptr %a0) nounwind {309; CHECK-LABEL: v8i32_icmp_ule_imm:310; CHECK: # %bb.0:311; CHECK-NEXT: xvld $xr0, $a1, 0312; CHECK-NEXT: xvslei.wu $xr0, $xr0, 31313; CHECK-NEXT: xvst $xr0, $a0, 0314; CHECK-NEXT: ret315 %v0 = load <8 x i32>, ptr %a0316 %cmp = icmp ule <8 x i32> %v0, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>317 %ext = sext <8 x i1> %cmp to <8 x i32>318 store <8 x i32> %ext, ptr %res319 ret void320}321 322define void @v8i32_icmp_ule(ptr %res, ptr %a0, ptr %a1) nounwind {323; CHECK-LABEL: v8i32_icmp_ule:324; CHECK: # %bb.0:325; CHECK-NEXT: xvld $xr0, $a1, 0326; CHECK-NEXT: xvld $xr1, $a2, 0327; CHECK-NEXT: xvsle.wu $xr0, $xr0, $xr1328; CHECK-NEXT: xvst $xr0, $a0, 0329; CHECK-NEXT: ret330 %v0 = load <8 x i32>, ptr %a0331 %v1 = load <8 x i32>, ptr %a1332 %cmp = icmp ule <8 x i32> %v0, %v1333 %ext = sext <8 x i1> %cmp to <8 x i32>334 store <8 x i32> %ext, ptr %res335 ret void336}337 338define void @v4i64_icmp_ule_imm(ptr %res, ptr %a0) nounwind {339; CHECK-LABEL: v4i64_icmp_ule_imm:340; CHECK: # %bb.0:341; CHECK-NEXT: xvld $xr0, $a1, 0342; CHECK-NEXT: xvslei.du $xr0, $xr0, 31343; CHECK-NEXT: xvst $xr0, $a0, 0344; CHECK-NEXT: ret345 %v0 = load <4 x i64>, ptr %a0346 %cmp = icmp ule <4 x i64> %v0, <i64 31, i64 31, i64 31, i64 31>347 %ext = sext <4 x i1> %cmp to <4 x i64>348 store <4 x i64> %ext, ptr %res349 ret void350}351 352define void @v4i64_icmp_ule(ptr %res, ptr %a0, ptr %a1) nounwind {353; CHECK-LABEL: v4i64_icmp_ule:354; CHECK: # %bb.0:355; CHECK-NEXT: xvld $xr0, $a1, 0356; CHECK-NEXT: xvld $xr1, $a2, 0357; CHECK-NEXT: xvsle.du $xr0, $xr0, $xr1358; CHECK-NEXT: xvst $xr0, $a0, 0359; CHECK-NEXT: ret360 %v0 = load <4 x i64>, ptr %a0361 %v1 = load <4 x i64>, ptr %a1362 %cmp = icmp ule <4 x i64> %v0, %v1363 %ext = sext <4 x i1> %cmp to <4 x i64>364 store <4 x i64> %ext, ptr %res365 ret void366}367 368;; SETLT369define void @v32i8_icmp_slt_imm(ptr %res, ptr %a0) nounwind {370; CHECK-LABEL: v32i8_icmp_slt_imm:371; CHECK: # %bb.0:372; CHECK-NEXT: xvld $xr0, $a1, 0373; CHECK-NEXT: xvslti.b $xr0, $xr0, 15374; CHECK-NEXT: xvst $xr0, $a0, 0375; CHECK-NEXT: ret376 %v0 = load <32 x i8>, ptr %a0377 %cmp = icmp slt <32 x i8> %v0, <i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15, i8 15>378 %ext = sext <32 x i1> %cmp to <32 x i8>379 store <32 x i8> %ext, ptr %res380 ret void381}382 383define void @v32i8_icmp_slt(ptr %res, ptr %a0, ptr %a1) nounwind {384; CHECK-LABEL: v32i8_icmp_slt:385; CHECK: # %bb.0:386; CHECK-NEXT: xvld $xr0, $a1, 0387; CHECK-NEXT: xvld $xr1, $a2, 0388; CHECK-NEXT: xvslt.b $xr0, $xr0, $xr1389; CHECK-NEXT: xvst $xr0, $a0, 0390; CHECK-NEXT: ret391 %v0 = load <32 x i8>, ptr %a0392 %v1 = load <32 x i8>, ptr %a1393 %cmp = icmp slt <32 x i8> %v0, %v1394 %ext = sext <32 x i1> %cmp to <32 x i8>395 store <32 x i8> %ext, ptr %res396 ret void397}398 399define void @v16i16_icmp_slt_imm(ptr %res, ptr %a0) nounwind {400; CHECK-LABEL: v16i16_icmp_slt_imm:401; CHECK: # %bb.0:402; CHECK-NEXT: xvld $xr0, $a1, 0403; CHECK-NEXT: xvslti.h $xr0, $xr0, 15404; CHECK-NEXT: xvst $xr0, $a0, 0405; CHECK-NEXT: ret406 %v0 = load <16 x i16>, ptr %a0407 %cmp = icmp slt <16 x i16> %v0, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>408 %ext = sext <16 x i1> %cmp to <16 x i16>409 store <16 x i16> %ext, ptr %res410 ret void411}412 413define void @v16i16_icmp_slt(ptr %res, ptr %a0, ptr %a1) nounwind {414; CHECK-LABEL: v16i16_icmp_slt:415; CHECK: # %bb.0:416; CHECK-NEXT: xvld $xr0, $a1, 0417; CHECK-NEXT: xvld $xr1, $a2, 0418; CHECK-NEXT: xvslt.h $xr0, $xr0, $xr1419; CHECK-NEXT: xvst $xr0, $a0, 0420; CHECK-NEXT: ret421 %v0 = load <16 x i16>, ptr %a0422 %v1 = load <16 x i16>, ptr %a1423 %cmp = icmp slt <16 x i16> %v0, %v1424 %ext = sext <16 x i1> %cmp to <16 x i16>425 store <16 x i16> %ext, ptr %res426 ret void427}428 429define void @v8i32_icmp_slt_imm(ptr %res, ptr %a0) nounwind {430; CHECK-LABEL: v8i32_icmp_slt_imm:431; CHECK: # %bb.0:432; CHECK-NEXT: xvld $xr0, $a1, 0433; CHECK-NEXT: xvslti.w $xr0, $xr0, 15434; CHECK-NEXT: xvst $xr0, $a0, 0435; CHECK-NEXT: ret436 %v0 = load <8 x i32>, ptr %a0437 %cmp = icmp slt <8 x i32> %v0, <i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15, i32 15>438 %ext = sext <8 x i1> %cmp to <8 x i32>439 store <8 x i32> %ext, ptr %res440 ret void441}442 443define void @v8i32_icmp_slt(ptr %res, ptr %a0, ptr %a1) nounwind {444; CHECK-LABEL: v8i32_icmp_slt:445; CHECK: # %bb.0:446; CHECK-NEXT: xvld $xr0, $a1, 0447; CHECK-NEXT: xvld $xr1, $a2, 0448; CHECK-NEXT: xvslt.w $xr0, $xr0, $xr1449; CHECK-NEXT: xvst $xr0, $a0, 0450; CHECK-NEXT: ret451 %v0 = load <8 x i32>, ptr %a0452 %v1 = load <8 x i32>, ptr %a1453 %cmp = icmp slt <8 x i32> %v0, %v1454 %ext = sext <8 x i1> %cmp to <8 x i32>455 store <8 x i32> %ext, ptr %res456 ret void457}458 459define void @v4i64_icmp_slt_imm(ptr %res, ptr %a0) nounwind {460; CHECK-LABEL: v4i64_icmp_slt_imm:461; CHECK: # %bb.0:462; CHECK-NEXT: xvld $xr0, $a1, 0463; CHECK-NEXT: xvslti.d $xr0, $xr0, 15464; CHECK-NEXT: xvst $xr0, $a0, 0465; CHECK-NEXT: ret466 %v0 = load <4 x i64>, ptr %a0467 %cmp = icmp slt <4 x i64> %v0, <i64 15, i64 15, i64 15, i64 15>468 %ext = sext <4 x i1> %cmp to <4 x i64>469 store <4 x i64> %ext, ptr %res470 ret void471}472 473define void @v4i64_icmp_slt(ptr %res, ptr %a0, ptr %a1) nounwind {474; CHECK-LABEL: v4i64_icmp_slt:475; CHECK: # %bb.0:476; CHECK-NEXT: xvld $xr0, $a1, 0477; CHECK-NEXT: xvld $xr1, $a2, 0478; CHECK-NEXT: xvslt.d $xr0, $xr0, $xr1479; CHECK-NEXT: xvst $xr0, $a0, 0480; CHECK-NEXT: ret481 %v0 = load <4 x i64>, ptr %a0482 %v1 = load <4 x i64>, ptr %a1483 %cmp = icmp slt <4 x i64> %v0, %v1484 %ext = sext <4 x i1> %cmp to <4 x i64>485 store <4 x i64> %ext, ptr %res486 ret void487}488 489;; SETULT490define void @v32i8_icmp_ult_imm(ptr %res, ptr %a0) nounwind {491; CHECK-LABEL: v32i8_icmp_ult_imm:492; CHECK: # %bb.0:493; CHECK-NEXT: xvld $xr0, $a1, 0494; CHECK-NEXT: xvslti.bu $xr0, $xr0, 31495; CHECK-NEXT: xvst $xr0, $a0, 0496; CHECK-NEXT: ret497 %v0 = load <32 x i8>, ptr %a0498 %cmp = icmp ult <32 x i8> %v0, <i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31, i8 31>499 %ext = sext <32 x i1> %cmp to <32 x i8>500 store <32 x i8> %ext, ptr %res501 ret void502}503 504define void @v32i8_icmp_ult(ptr %res, ptr %a0, ptr %a1) nounwind {505; CHECK-LABEL: v32i8_icmp_ult:506; CHECK: # %bb.0:507; CHECK-NEXT: xvld $xr0, $a1, 0508; CHECK-NEXT: xvld $xr1, $a2, 0509; CHECK-NEXT: xvslt.bu $xr0, $xr0, $xr1510; CHECK-NEXT: xvst $xr0, $a0, 0511; CHECK-NEXT: ret512 %v0 = load <32 x i8>, ptr %a0513 %v1 = load <32 x i8>, ptr %a1514 %cmp = icmp ult <32 x i8> %v0, %v1515 %ext = sext <32 x i1> %cmp to <32 x i8>516 store <32 x i8> %ext, ptr %res517 ret void518}519 520define void @v16i16_icmp_ult_imm(ptr %res, ptr %a0) nounwind {521; CHECK-LABEL: v16i16_icmp_ult_imm:522; CHECK: # %bb.0:523; CHECK-NEXT: xvld $xr0, $a1, 0524; CHECK-NEXT: xvslti.hu $xr0, $xr0, 31525; CHECK-NEXT: xvst $xr0, $a0, 0526; CHECK-NEXT: ret527 %v0 = load <16 x i16>, ptr %a0528 %cmp = icmp ult <16 x i16> %v0, <i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31, i16 31>529 %ext = sext <16 x i1> %cmp to <16 x i16>530 store <16 x i16> %ext, ptr %res531 ret void532}533 534define void @v16i16_icmp_ult(ptr %res, ptr %a0, ptr %a1) nounwind {535; CHECK-LABEL: v16i16_icmp_ult:536; CHECK: # %bb.0:537; CHECK-NEXT: xvld $xr0, $a1, 0538; CHECK-NEXT: xvld $xr1, $a2, 0539; CHECK-NEXT: xvslt.hu $xr0, $xr0, $xr1540; CHECK-NEXT: xvst $xr0, $a0, 0541; CHECK-NEXT: ret542 %v0 = load <16 x i16>, ptr %a0543 %v1 = load <16 x i16>, ptr %a1544 %cmp = icmp ult <16 x i16> %v0, %v1545 %ext = sext <16 x i1> %cmp to <16 x i16>546 store <16 x i16> %ext, ptr %res547 ret void548}549 550define void @v8i32_icmp_ult_imm(ptr %res, ptr %a0) nounwind {551; CHECK-LABEL: v8i32_icmp_ult_imm:552; CHECK: # %bb.0:553; CHECK-NEXT: xvld $xr0, $a1, 0554; CHECK-NEXT: xvslti.wu $xr0, $xr0, 31555; CHECK-NEXT: xvst $xr0, $a0, 0556; CHECK-NEXT: ret557 %v0 = load <8 x i32>, ptr %a0558 %cmp = icmp ult <8 x i32> %v0, <i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31, i32 31>559 %ext = sext <8 x i1> %cmp to <8 x i32>560 store <8 x i32> %ext, ptr %res561 ret void562}563 564define void @v8i32_icmp_ult(ptr %res, ptr %a0, ptr %a1) nounwind {565; CHECK-LABEL: v8i32_icmp_ult:566; CHECK: # %bb.0:567; CHECK-NEXT: xvld $xr0, $a1, 0568; CHECK-NEXT: xvld $xr1, $a2, 0569; CHECK-NEXT: xvslt.wu $xr0, $xr0, $xr1570; CHECK-NEXT: xvst $xr0, $a0, 0571; CHECK-NEXT: ret572 %v0 = load <8 x i32>, ptr %a0573 %v1 = load <8 x i32>, ptr %a1574 %cmp = icmp ult <8 x i32> %v0, %v1575 %ext = sext <8 x i1> %cmp to <8 x i32>576 store <8 x i32> %ext, ptr %res577 ret void578}579 580define void @v4i64_icmp_ult_imm(ptr %res, ptr %a0) nounwind {581; CHECK-LABEL: v4i64_icmp_ult_imm:582; CHECK: # %bb.0:583; CHECK-NEXT: xvld $xr0, $a1, 0584; CHECK-NEXT: xvslti.du $xr0, $xr0, 31585; CHECK-NEXT: xvst $xr0, $a0, 0586; CHECK-NEXT: ret587 %v0 = load <4 x i64>, ptr %a0588 %cmp = icmp ult <4 x i64> %v0, <i64 31, i64 31, i64 31, i64 31>589 %ext = sext <4 x i1> %cmp to <4 x i64>590 store <4 x i64> %ext, ptr %res591 ret void592}593 594define void @v4i64_icmp_ult(ptr %res, ptr %a0, ptr %a1) nounwind {595; CHECK-LABEL: v4i64_icmp_ult:596; CHECK: # %bb.0:597; CHECK-NEXT: xvld $xr0, $a1, 0598; CHECK-NEXT: xvld $xr1, $a2, 0599; CHECK-NEXT: xvslt.du $xr0, $xr0, $xr1600; CHECK-NEXT: xvst $xr0, $a0, 0601; CHECK-NEXT: ret602 %v0 = load <4 x i64>, ptr %a0603 %v1 = load <4 x i64>, ptr %a1604 %cmp = icmp ult <4 x i64> %v0, %v1605 %ext = sext <4 x i1> %cmp to <4 x i64>606 store <4 x i64> %ext, ptr %res607 ret void608}609 610;; Expand SETNE611define void @v32i8_icmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {612; CHECK-LABEL: v32i8_icmp_ne:613; CHECK: # %bb.0:614; CHECK-NEXT: xvld $xr0, $a1, 0615; CHECK-NEXT: xvld $xr1, $a2, 0616; CHECK-NEXT: xvseq.b $xr0, $xr0, $xr1617; CHECK-NEXT: xvxori.b $xr0, $xr0, 255618; CHECK-NEXT: xvst $xr0, $a0, 0619; CHECK-NEXT: ret620 %v0 = load <32 x i8>, ptr %a0621 %v1 = load <32 x i8>, ptr %a1622 %cmp = icmp ne <32 x i8> %v0, %v1623 %ext = sext <32 x i1> %cmp to <32 x i8>624 store <32 x i8> %ext, ptr %res625 ret void626}627 628define void @v16i16_icmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {629; CHECK-LABEL: v16i16_icmp_ne:630; CHECK: # %bb.0:631; CHECK-NEXT: xvld $xr0, $a1, 0632; CHECK-NEXT: xvld $xr1, $a2, 0633; CHECK-NEXT: xvseq.h $xr0, $xr0, $xr1634; CHECK-NEXT: xvrepli.b $xr1, -1635; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1636; CHECK-NEXT: xvst $xr0, $a0, 0637; CHECK-NEXT: ret638 %v0 = load <16 x i16>, ptr %a0639 %v1 = load <16 x i16>, ptr %a1640 %cmp = icmp ne <16 x i16> %v0, %v1641 %ext = sext <16 x i1> %cmp to <16 x i16>642 store <16 x i16> %ext, ptr %res643 ret void644}645 646define void @v8i32_icmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {647; CHECK-LABEL: v8i32_icmp_ne:648; CHECK: # %bb.0:649; CHECK-NEXT: xvld $xr0, $a1, 0650; CHECK-NEXT: xvld $xr1, $a2, 0651; CHECK-NEXT: xvseq.w $xr0, $xr0, $xr1652; CHECK-NEXT: xvrepli.b $xr1, -1653; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1654; CHECK-NEXT: xvst $xr0, $a0, 0655; CHECK-NEXT: ret656 %v0 = load <8 x i32>, ptr %a0657 %v1 = load <8 x i32>, ptr %a1658 %cmp = icmp ne <8 x i32> %v0, %v1659 %ext = sext <8 x i1> %cmp to <8 x i32>660 store <8 x i32> %ext, ptr %res661 ret void662}663 664define void @v4i64_icmp_ne(ptr %res, ptr %a0, ptr %a1) nounwind {665; CHECK-LABEL: v4i64_icmp_ne:666; CHECK: # %bb.0:667; CHECK-NEXT: xvld $xr0, $a1, 0668; CHECK-NEXT: xvld $xr1, $a2, 0669; CHECK-NEXT: xvseq.d $xr0, $xr0, $xr1670; CHECK-NEXT: xvrepli.b $xr1, -1671; CHECK-NEXT: xvxor.v $xr0, $xr0, $xr1672; CHECK-NEXT: xvst $xr0, $a0, 0673; CHECK-NEXT: ret674 %v0 = load <4 x i64>, ptr %a0675 %v1 = load <4 x i64>, ptr %a1676 %cmp = icmp ne <4 x i64> %v0, %v1677 %ext = sext <4 x i1> %cmp to <4 x i64>678 store <4 x i64> %ext, ptr %res679 ret void680}681 682;; Expand SETGE683define void @v32i8_icmp_sge(ptr %res, ptr %a0, ptr %a1) nounwind {684; CHECK-LABEL: v32i8_icmp_sge:685; CHECK: # %bb.0:686; CHECK-NEXT: xvld $xr0, $a1, 0687; CHECK-NEXT: xvld $xr1, $a2, 0688; CHECK-NEXT: xvsle.b $xr0, $xr1, $xr0689; CHECK-NEXT: xvst $xr0, $a0, 0690; CHECK-NEXT: ret691 %v0 = load <32 x i8>, ptr %a0692 %v1 = load <32 x i8>, ptr %a1693 %cmp = icmp sge <32 x i8> %v0, %v1694 %ext = sext <32 x i1> %cmp to <32 x i8>695 store <32 x i8> %ext, ptr %res696 ret void697}698 699define void @v16i16_icmp_sge(ptr %res, ptr %a0, ptr %a1) nounwind {700; CHECK-LABEL: v16i16_icmp_sge:701; CHECK: # %bb.0:702; CHECK-NEXT: xvld $xr0, $a1, 0703; CHECK-NEXT: xvld $xr1, $a2, 0704; CHECK-NEXT: xvsle.h $xr0, $xr1, $xr0705; CHECK-NEXT: xvst $xr0, $a0, 0706; CHECK-NEXT: ret707 %v0 = load <16 x i16>, ptr %a0708 %v1 = load <16 x i16>, ptr %a1709 %cmp = icmp sge <16 x i16> %v0, %v1710 %ext = sext <16 x i1> %cmp to <16 x i16>711 store <16 x i16> %ext, ptr %res712 ret void713}714 715define void @v8i32_icmp_sge(ptr %res, ptr %a0, ptr %a1) nounwind {716; CHECK-LABEL: v8i32_icmp_sge:717; CHECK: # %bb.0:718; CHECK-NEXT: xvld $xr0, $a1, 0719; CHECK-NEXT: xvld $xr1, $a2, 0720; CHECK-NEXT: xvsle.w $xr0, $xr1, $xr0721; CHECK-NEXT: xvst $xr0, $a0, 0722; CHECK-NEXT: ret723 %v0 = load <8 x i32>, ptr %a0724 %v1 = load <8 x i32>, ptr %a1725 %cmp = icmp sge <8 x i32> %v0, %v1726 %ext = sext <8 x i1> %cmp to <8 x i32>727 store <8 x i32> %ext, ptr %res728 ret void729}730 731define void @v4i64_icmp_sge(ptr %res, ptr %a0, ptr %a1) nounwind {732; CHECK-LABEL: v4i64_icmp_sge:733; CHECK: # %bb.0:734; CHECK-NEXT: xvld $xr0, $a1, 0735; CHECK-NEXT: xvld $xr1, $a2, 0736; CHECK-NEXT: xvsle.d $xr0, $xr1, $xr0737; CHECK-NEXT: xvst $xr0, $a0, 0738; CHECK-NEXT: ret739 %v0 = load <4 x i64>, ptr %a0740 %v1 = load <4 x i64>, ptr %a1741 %cmp = icmp sge <4 x i64> %v0, %v1742 %ext = sext <4 x i1> %cmp to <4 x i64>743 store <4 x i64> %ext, ptr %res744 ret void745}746 747;; Expand SETUGE748define void @v32i8_icmp_uge(ptr %res, ptr %a0, ptr %a1) nounwind {749; CHECK-LABEL: v32i8_icmp_uge:750; CHECK: # %bb.0:751; CHECK-NEXT: xvld $xr0, $a1, 0752; CHECK-NEXT: xvld $xr1, $a2, 0753; CHECK-NEXT: xvsle.bu $xr0, $xr1, $xr0754; CHECK-NEXT: xvst $xr0, $a0, 0755; CHECK-NEXT: ret756 %v0 = load <32 x i8>, ptr %a0757 %v1 = load <32 x i8>, ptr %a1758 %cmp = icmp uge <32 x i8> %v0, %v1759 %ext = sext <32 x i1> %cmp to <32 x i8>760 store <32 x i8> %ext, ptr %res761 ret void762}763 764define void @v16i16_icmp_uge(ptr %res, ptr %a0, ptr %a1) nounwind {765; CHECK-LABEL: v16i16_icmp_uge:766; CHECK: # %bb.0:767; CHECK-NEXT: xvld $xr0, $a1, 0768; CHECK-NEXT: xvld $xr1, $a2, 0769; CHECK-NEXT: xvsle.hu $xr0, $xr1, $xr0770; CHECK-NEXT: xvst $xr0, $a0, 0771; CHECK-NEXT: ret772 %v0 = load <16 x i16>, ptr %a0773 %v1 = load <16 x i16>, ptr %a1774 %cmp = icmp uge <16 x i16> %v0, %v1775 %ext = sext <16 x i1> %cmp to <16 x i16>776 store <16 x i16> %ext, ptr %res777 ret void778}779 780define void @v8i32_icmp_uge(ptr %res, ptr %a0, ptr %a1) nounwind {781; CHECK-LABEL: v8i32_icmp_uge:782; CHECK: # %bb.0:783; CHECK-NEXT: xvld $xr0, $a1, 0784; CHECK-NEXT: xvld $xr1, $a2, 0785; CHECK-NEXT: xvsle.wu $xr0, $xr1, $xr0786; CHECK-NEXT: xvst $xr0, $a0, 0787; CHECK-NEXT: ret788 %v0 = load <8 x i32>, ptr %a0789 %v1 = load <8 x i32>, ptr %a1790 %cmp = icmp uge <8 x i32> %v0, %v1791 %ext = sext <8 x i1> %cmp to <8 x i32>792 store <8 x i32> %ext, ptr %res793 ret void794}795 796define void @v4i64_icmp_uge(ptr %res, ptr %a0, ptr %a1) nounwind {797; CHECK-LABEL: v4i64_icmp_uge:798; CHECK: # %bb.0:799; CHECK-NEXT: xvld $xr0, $a1, 0800; CHECK-NEXT: xvld $xr1, $a2, 0801; CHECK-NEXT: xvsle.du $xr0, $xr1, $xr0802; CHECK-NEXT: xvst $xr0, $a0, 0803; CHECK-NEXT: ret804 %v0 = load <4 x i64>, ptr %a0805 %v1 = load <4 x i64>, ptr %a1806 %cmp = icmp uge <4 x i64> %v0, %v1807 %ext = sext <4 x i1> %cmp to <4 x i64>808 store <4 x i64> %ext, ptr %res809 ret void810}811 812;; Expand SETGT813define void @v32i8_icmp_sgt(ptr %res, ptr %a0, ptr %a1) nounwind {814; CHECK-LABEL: v32i8_icmp_sgt:815; CHECK: # %bb.0:816; CHECK-NEXT: xvld $xr0, $a1, 0817; CHECK-NEXT: xvld $xr1, $a2, 0818; CHECK-NEXT: xvslt.b $xr0, $xr1, $xr0819; CHECK-NEXT: xvst $xr0, $a0, 0820; CHECK-NEXT: ret821 %v0 = load <32 x i8>, ptr %a0822 %v1 = load <32 x i8>, ptr %a1823 %cmp = icmp sgt <32 x i8> %v0, %v1824 %ext = sext <32 x i1> %cmp to <32 x i8>825 store <32 x i8> %ext, ptr %res826 ret void827}828 829define void @v16i16_icmp_sgt(ptr %res, ptr %a0, ptr %a1) nounwind {830; CHECK-LABEL: v16i16_icmp_sgt:831; CHECK: # %bb.0:832; CHECK-NEXT: xvld $xr0, $a1, 0833; CHECK-NEXT: xvld $xr1, $a2, 0834; CHECK-NEXT: xvslt.h $xr0, $xr1, $xr0835; CHECK-NEXT: xvst $xr0, $a0, 0836; CHECK-NEXT: ret837 %v0 = load <16 x i16>, ptr %a0838 %v1 = load <16 x i16>, ptr %a1839 %cmp = icmp sgt <16 x i16> %v0, %v1840 %ext = sext <16 x i1> %cmp to <16 x i16>841 store <16 x i16> %ext, ptr %res842 ret void843}844 845define void @v8i32_icmp_sgt(ptr %res, ptr %a0, ptr %a1) nounwind {846; CHECK-LABEL: v8i32_icmp_sgt:847; CHECK: # %bb.0:848; CHECK-NEXT: xvld $xr0, $a1, 0849; CHECK-NEXT: xvld $xr1, $a2, 0850; CHECK-NEXT: xvslt.w $xr0, $xr1, $xr0851; CHECK-NEXT: xvst $xr0, $a0, 0852; CHECK-NEXT: ret853 %v0 = load <8 x i32>, ptr %a0854 %v1 = load <8 x i32>, ptr %a1855 %cmp = icmp sgt <8 x i32> %v0, %v1856 %ext = sext <8 x i1> %cmp to <8 x i32>857 store <8 x i32> %ext, ptr %res858 ret void859}860 861define void @v4i64_icmp_sgt(ptr %res, ptr %a0, ptr %a1) nounwind {862; CHECK-LABEL: v4i64_icmp_sgt:863; CHECK: # %bb.0:864; CHECK-NEXT: xvld $xr0, $a1, 0865; CHECK-NEXT: xvld $xr1, $a2, 0866; CHECK-NEXT: xvslt.d $xr0, $xr1, $xr0867; CHECK-NEXT: xvst $xr0, $a0, 0868; CHECK-NEXT: ret869 %v0 = load <4 x i64>, ptr %a0870 %v1 = load <4 x i64>, ptr %a1871 %cmp = icmp sgt <4 x i64> %v0, %v1872 %ext = sext <4 x i1> %cmp to <4 x i64>873 store <4 x i64> %ext, ptr %res874 ret void875}876 877;; Expand SETUGT878define void @v32i8_icmp_ugt(ptr %res, ptr %a0, ptr %a1) nounwind {879; CHECK-LABEL: v32i8_icmp_ugt:880; CHECK: # %bb.0:881; CHECK-NEXT: xvld $xr0, $a1, 0882; CHECK-NEXT: xvld $xr1, $a2, 0883; CHECK-NEXT: xvslt.bu $xr0, $xr1, $xr0884; CHECK-NEXT: xvst $xr0, $a0, 0885; CHECK-NEXT: ret886 %v0 = load <32 x i8>, ptr %a0887 %v1 = load <32 x i8>, ptr %a1888 %cmp = icmp ugt <32 x i8> %v0, %v1889 %ext = sext <32 x i1> %cmp to <32 x i8>890 store <32 x i8> %ext, ptr %res891 ret void892}893 894define void @v16i16_icmp_ugt(ptr %res, ptr %a0, ptr %a1) nounwind {895; CHECK-LABEL: v16i16_icmp_ugt:896; CHECK: # %bb.0:897; CHECK-NEXT: xvld $xr0, $a1, 0898; CHECK-NEXT: xvld $xr1, $a2, 0899; CHECK-NEXT: xvslt.hu $xr0, $xr1, $xr0900; CHECK-NEXT: xvst $xr0, $a0, 0901; CHECK-NEXT: ret902 %v0 = load <16 x i16>, ptr %a0903 %v1 = load <16 x i16>, ptr %a1904 %cmp = icmp ugt <16 x i16> %v0, %v1905 %ext = sext <16 x i1> %cmp to <16 x i16>906 store <16 x i16> %ext, ptr %res907 ret void908}909 910define void @v8i32_icmp_ugt(ptr %res, ptr %a0, ptr %a1) nounwind {911; CHECK-LABEL: v8i32_icmp_ugt:912; CHECK: # %bb.0:913; CHECK-NEXT: xvld $xr0, $a1, 0914; CHECK-NEXT: xvld $xr1, $a2, 0915; CHECK-NEXT: xvslt.wu $xr0, $xr1, $xr0916; CHECK-NEXT: xvst $xr0, $a0, 0917; CHECK-NEXT: ret918 %v0 = load <8 x i32>, ptr %a0919 %v1 = load <8 x i32>, ptr %a1920 %cmp = icmp ugt <8 x i32> %v0, %v1921 %ext = sext <8 x i1> %cmp to <8 x i32>922 store <8 x i32> %ext, ptr %res923 ret void924}925 926define void @v4i64_icmp_ugt(ptr %res, ptr %a0, ptr %a1) nounwind {927; CHECK-LABEL: v4i64_icmp_ugt:928; CHECK: # %bb.0:929; CHECK-NEXT: xvld $xr0, $a1, 0930; CHECK-NEXT: xvld $xr1, $a2, 0931; CHECK-NEXT: xvslt.du $xr0, $xr1, $xr0932; CHECK-NEXT: xvst $xr0, $a0, 0933; CHECK-NEXT: ret934 %v0 = load <4 x i64>, ptr %a0935 %v1 = load <4 x i64>, ptr %a1936 %cmp = icmp ugt <4 x i64> %v0, %v1937 %ext = sext <4 x i1> %cmp to <4 x i64>938 store <4 x i64> %ext, ptr %res939 ret void940}941