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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 32; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA323; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA644 5define void @insert_32xi8(ptr %src, ptr %dst, i8 %in) nounwind {6; CHECK-LABEL: insert_32xi8:7; CHECK: # %bb.0:8; CHECK-NEXT: xvld $xr0, $a0, 09; CHECK-NEXT: xvreplgr2vr.b $xr1, $a210; CHECK-NEXT: xvpermi.q $xr1, $xr0, 1811; CHECK-NEXT: xvextrins.b $xr0, $xr1, 1712; CHECK-NEXT: xvst $xr0, $a1, 013; CHECK-NEXT: ret14 %v = load volatile <32 x i8>, ptr %src15 %v_new = insertelement <32 x i8> %v, i8 %in, i32 116 store <32 x i8> %v_new, ptr %dst17 ret void18}19 20define void @insert_32xi8_upper(ptr %src, ptr %dst, i8 %in) nounwind {21; CHECK-LABEL: insert_32xi8_upper:22; CHECK: # %bb.0:23; CHECK-NEXT: xvld $xr0, $a0, 024; CHECK-NEXT: xvreplgr2vr.b $xr1, $a225; CHECK-NEXT: xvpermi.q $xr1, $xr0, 4826; CHECK-NEXT: xvextrins.b $xr0, $xr1, 027; CHECK-NEXT: xvst $xr0, $a1, 028; CHECK-NEXT: ret29 %v = load volatile <32 x i8>, ptr %src30 %v_new = insertelement <32 x i8> %v, i8 %in, i32 1631 store <32 x i8> %v_new, ptr %dst32 ret void33}34 35define void @insert_32xi8_undef(ptr %dst, i8 %in) nounwind {36; CHECK-LABEL: insert_32xi8_undef:37; CHECK: # %bb.0:38; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 139; CHECK-NEXT: xvst $xr0, $a0, 040; CHECK-NEXT: ret41 %v = insertelement <32 x i8> poison, i8 %in, i32 142 store <32 x i8> %v, ptr %dst43 ret void44}45 46define void @insert_32xi8_undef_upper(ptr %dst, i8 %in) nounwind {47; CHECK-LABEL: insert_32xi8_undef_upper:48; CHECK: # %bb.0:49; CHECK-NEXT: vinsgr2vr.b $vr0, $a1, 650; CHECK-NEXT: xvpermi.q $xr0, $xr0, 251; CHECK-NEXT: xvst $xr0, $a0, 052; CHECK-NEXT: ret53 %v = insertelement <32 x i8> poison, i8 %in, i32 2254 store <32 x i8> %v, ptr %dst55 ret void56}57 58define void @insert_16xi16(ptr %src, ptr %dst, i16 %in) nounwind {59; CHECK-LABEL: insert_16xi16:60; CHECK: # %bb.0:61; CHECK-NEXT: xvld $xr0, $a0, 062; CHECK-NEXT: xvreplgr2vr.h $xr1, $a263; CHECK-NEXT: xvpermi.q $xr1, $xr0, 1864; CHECK-NEXT: xvextrins.h $xr0, $xr1, 1765; CHECK-NEXT: xvst $xr0, $a1, 066; CHECK-NEXT: ret67 %v = load volatile <16 x i16>, ptr %src68 %v_new = insertelement <16 x i16> %v, i16 %in, i32 169 store <16 x i16> %v_new, ptr %dst70 ret void71}72 73define void @insert_16xi16_upper(ptr %src, ptr %dst, i16 %in) nounwind {74; CHECK-LABEL: insert_16xi16_upper:75; CHECK: # %bb.0:76; CHECK-NEXT: xvld $xr0, $a0, 077; CHECK-NEXT: xvreplgr2vr.h $xr1, $a278; CHECK-NEXT: xvpermi.q $xr1, $xr0, 4879; CHECK-NEXT: xvextrins.h $xr0, $xr1, 080; CHECK-NEXT: xvst $xr0, $a1, 081; CHECK-NEXT: ret82 %v = load volatile <16 x i16>, ptr %src83 %v_new = insertelement <16 x i16> %v, i16 %in, i32 884 store <16 x i16> %v_new, ptr %dst85 ret void86}87 88define void @insert_16xi16_undef(ptr %dst, i16 %in) nounwind {89; CHECK-LABEL: insert_16xi16_undef:90; CHECK: # %bb.0:91; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 192; CHECK-NEXT: xvst $xr0, $a0, 093; CHECK-NEXT: ret94 %v = insertelement <16 x i16> poison, i16 %in, i32 195 store <16 x i16> %v, ptr %dst96 ret void97}98 99define void @insert_16xi16_undef_upper(ptr %dst, i16 %in) nounwind {100; CHECK-LABEL: insert_16xi16_undef_upper:101; CHECK: # %bb.0:102; CHECK-NEXT: vinsgr2vr.h $vr0, $a1, 2103; CHECK-NEXT: xvpermi.q $xr0, $xr0, 2104; CHECK-NEXT: xvst $xr0, $a0, 0105; CHECK-NEXT: ret106 %v = insertelement <16 x i16> poison, i16 %in, i32 10107 store <16 x i16> %v, ptr %dst108 ret void109}110 111define void @insert_8xi32(ptr %src, ptr %dst, i32 %in) nounwind {112; CHECK-LABEL: insert_8xi32:113; CHECK: # %bb.0:114; CHECK-NEXT: xvld $xr0, $a0, 0115; CHECK-NEXT: xvinsgr2vr.w $xr0, $a2, 1116; CHECK-NEXT: xvst $xr0, $a1, 0117; CHECK-NEXT: ret118 %v = load volatile <8 x i32>, ptr %src119 %v_new = insertelement <8 x i32> %v, i32 %in, i32 1120 store <8 x i32> %v_new, ptr %dst121 ret void122}123 124define void @insert_4xi64(ptr %src, ptr %dst, i64 %in) nounwind {125; LA32-LABEL: insert_4xi64:126; LA32: # %bb.0:127; LA32-NEXT: xvld $xr0, $a0, 0128; LA32-NEXT: xvinsgr2vr.w $xr0, $a2, 2129; LA32-NEXT: xvinsgr2vr.w $xr0, $a3, 3130; LA32-NEXT: xvst $xr0, $a1, 0131; LA32-NEXT: ret132;133; LA64-LABEL: insert_4xi64:134; LA64: # %bb.0:135; LA64-NEXT: xvld $xr0, $a0, 0136; LA64-NEXT: xvinsgr2vr.d $xr0, $a2, 1137; LA64-NEXT: xvst $xr0, $a1, 0138; LA64-NEXT: ret139 %v = load volatile <4 x i64>, ptr %src140 %v_new = insertelement <4 x i64> %v, i64 %in, i32 1141 store <4 x i64> %v_new, ptr %dst142 ret void143}144 145define void @insert_8xfloat(ptr %src, ptr %dst, float %in) nounwind {146; CHECK-LABEL: insert_8xfloat:147; CHECK: # %bb.0:148; CHECK-NEXT: xvld $xr1, $a0, 0149; CHECK-NEXT: # kill: def $f0 killed $f0 def $xr0150; CHECK-NEXT: xvinsve0.w $xr1, $xr0, 1151; CHECK-NEXT: xvst $xr1, $a1, 0152; CHECK-NEXT: ret153 %v = load volatile <8 x float>, ptr %src154 %v_new = insertelement <8 x float> %v, float %in, i32 1155 store <8 x float> %v_new, ptr %dst156 ret void157}158 159define void @insert_4xdouble(ptr %src, ptr %dst, double %in) nounwind {160; CHECK-LABEL: insert_4xdouble:161; CHECK: # %bb.0:162; CHECK-NEXT: xvld $xr1, $a0, 0163; CHECK-NEXT: # kill: def $f0_64 killed $f0_64 def $xr0164; CHECK-NEXT: xvinsve0.d $xr1, $xr0, 1165; CHECK-NEXT: xvst $xr1, $a1, 0166; CHECK-NEXT: ret167 %v = load volatile <4 x double>, ptr %src168 %v_new = insertelement <4 x double> %v, double %in, i32 1169 store <4 x double> %v_new, ptr %dst170 ret void171}172 173define void @insert_32xi8_idx(ptr %src, ptr %dst, i8 %in, i32 %idx) nounwind {174; LA32-LABEL: insert_32xi8_idx:175; LA32: # %bb.0:176; LA32-NEXT: pcalau12i $a4, %pc_hi20(.LCPI12_0)177; LA32-NEXT: xvld $xr0, $a4, %pc_lo12(.LCPI12_0)178; LA32-NEXT: xvld $xr1, $a0, 0179; LA32-NEXT: xvreplgr2vr.b $xr2, $a3180; LA32-NEXT: xvseq.b $xr0, $xr2, $xr0181; LA32-NEXT: xvreplgr2vr.b $xr2, $a2182; LA32-NEXT: xvbitsel.v $xr0, $xr1, $xr2, $xr0183; LA32-NEXT: xvst $xr0, $a1, 0184; LA32-NEXT: ret185;186; LA64-LABEL: insert_32xi8_idx:187; LA64: # %bb.0:188; LA64-NEXT: pcalau12i $a4, %pc_hi20(.LCPI12_0)189; LA64-NEXT: xvld $xr0, $a4, %pc_lo12(.LCPI12_0)190; LA64-NEXT: xvld $xr1, $a0, 0191; LA64-NEXT: bstrpick.d $a0, $a3, 31, 0192; LA64-NEXT: xvreplgr2vr.b $xr2, $a0193; LA64-NEXT: xvseq.b $xr0, $xr2, $xr0194; LA64-NEXT: xvreplgr2vr.b $xr2, $a2195; LA64-NEXT: xvbitsel.v $xr0, $xr1, $xr2, $xr0196; LA64-NEXT: xvst $xr0, $a1, 0197; LA64-NEXT: ret198 %v = load volatile <32 x i8>, ptr %src199 %v_new = insertelement <32 x i8> %v, i8 %in, i32 %idx200 store <32 x i8> %v_new, ptr %dst201 ret void202}203 204define void @insert_16xi16_idx(ptr %src, ptr %dst, i16 %in, i32 %idx) nounwind {205; LA32-LABEL: insert_16xi16_idx:206; LA32: # %bb.0:207; LA32-NEXT: pcalau12i $a4, %pc_hi20(.LCPI13_0)208; LA32-NEXT: xvld $xr0, $a4, %pc_lo12(.LCPI13_0)209; LA32-NEXT: xvld $xr1, $a0, 0210; LA32-NEXT: xvreplgr2vr.h $xr2, $a3211; LA32-NEXT: xvseq.h $xr0, $xr2, $xr0212; LA32-NEXT: xvreplgr2vr.h $xr2, $a2213; LA32-NEXT: xvbitsel.v $xr0, $xr1, $xr2, $xr0214; LA32-NEXT: xvst $xr0, $a1, 0215; LA32-NEXT: ret216;217; LA64-LABEL: insert_16xi16_idx:218; LA64: # %bb.0:219; LA64-NEXT: pcalau12i $a4, %pc_hi20(.LCPI13_0)220; LA64-NEXT: xvld $xr0, $a4, %pc_lo12(.LCPI13_0)221; LA64-NEXT: xvld $xr1, $a0, 0222; LA64-NEXT: bstrpick.d $a0, $a3, 31, 0223; LA64-NEXT: xvreplgr2vr.h $xr2, $a0224; LA64-NEXT: xvseq.h $xr0, $xr2, $xr0225; LA64-NEXT: xvreplgr2vr.h $xr2, $a2226; LA64-NEXT: xvbitsel.v $xr0, $xr1, $xr2, $xr0227; LA64-NEXT: xvst $xr0, $a1, 0228; LA64-NEXT: ret229 %v = load volatile <16 x i16>, ptr %src230 %v_new = insertelement <16 x i16> %v, i16 %in, i32 %idx231 store <16 x i16> %v_new, ptr %dst232 ret void233}234 235define void @insert_8xi32_idx(ptr %src, ptr %dst, i32 %in, i32 %idx) nounwind {236; LA32-LABEL: insert_8xi32_idx:237; LA32: # %bb.0:238; LA32-NEXT: pcalau12i $a4, %pc_hi20(.LCPI14_0)239; LA32-NEXT: xvld $xr0, $a4, %pc_lo12(.LCPI14_0)240; LA32-NEXT: xvld $xr1, $a0, 0241; LA32-NEXT: xvreplgr2vr.w $xr2, $a3242; LA32-NEXT: xvseq.w $xr0, $xr2, $xr0243; LA32-NEXT: xvreplgr2vr.w $xr2, $a2244; LA32-NEXT: xvbitsel.v $xr0, $xr1, $xr2, $xr0245; LA32-NEXT: xvst $xr0, $a1, 0246; LA32-NEXT: ret247;248; LA64-LABEL: insert_8xi32_idx:249; LA64: # %bb.0:250; LA64-NEXT: pcalau12i $a4, %pc_hi20(.LCPI14_0)251; LA64-NEXT: xvld $xr0, $a4, %pc_lo12(.LCPI14_0)252; LA64-NEXT: xvld $xr1, $a0, 0253; LA64-NEXT: bstrpick.d $a0, $a3, 31, 0254; LA64-NEXT: xvreplgr2vr.w $xr2, $a0255; LA64-NEXT: xvseq.w $xr0, $xr2, $xr0256; LA64-NEXT: xvreplgr2vr.w $xr2, $a2257; LA64-NEXT: xvbitsel.v $xr0, $xr1, $xr2, $xr0258; LA64-NEXT: xvst $xr0, $a1, 0259; LA64-NEXT: ret260 %v = load volatile <8 x i32>, ptr %src261 %v_new = insertelement <8 x i32> %v, i32 %in, i32 %idx262 store <8 x i32> %v_new, ptr %dst263 ret void264}265 266define void @insert_4xi64_idx(ptr %src, ptr %dst, i64 %in, i32 %idx) nounwind {267; LA32-LABEL: insert_4xi64_idx:268; LA32: # %bb.0:269; LA32-NEXT: pcalau12i $a5, %pc_hi20(.LCPI15_0)270; LA32-NEXT: xvld $xr0, $a5, %pc_lo12(.LCPI15_0)271; LA32-NEXT: add.w $a4, $a4, $a4272; LA32-NEXT: xvld $xr1, $a0, 0273; LA32-NEXT: xvreplgr2vr.w $xr2, $a4274; LA32-NEXT: xvseq.w $xr2, $xr2, $xr0275; LA32-NEXT: xvreplgr2vr.w $xr3, $a2276; LA32-NEXT: xvbitsel.v $xr1, $xr1, $xr3, $xr2277; LA32-NEXT: addi.w $a0, $a4, 1278; LA32-NEXT: xvreplgr2vr.w $xr2, $a0279; LA32-NEXT: xvseq.w $xr0, $xr2, $xr0280; LA32-NEXT: xvreplgr2vr.w $xr2, $a3281; LA32-NEXT: xvbitsel.v $xr0, $xr1, $xr2, $xr0282; LA32-NEXT: xvst $xr0, $a1, 0283; LA32-NEXT: ret284;285; LA64-LABEL: insert_4xi64_idx:286; LA64: # %bb.0:287; LA64-NEXT: pcalau12i $a4, %pc_hi20(.LCPI15_0)288; LA64-NEXT: xvld $xr0, $a4, %pc_lo12(.LCPI15_0)289; LA64-NEXT: xvld $xr1, $a0, 0290; LA64-NEXT: bstrpick.d $a0, $a3, 31, 0291; LA64-NEXT: xvreplgr2vr.d $xr2, $a0292; LA64-NEXT: xvseq.d $xr0, $xr2, $xr0293; LA64-NEXT: xvreplgr2vr.d $xr2, $a2294; LA64-NEXT: xvbitsel.v $xr0, $xr1, $xr2, $xr0295; LA64-NEXT: xvst $xr0, $a1, 0296; LA64-NEXT: ret297 %v = load volatile <4 x i64>, ptr %src298 %v_new = insertelement <4 x i64> %v, i64 %in, i32 %idx299 store <4 x i64> %v_new, ptr %dst300 ret void301}302 303define void @insert_8xfloat_idx(ptr %src, ptr %dst, float %in, i32 %idx) nounwind {304; LA32-LABEL: insert_8xfloat_idx:305; LA32: # %bb.0:306; LA32-NEXT: pcalau12i $a3, %pc_hi20(.LCPI16_0)307; LA32-NEXT: xvld $xr1, $a3, %pc_lo12(.LCPI16_0)308; LA32-NEXT: # kill: def $f0 killed $f0 def $xr0309; LA32-NEXT: xvld $xr2, $a0, 0310; LA32-NEXT: xvreplgr2vr.w $xr3, $a2311; LA32-NEXT: xvseq.w $xr1, $xr3, $xr1312; LA32-NEXT: xvreplve0.w $xr0, $xr0313; LA32-NEXT: xvbitsel.v $xr0, $xr2, $xr0, $xr1314; LA32-NEXT: xvst $xr0, $a1, 0315; LA32-NEXT: ret316;317; LA64-LABEL: insert_8xfloat_idx:318; LA64: # %bb.0:319; LA64-NEXT: # kill: def $f0 killed $f0 def $xr0320; LA64-NEXT: pcalau12i $a3, %pc_hi20(.LCPI16_0)321; LA64-NEXT: xvld $xr1, $a3, %pc_lo12(.LCPI16_0)322; LA64-NEXT: xvld $xr2, $a0, 0323; LA64-NEXT: bstrpick.d $a0, $a2, 31, 0324; LA64-NEXT: xvreplgr2vr.w $xr3, $a0325; LA64-NEXT: xvseq.w $xr1, $xr3, $xr1326; LA64-NEXT: xvreplve0.w $xr0, $xr0327; LA64-NEXT: xvbitsel.v $xr0, $xr2, $xr0, $xr1328; LA64-NEXT: xvst $xr0, $a1, 0329; LA64-NEXT: ret330 %v = load volatile <8 x float>, ptr %src331 %v_new = insertelement <8 x float> %v, float %in, i32 %idx332 store <8 x float> %v_new, ptr %dst333 ret void334}335 336define void @insert_4xdouble_idx(ptr %src, ptr %dst, double %in, i32 %idx) nounwind {337; LA32-LABEL: insert_4xdouble_idx:338; LA32: # %bb.0:339; LA32-NEXT: # kill: def $f0_64 killed $f0_64 def $xr0340; LA32-NEXT: xvld $xr1, $a0, 0341; LA32-NEXT: xvrepli.b $xr2, 0342; LA32-NEXT: xvinsgr2vr.w $xr2, $a2, 0343; LA32-NEXT: pcalau12i $a0, %pc_hi20(.LCPI17_0)344; LA32-NEXT: xvld $xr3, $a0, %pc_lo12(.LCPI17_0)345; LA32-NEXT: xvinsgr2vr.w $xr2, $a2, 2346; LA32-NEXT: xvinsgr2vr.w $xr2, $a2, 4347; LA32-NEXT: xvinsgr2vr.w $xr2, $a2, 6348; LA32-NEXT: xvseq.d $xr2, $xr2, $xr3349; LA32-NEXT: xvreplve0.d $xr0, $xr0350; LA32-NEXT: xvbitsel.v $xr0, $xr1, $xr0, $xr2351; LA32-NEXT: xvst $xr0, $a1, 0352; LA32-NEXT: ret353;354; LA64-LABEL: insert_4xdouble_idx:355; LA64: # %bb.0:356; LA64-NEXT: # kill: def $f0_64 killed $f0_64 def $xr0357; LA64-NEXT: pcalau12i $a3, %pc_hi20(.LCPI17_0)358; LA64-NEXT: xvld $xr1, $a3, %pc_lo12(.LCPI17_0)359; LA64-NEXT: xvld $xr2, $a0, 0360; LA64-NEXT: bstrpick.d $a0, $a2, 31, 0361; LA64-NEXT: xvreplgr2vr.d $xr3, $a0362; LA64-NEXT: xvseq.d $xr1, $xr3, $xr1363; LA64-NEXT: xvreplve0.d $xr0, $xr0364; LA64-NEXT: xvbitsel.v $xr0, $xr2, $xr0, $xr1365; LA64-NEXT: xvst $xr0, $a1, 0366; LA64-NEXT: ret367 %v = load volatile <4 x double>, ptr %src368 %v_new = insertelement <4 x double> %v, double %in, i32 %idx369 store <4 x double> %v_new, ptr %dst370 ret void371}372