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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 42; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s3; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s4 5define void @mul_v32i8(ptr %res, ptr %a0, ptr %a1) nounwind {6; CHECK-LABEL: mul_v32i8:7; CHECK: # %bb.0: # %entry8; CHECK-NEXT: xvld $xr0, $a1, 09; CHECK-NEXT: xvld $xr1, $a2, 010; CHECK-NEXT: xvmul.b $xr0, $xr0, $xr111; CHECK-NEXT: xvst $xr0, $a0, 012; CHECK-NEXT: ret13entry:14 %v0 = load <32 x i8>, ptr %a015 %v1 = load <32 x i8>, ptr %a116 %v2 = mul <32 x i8> %v0, %v117 store <32 x i8> %v2, ptr %res18 ret void19}20 21define void @mul_v16i16(ptr %res, ptr %a0, ptr %a1) nounwind {22; CHECK-LABEL: mul_v16i16:23; CHECK: # %bb.0: # %entry24; CHECK-NEXT: xvld $xr0, $a1, 025; CHECK-NEXT: xvld $xr1, $a2, 026; CHECK-NEXT: xvmul.h $xr0, $xr0, $xr127; CHECK-NEXT: xvst $xr0, $a0, 028; CHECK-NEXT: ret29entry:30 %v0 = load <16 x i16>, ptr %a031 %v1 = load <16 x i16>, ptr %a132 %v2 = mul <16 x i16> %v0, %v133 store <16 x i16> %v2, ptr %res34 ret void35}36 37define void @mul_v8i32(ptr %res, ptr %a0, ptr %a1) nounwind {38; CHECK-LABEL: mul_v8i32:39; CHECK: # %bb.0: # %entry40; CHECK-NEXT: xvld $xr0, $a1, 041; CHECK-NEXT: xvld $xr1, $a2, 042; CHECK-NEXT: xvmul.w $xr0, $xr0, $xr143; CHECK-NEXT: xvst $xr0, $a0, 044; CHECK-NEXT: ret45entry:46 %v0 = load <8 x i32>, ptr %a047 %v1 = load <8 x i32>, ptr %a148 %v2 = mul <8 x i32> %v0, %v149 store <8 x i32> %v2, ptr %res50 ret void51}52 53define void @mul_v4i64(ptr %res, ptr %a0, ptr %a1) nounwind {54; CHECK-LABEL: mul_v4i64:55; CHECK: # %bb.0: # %entry56; CHECK-NEXT: xvld $xr0, $a1, 057; CHECK-NEXT: xvld $xr1, $a2, 058; CHECK-NEXT: xvmul.d $xr0, $xr0, $xr159; CHECK-NEXT: xvst $xr0, $a0, 060; CHECK-NEXT: ret61entry:62 %v0 = load <4 x i64>, ptr %a063 %v1 = load <4 x i64>, ptr %a164 %v2 = mul <4 x i64> %v0, %v165 store <4 x i64> %v2, ptr %res66 ret void67}68 69define void @mul_square_v32i8(ptr %res, ptr %a0) nounwind {70; CHECK-LABEL: mul_square_v32i8:71; CHECK: # %bb.0: # %entry72; CHECK-NEXT: xvld $xr0, $a1, 073; CHECK-NEXT: xvmul.b $xr0, $xr0, $xr074; CHECK-NEXT: xvst $xr0, $a0, 075; CHECK-NEXT: ret76entry:77 %v0 = load <32 x i8>, ptr %a078 %v1 = mul <32 x i8> %v0, %v079 store <32 x i8> %v1, ptr %res80 ret void81}82 83define void @mul_square_v16i16(ptr %res, ptr %a0) nounwind {84; CHECK-LABEL: mul_square_v16i16:85; CHECK: # %bb.0: # %entry86; CHECK-NEXT: xvld $xr0, $a1, 087; CHECK-NEXT: xvmul.h $xr0, $xr0, $xr088; CHECK-NEXT: xvst $xr0, $a0, 089; CHECK-NEXT: ret90entry:91 %v0 = load <16 x i16>, ptr %a092 %v1 = mul <16 x i16> %v0, %v093 store <16 x i16> %v1, ptr %res94 ret void95}96 97define void @mul_square_v8i32(ptr %res, ptr %a0) nounwind {98; CHECK-LABEL: mul_square_v8i32:99; CHECK: # %bb.0: # %entry100; CHECK-NEXT: xvld $xr0, $a1, 0101; CHECK-NEXT: xvmul.w $xr0, $xr0, $xr0102; CHECK-NEXT: xvst $xr0, $a0, 0103; CHECK-NEXT: ret104entry:105 %v0 = load <8 x i32>, ptr %a0106 %v1 = mul <8 x i32> %v0, %v0107 store <8 x i32> %v1, ptr %res108 ret void109}110 111define void @mul_square_v4i64(ptr %res, ptr %a0) nounwind {112; CHECK-LABEL: mul_square_v4i64:113; CHECK: # %bb.0: # %entry114; CHECK-NEXT: xvld $xr0, $a1, 0115; CHECK-NEXT: xvmul.d $xr0, $xr0, $xr0116; CHECK-NEXT: xvst $xr0, $a0, 0117; CHECK-NEXT: ret118entry:119 %v0 = load <4 x i64>, ptr %a0120 %v1 = mul <4 x i64> %v0, %v0121 store <4 x i64> %v1, ptr %res122 ret void123}124 125define void @mul_v32i8_8(ptr %res, ptr %a0) nounwind {126; CHECK-LABEL: mul_v32i8_8:127; CHECK: # %bb.0: # %entry128; CHECK-NEXT: xvld $xr0, $a1, 0129; CHECK-NEXT: xvslli.b $xr0, $xr0, 3130; CHECK-NEXT: xvst $xr0, $a0, 0131; CHECK-NEXT: ret132entry:133 %v0 = load <32 x i8>, ptr %a0134 %v1 = mul <32 x i8> %v0, <i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8, i8 8>135 store <32 x i8> %v1, ptr %res136 ret void137}138 139define void @mul_v16i16_8(ptr %res, ptr %a0) nounwind {140; CHECK-LABEL: mul_v16i16_8:141; CHECK: # %bb.0: # %entry142; CHECK-NEXT: xvld $xr0, $a1, 0143; CHECK-NEXT: xvslli.h $xr0, $xr0, 3144; CHECK-NEXT: xvst $xr0, $a0, 0145; CHECK-NEXT: ret146entry:147 %v0 = load <16 x i16>, ptr %a0148 %v1 = mul <16 x i16> %v0, <i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8, i16 8>149 store <16 x i16> %v1, ptr %res150 ret void151}152 153define void @mul_v8i32_8(ptr %res, ptr %a0) nounwind {154; CHECK-LABEL: mul_v8i32_8:155; CHECK: # %bb.0: # %entry156; CHECK-NEXT: xvld $xr0, $a1, 0157; CHECK-NEXT: xvslli.w $xr0, $xr0, 3158; CHECK-NEXT: xvst $xr0, $a0, 0159; CHECK-NEXT: ret160entry:161 %v0 = load <8 x i32>, ptr %a0162 %v1 = mul <8 x i32> %v0, <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>163 store <8 x i32> %v1, ptr %res164 ret void165}166 167define void @mul_v4i64_8(ptr %res, ptr %a0) nounwind {168; CHECK-LABEL: mul_v4i64_8:169; CHECK: # %bb.0: # %entry170; CHECK-NEXT: xvld $xr0, $a1, 0171; CHECK-NEXT: xvslli.d $xr0, $xr0, 3172; CHECK-NEXT: xvst $xr0, $a0, 0173; CHECK-NEXT: ret174entry:175 %v0 = load <4 x i64>, ptr %a0176 %v1 = mul <4 x i64> %v0, <i64 8, i64 8, i64 8, i64 8>177 store <4 x i64> %v1, ptr %res178 ret void179}180 181define void @mul_v32i8_17(ptr %res, ptr %a0) nounwind {182; CHECK-LABEL: mul_v32i8_17:183; CHECK: # %bb.0: # %entry184; CHECK-NEXT: xvld $xr0, $a1, 0185; CHECK-NEXT: xvrepli.b $xr1, 17186; CHECK-NEXT: xvmul.b $xr0, $xr0, $xr1187; CHECK-NEXT: xvst $xr0, $a0, 0188; CHECK-NEXT: ret189entry:190 %v0 = load <32 x i8>, ptr %a0191 %v1 = mul <32 x i8> %v0, <i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17, i8 17>192 store <32 x i8> %v1, ptr %res193 ret void194}195 196define void @mul_v16i16_17(ptr %res, ptr %a0) nounwind {197; CHECK-LABEL: mul_v16i16_17:198; CHECK: # %bb.0: # %entry199; CHECK-NEXT: xvld $xr0, $a1, 0200; CHECK-NEXT: xvrepli.h $xr1, 17201; CHECK-NEXT: xvmul.h $xr0, $xr0, $xr1202; CHECK-NEXT: xvst $xr0, $a0, 0203; CHECK-NEXT: ret204entry:205 %v0 = load <16 x i16>, ptr %a0206 %v1 = mul <16 x i16> %v0, <i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17, i16 17>207 store <16 x i16> %v1, ptr %res208 ret void209}210 211define void @mul_v8i32_17(ptr %res, ptr %a0) nounwind {212; CHECK-LABEL: mul_v8i32_17:213; CHECK: # %bb.0: # %entry214; CHECK-NEXT: xvld $xr0, $a1, 0215; CHECK-NEXT: xvrepli.w $xr1, 17216; CHECK-NEXT: xvmul.w $xr0, $xr0, $xr1217; CHECK-NEXT: xvst $xr0, $a0, 0218; CHECK-NEXT: ret219entry:220 %v0 = load <8 x i32>, ptr %a0221 %v1 = mul <8 x i32> %v0, <i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17, i32 17>222 store <8 x i32> %v1, ptr %res223 ret void224}225 226define void @mul_v4i64_17(ptr %res, ptr %a0) nounwind {227; CHECK-LABEL: mul_v4i64_17:228; CHECK: # %bb.0: # %entry229; CHECK-NEXT: xvld $xr0, $a1, 0230; CHECK-NEXT: xvrepli.d $xr1, 17231; CHECK-NEXT: xvmul.d $xr0, $xr0, $xr1232; CHECK-NEXT: xvst $xr0, $a0, 0233; CHECK-NEXT: ret234entry:235 %v0 = load <4 x i64>, ptr %a0236 %v1 = mul <4 x i64> %v0, <i64 17, i64 17, i64 17, i64 17>237 store <4 x i64> %v1, ptr %res238 ret void239}240