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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 62; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA323; RUN: llc --mtriple=loongarch64 --mattr=+lasx < %s | FileCheck %s --check-prefixes=CHECK,LA644 5define void @rotl_v32i8(ptr %dst, ptr %src, i8 signext %a0) nounwind {6; CHECK-LABEL: rotl_v32i8:7; CHECK: # %bb.0:8; CHECK-NEXT: xvld $xr0, $a1, 09; CHECK-NEXT: xvreplgr2vr.b $xr1, $a210; CHECK-NEXT: xvneg.b $xr1, $xr111; CHECK-NEXT: xvrotr.b $xr0, $xr0, $xr112; CHECK-NEXT: xvst $xr0, $a0, 013; CHECK-NEXT: ret14 %v0 = load <32 x i8>, ptr %src15 %v1.ele = insertelement <32 x i8> poison, i8 %a0, i8 016 %v1 = shufflevector <32 x i8> %v1.ele, <32 x i8> poison, <32 x i32> zeroinitializer17 %v1.sub = sub <32 x i8> splat (i8 8), %v118 %b = shl <32 x i8> %v0, %v119 %c = lshr <32 x i8> %v0, %v1.sub20 %d = or <32 x i8> %b, %c21 store <32 x i8> %d, ptr %dst22 ret void23}24 25define void @rotr_v32i8(ptr %dst, ptr %src, i8 signext %a0) nounwind {26; CHECK-LABEL: rotr_v32i8:27; CHECK: # %bb.0:28; CHECK-NEXT: xvld $xr0, $a1, 029; CHECK-NEXT: xvreplgr2vr.b $xr1, $a230; CHECK-NEXT: xvrotr.b $xr0, $xr0, $xr131; CHECK-NEXT: xvst $xr0, $a0, 032; CHECK-NEXT: ret33 %v0 = load <32 x i8>, ptr %src34 %v1.ele = insertelement <32 x i8> poison, i8 %a0, i8 035 %v1 = shufflevector <32 x i8> %v1.ele, <32 x i8> poison, <32 x i32> zeroinitializer36 %v1.sub = sub <32 x i8> splat (i8 8), %v137 %b = lshr <32 x i8> %v0, %v138 %c = shl <32 x i8> %v0, %v1.sub39 %d = or <32 x i8> %b, %c40 store <32 x i8> %d, ptr %dst41 ret void42}43 44define void @rotr_v32i8_imm(ptr %dst, ptr %src) nounwind {45; CHECK-LABEL: rotr_v32i8_imm:46; CHECK: # %bb.0:47; CHECK-NEXT: xvld $xr0, $a1, 048; CHECK-NEXT: xvrotri.b $xr0, $xr0, 249; CHECK-NEXT: xvst $xr0, $a0, 050; CHECK-NEXT: ret51 %v0 = load <32 x i8>, ptr %src52 %b = lshr <32 x i8> %v0, splat (i8 2)53 %c = shl <32 x i8> %v0, splat (i8 6)54 %d = or <32 x i8> %b, %c55 store <32 x i8> %d, ptr %dst56 ret void57}58 59define void @rotl_v16i16(ptr %dst, ptr %src, i16 signext %a0) nounwind {60; CHECK-LABEL: rotl_v16i16:61; CHECK: # %bb.0:62; CHECK-NEXT: xvld $xr0, $a1, 063; CHECK-NEXT: xvreplgr2vr.h $xr1, $a264; CHECK-NEXT: xvneg.h $xr1, $xr165; CHECK-NEXT: xvrotr.h $xr0, $xr0, $xr166; CHECK-NEXT: xvst $xr0, $a0, 067; CHECK-NEXT: ret68 %v0 = load <16 x i16>, ptr %src69 %v1.ele = insertelement <16 x i16> poison, i16 %a0, i16 070 %v1 = shufflevector <16 x i16> %v1.ele, <16 x i16> poison, <16 x i32> zeroinitializer71 %v1.sub = sub <16 x i16> splat (i16 16), %v172 %b = shl <16 x i16> %v0, %v173 %c = lshr <16 x i16> %v0, %v1.sub74 %d = or <16 x i16> %b, %c75 store <16 x i16> %d, ptr %dst76 ret void77}78 79define void @rotr_v16i16(ptr %dst, ptr %src, i16 signext %a0) nounwind {80; CHECK-LABEL: rotr_v16i16:81; CHECK: # %bb.0:82; CHECK-NEXT: xvld $xr0, $a1, 083; CHECK-NEXT: xvreplgr2vr.h $xr1, $a284; CHECK-NEXT: xvrotr.h $xr0, $xr0, $xr185; CHECK-NEXT: xvst $xr0, $a0, 086; CHECK-NEXT: ret87 %v0 = load <16 x i16>, ptr %src88 %v1.ele = insertelement <16 x i16> poison, i16 %a0, i16 089 %v1 = shufflevector <16 x i16> %v1.ele, <16 x i16> poison, <16 x i32> zeroinitializer90 %v1.sub = sub <16 x i16> splat (i16 16), %v191 %b = lshr <16 x i16> %v0, %v192 %c = shl <16 x i16> %v0, %v1.sub93 %d = or <16 x i16> %b, %c94 store <16 x i16> %d, ptr %dst95 ret void96}97 98define void @rotr_v16i16_imm(ptr %dst, ptr %src) nounwind {99; CHECK-LABEL: rotr_v16i16_imm:100; CHECK: # %bb.0:101; CHECK-NEXT: xvld $xr0, $a1, 0102; CHECK-NEXT: xvrotri.h $xr0, $xr0, 2103; CHECK-NEXT: xvst $xr0, $a0, 0104; CHECK-NEXT: ret105 %v0 = load <16 x i16>, ptr %src106 %b = lshr <16 x i16> %v0, splat (i16 2)107 %c = shl <16 x i16> %v0, splat (i16 14)108 %d = or <16 x i16> %b, %c109 store <16 x i16> %d, ptr %dst110 ret void111}112 113define void @rotl_v8i32(ptr %dst, ptr %src, i32 signext %a0) nounwind {114; CHECK-LABEL: rotl_v8i32:115; CHECK: # %bb.0:116; CHECK-NEXT: xvld $xr0, $a1, 0117; CHECK-NEXT: xvreplgr2vr.w $xr1, $a2118; CHECK-NEXT: xvneg.w $xr1, $xr1119; CHECK-NEXT: xvrotr.w $xr0, $xr0, $xr1120; CHECK-NEXT: xvst $xr0, $a0, 0121; CHECK-NEXT: ret122 %v0 = load <8 x i32>, ptr %src123 %v1.ele = insertelement <8 x i32> poison, i32 %a0, i32 0124 %v1 = shufflevector <8 x i32> %v1.ele, <8 x i32> poison, <8 x i32> zeroinitializer125 %v1.sub = sub <8 x i32> splat (i32 32), %v1126 %b = shl <8 x i32> %v0, %v1127 %c = lshr <8 x i32> %v0, %v1.sub128 %d = or <8 x i32> %b, %c129 store <8 x i32> %d, ptr %dst130 ret void131}132 133define void @rotr_v8i32(ptr %dst, ptr %src, i32 signext %a0) nounwind {134; CHECK-LABEL: rotr_v8i32:135; CHECK: # %bb.0:136; CHECK-NEXT: xvld $xr0, $a1, 0137; CHECK-NEXT: xvreplgr2vr.w $xr1, $a2138; CHECK-NEXT: xvrotr.w $xr0, $xr0, $xr1139; CHECK-NEXT: xvst $xr0, $a0, 0140; CHECK-NEXT: ret141 %v0 = load <8 x i32>, ptr %src142 %v1.ele = insertelement <8 x i32> poison, i32 %a0, i32 0143 %v1 = shufflevector <8 x i32> %v1.ele, <8 x i32> poison, <8 x i32> zeroinitializer144 %v1.sub = sub <8 x i32> splat (i32 32), %v1145 %b = lshr <8 x i32> %v0, %v1146 %c = shl <8 x i32> %v0, %v1.sub147 %d = or <8 x i32> %b, %c148 store <8 x i32> %d, ptr %dst149 ret void150}151 152define void @rotr_v8i32_imm(ptr %dst, ptr %src) nounwind {153; CHECK-LABEL: rotr_v8i32_imm:154; CHECK: # %bb.0:155; CHECK-NEXT: xvld $xr0, $a1, 0156; CHECK-NEXT: xvrotri.w $xr0, $xr0, 2157; CHECK-NEXT: xvst $xr0, $a0, 0158; CHECK-NEXT: ret159 %v0 = load <8 x i32>, ptr %src160 %b = lshr <8 x i32> %v0, splat (i32 2)161 %c = shl <8 x i32> %v0, splat (i32 30)162 %d = or <8 x i32> %b, %c163 store <8 x i32> %d, ptr %dst164 ret void165}166 167define void @rotl_v4i64(ptr %dst, ptr %src, i64 %a0) nounwind {168; LA32-LABEL: rotl_v4i64:169; LA32: # %bb.0:170; LA32-NEXT: xvld $xr0, $a1, 0171; LA32-NEXT: vinsgr2vr.w $vr1, $a2, 0172; LA32-NEXT: vinsgr2vr.w $vr1, $a2, 2173; LA32-NEXT: xvpermi.q $xr1, $xr1, 2174; LA32-NEXT: xvneg.d $xr1, $xr1175; LA32-NEXT: xvrotr.d $xr0, $xr0, $xr1176; LA32-NEXT: xvst $xr0, $a0, 0177; LA32-NEXT: ret178;179; LA64-LABEL: rotl_v4i64:180; LA64: # %bb.0:181; LA64-NEXT: xvld $xr0, $a1, 0182; LA64-NEXT: xvreplgr2vr.d $xr1, $a2183; LA64-NEXT: xvneg.d $xr1, $xr1184; LA64-NEXT: xvrotr.d $xr0, $xr0, $xr1185; LA64-NEXT: xvst $xr0, $a0, 0186; LA64-NEXT: ret187 %v0 = load <4 x i64>, ptr %src188 %v1.ele = insertelement <4 x i64> poison, i64 %a0, i64 0189 %v1 = shufflevector <4 x i64> %v1.ele, <4 x i64> poison, <4 x i32> zeroinitializer190 %v1.sub = sub <4 x i64> splat (i64 64), %v1191 %b = shl <4 x i64> %v0, %v1192 %c = lshr <4 x i64> %v0, %v1.sub193 %d = or <4 x i64> %b, %c194 store <4 x i64> %d, ptr %dst195 ret void196}197 198define void @rotr_v4i64(ptr %dst, ptr %src, i64 %a0) nounwind {199; LA32-LABEL: rotr_v4i64:200; LA32: # %bb.0:201; LA32-NEXT: xvld $xr0, $a1, 0202; LA32-NEXT: vinsgr2vr.w $vr1, $a2, 0203; LA32-NEXT: vinsgr2vr.w $vr1, $a2, 2204; LA32-NEXT: xvpermi.q $xr1, $xr1, 2205; LA32-NEXT: xvrotr.d $xr0, $xr0, $xr1206; LA32-NEXT: xvst $xr0, $a0, 0207; LA32-NEXT: ret208;209; LA64-LABEL: rotr_v4i64:210; LA64: # %bb.0:211; LA64-NEXT: xvld $xr0, $a1, 0212; LA64-NEXT: xvreplgr2vr.d $xr1, $a2213; LA64-NEXT: xvrotr.d $xr0, $xr0, $xr1214; LA64-NEXT: xvst $xr0, $a0, 0215; LA64-NEXT: ret216 %v0 = load <4 x i64>, ptr %src217 %v1.ele = insertelement <4 x i64> poison, i64 %a0, i64 0218 %v1 = shufflevector <4 x i64> %v1.ele, <4 x i64> poison, <4 x i32> zeroinitializer219 %v1.sub = sub <4 x i64> splat (i64 64), %v1220 %b = lshr <4 x i64> %v0, %v1221 %c = shl <4 x i64> %v0, %v1.sub222 %d = or <4 x i64> %b, %c223 store <4 x i64> %d, ptr %dst224 ret void225}226 227define void @rotr_v4i64_imm(ptr %dst, ptr %src) nounwind {228; LA32-LABEL: rotr_v4i64_imm:229; LA32: # %bb.0:230; LA32-NEXT: xvld $xr0, $a1, 0231; LA32-NEXT: xvrepli.w $xr1, -62232; LA32-NEXT: xvrotr.d $xr0, $xr0, $xr1233; LA32-NEXT: xvst $xr0, $a0, 0234; LA32-NEXT: ret235;236; LA64-LABEL: rotr_v4i64_imm:237; LA64: # %bb.0:238; LA64-NEXT: xvld $xr0, $a1, 0239; LA64-NEXT: xvrotri.d $xr0, $xr0, 2240; LA64-NEXT: xvst $xr0, $a0, 0241; LA64-NEXT: ret242 %v0 = load <4 x i64>, ptr %src243 %b = lshr <4 x i64> %v0, splat (i64 2)244 %c = shl <4 x i64> %v0, splat (i64 62)245 %d = or <4 x i64> %b, %c246 store <4 x i64> %d, ptr %dst247 ret void248}249