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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 62; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lasx < %s | FileCheck %s3; RUN: llc --mtriple=loongarch64 --mattr=+lasx %s -o - | FileCheck %s4 5define void @shufflevector_reverse_v32i8(ptr %res, ptr %a) nounwind {6; CHECK-LABEL: shufflevector_reverse_v32i8:7; CHECK: # %bb.0: # %entry8; CHECK-NEXT: xvld $xr0, $a1, 09; CHECK-NEXT: xvpermi.d $xr0, $xr0, 7810; CHECK-NEXT: xvshuf4i.w $xr0, $xr0, 2711; CHECK-NEXT: xvshuf4i.b $xr0, $xr0, 2712; CHECK-NEXT: xvst $xr0, $a0, 013; CHECK-NEXT: ret14entry:15 %va = load <32 x i8>, ptr %a16 %b = shufflevector <32 x i8> %va, <32 x i8> poison, <32 x i32> <i32 31, i32 30, i32 29, i32 28, i32 27, i32 26, i32 25, i32 24, i32 23, i32 22, i32 21, i32 20, i32 19, i32 18, i32 17, i32 16, i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>17 store <32 x i8> %b, ptr %res18 ret void19}20 21define void @shufflevector_reverse_v16i16(ptr %res, ptr %a) nounwind {22; CHECK-LABEL: shufflevector_reverse_v16i16:23; CHECK: # %bb.0: # %entry24; CHECK-NEXT: xvld $xr0, $a1, 025; CHECK-NEXT: xvpermi.d $xr0, $xr0, 2726; CHECK-NEXT: xvshuf4i.h $xr0, $xr0, 2727; CHECK-NEXT: xvst $xr0, $a0, 028; CHECK-NEXT: ret29entry:30 %va = load <16 x i16>, ptr %a31 %b = shufflevector <16 x i16> %va, <16 x i16> poison, <16 x i32> <i32 15, i32 14, i32 13, i32 12, i32 11, i32 10, i32 9, i32 8, i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>32 store <16 x i16> %b, ptr %res33 ret void34}35 36define void @shufflevector_reverse_v8i32(ptr %res, ptr %a) nounwind {37; CHECK-LABEL: shufflevector_reverse_v8i32:38; CHECK: # %bb.0: # %entry39; CHECK-NEXT: xvld $xr0, $a1, 040; CHECK-NEXT: xvpermi.d $xr0, $xr0, 7841; CHECK-NEXT: xvshuf4i.w $xr0, $xr0, 2742; CHECK-NEXT: xvst $xr0, $a0, 043; CHECK-NEXT: ret44entry:45 %va = load <8 x i32>, ptr %a46 %b = shufflevector <8 x i32> %va, <8 x i32> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>47 store <8 x i32> %b, ptr %res48 ret void49}50 51define void @shufflevector_reverse_v4i64(ptr %res, ptr %a) nounwind {52; CHECK-LABEL: shufflevector_reverse_v4i64:53; CHECK: # %bb.0: # %entry54; CHECK-NEXT: xvld $xr0, $a1, 055; CHECK-NEXT: xvpermi.d $xr0, $xr0, 2756; CHECK-NEXT: xvst $xr0, $a0, 057; CHECK-NEXT: ret58entry:59 %va = load <4 x i64>, ptr %a60 %b = shufflevector <4 x i64> %va, <4 x i64> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>61 store <4 x i64> %b, ptr %res62 ret void63}64 65define void @shufflevector_reverse_v8f32(ptr %res, ptr %a) nounwind {66; CHECK-LABEL: shufflevector_reverse_v8f32:67; CHECK: # %bb.0: # %entry68; CHECK-NEXT: xvld $xr0, $a1, 069; CHECK-NEXT: xvpermi.d $xr0, $xr0, 7870; CHECK-NEXT: xvshuf4i.w $xr0, $xr0, 2771; CHECK-NEXT: xvst $xr0, $a0, 072; CHECK-NEXT: ret73entry:74 %va = load <8 x float>, ptr %a75 %b = shufflevector <8 x float> %va, <8 x float> poison, <8 x i32> <i32 7, i32 6, i32 5, i32 4, i32 3, i32 2, i32 1, i32 0>76 store <8 x float> %b, ptr %res77 ret void78}79 80define void @shufflevector_reverse_v4f64(ptr %res, ptr %a) nounwind {81; CHECK-LABEL: shufflevector_reverse_v4f64:82; CHECK: # %bb.0: # %entry83; CHECK-NEXT: xvld $xr0, $a1, 084; CHECK-NEXT: xvpermi.d $xr0, $xr0, 2785; CHECK-NEXT: xvst $xr0, $a0, 086; CHECK-NEXT: ret87entry:88 %va = load <4 x double>, ptr %a89 %b = shufflevector <4 x double> %va, <4 x double> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0>90 store <4 x double> %b, ptr %res91 ret void92}93