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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lsx < %s | FileCheck %s3; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s4 5declare <4 x i32> @llvm.loongarch.lsx.vfcmp.caf.s(<4 x float>, <4 x float>)6 7define <4 x i32> @lsx_vfcmp_caf_s(<4 x float> %va, <4 x float> %vb) nounwind {8; CHECK-LABEL: lsx_vfcmp_caf_s:9; CHECK: # %bb.0: # %entry10; CHECK-NEXT: vfcmp.caf.s $vr0, $vr0, $vr111; CHECK-NEXT: ret12entry:13 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.caf.s(<4 x float> %va, <4 x float> %vb)14 ret <4 x i32> %res15}16 17declare <2 x i64> @llvm.loongarch.lsx.vfcmp.caf.d(<2 x double>, <2 x double>)18 19define <2 x i64> @lsx_vfcmp_caf_d(<2 x double> %va, <2 x double> %vb) nounwind {20; CHECK-LABEL: lsx_vfcmp_caf_d:21; CHECK: # %bb.0: # %entry22; CHECK-NEXT: vfcmp.caf.d $vr0, $vr0, $vr123; CHECK-NEXT: ret24entry:25 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.caf.d(<2 x double> %va, <2 x double> %vb)26 ret <2 x i64> %res27}28 29declare <4 x i32> @llvm.loongarch.lsx.vfcmp.cun.s(<4 x float>, <4 x float>)30 31define <4 x i32> @lsx_vfcmp_cun_s(<4 x float> %va, <4 x float> %vb) nounwind {32; CHECK-LABEL: lsx_vfcmp_cun_s:33; CHECK: # %bb.0: # %entry34; CHECK-NEXT: vfcmp.cun.s $vr0, $vr0, $vr135; CHECK-NEXT: ret36entry:37 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.cun.s(<4 x float> %va, <4 x float> %vb)38 ret <4 x i32> %res39}40 41declare <2 x i64> @llvm.loongarch.lsx.vfcmp.cun.d(<2 x double>, <2 x double>)42 43define <2 x i64> @lsx_vfcmp_cun_d(<2 x double> %va, <2 x double> %vb) nounwind {44; CHECK-LABEL: lsx_vfcmp_cun_d:45; CHECK: # %bb.0: # %entry46; CHECK-NEXT: vfcmp.cun.d $vr0, $vr0, $vr147; CHECK-NEXT: ret48entry:49 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.cun.d(<2 x double> %va, <2 x double> %vb)50 ret <2 x i64> %res51}52 53declare <4 x i32> @llvm.loongarch.lsx.vfcmp.ceq.s(<4 x float>, <4 x float>)54 55define <4 x i32> @lsx_vfcmp_ceq_s(<4 x float> %va, <4 x float> %vb) nounwind {56; CHECK-LABEL: lsx_vfcmp_ceq_s:57; CHECK: # %bb.0: # %entry58; CHECK-NEXT: vfcmp.ceq.s $vr0, $vr0, $vr159; CHECK-NEXT: ret60entry:61 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.ceq.s(<4 x float> %va, <4 x float> %vb)62 ret <4 x i32> %res63}64 65declare <2 x i64> @llvm.loongarch.lsx.vfcmp.ceq.d(<2 x double>, <2 x double>)66 67define <2 x i64> @lsx_vfcmp_ceq_d(<2 x double> %va, <2 x double> %vb) nounwind {68; CHECK-LABEL: lsx_vfcmp_ceq_d:69; CHECK: # %bb.0: # %entry70; CHECK-NEXT: vfcmp.ceq.d $vr0, $vr0, $vr171; CHECK-NEXT: ret72entry:73 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.ceq.d(<2 x double> %va, <2 x double> %vb)74 ret <2 x i64> %res75}76 77declare <4 x i32> @llvm.loongarch.lsx.vfcmp.cueq.s(<4 x float>, <4 x float>)78 79define <4 x i32> @lsx_vfcmp_cueq_s(<4 x float> %va, <4 x float> %vb) nounwind {80; CHECK-LABEL: lsx_vfcmp_cueq_s:81; CHECK: # %bb.0: # %entry82; CHECK-NEXT: vfcmp.cueq.s $vr0, $vr0, $vr183; CHECK-NEXT: ret84entry:85 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.cueq.s(<4 x float> %va, <4 x float> %vb)86 ret <4 x i32> %res87}88 89declare <2 x i64> @llvm.loongarch.lsx.vfcmp.cueq.d(<2 x double>, <2 x double>)90 91define <2 x i64> @lsx_vfcmp_cueq_d(<2 x double> %va, <2 x double> %vb) nounwind {92; CHECK-LABEL: lsx_vfcmp_cueq_d:93; CHECK: # %bb.0: # %entry94; CHECK-NEXT: vfcmp.cueq.d $vr0, $vr0, $vr195; CHECK-NEXT: ret96entry:97 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.cueq.d(<2 x double> %va, <2 x double> %vb)98 ret <2 x i64> %res99}100 101declare <4 x i32> @llvm.loongarch.lsx.vfcmp.clt.s(<4 x float>, <4 x float>)102 103define <4 x i32> @lsx_vfcmp_clt_s(<4 x float> %va, <4 x float> %vb) nounwind {104; CHECK-LABEL: lsx_vfcmp_clt_s:105; CHECK: # %bb.0: # %entry106; CHECK-NEXT: vfcmp.clt.s $vr0, $vr0, $vr1107; CHECK-NEXT: ret108entry:109 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.clt.s(<4 x float> %va, <4 x float> %vb)110 ret <4 x i32> %res111}112 113declare <2 x i64> @llvm.loongarch.lsx.vfcmp.clt.d(<2 x double>, <2 x double>)114 115define <2 x i64> @lsx_vfcmp_clt_d(<2 x double> %va, <2 x double> %vb) nounwind {116; CHECK-LABEL: lsx_vfcmp_clt_d:117; CHECK: # %bb.0: # %entry118; CHECK-NEXT: vfcmp.clt.d $vr0, $vr0, $vr1119; CHECK-NEXT: ret120entry:121 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.clt.d(<2 x double> %va, <2 x double> %vb)122 ret <2 x i64> %res123}124 125declare <4 x i32> @llvm.loongarch.lsx.vfcmp.cult.s(<4 x float>, <4 x float>)126 127define <4 x i32> @lsx_vfcmp_cult_s(<4 x float> %va, <4 x float> %vb) nounwind {128; CHECK-LABEL: lsx_vfcmp_cult_s:129; CHECK: # %bb.0: # %entry130; CHECK-NEXT: vfcmp.cult.s $vr0, $vr0, $vr1131; CHECK-NEXT: ret132entry:133 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.cult.s(<4 x float> %va, <4 x float> %vb)134 ret <4 x i32> %res135}136 137declare <2 x i64> @llvm.loongarch.lsx.vfcmp.cult.d(<2 x double>, <2 x double>)138 139define <2 x i64> @lsx_vfcmp_cult_d(<2 x double> %va, <2 x double> %vb) nounwind {140; CHECK-LABEL: lsx_vfcmp_cult_d:141; CHECK: # %bb.0: # %entry142; CHECK-NEXT: vfcmp.cult.d $vr0, $vr0, $vr1143; CHECK-NEXT: ret144entry:145 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.cult.d(<2 x double> %va, <2 x double> %vb)146 ret <2 x i64> %res147}148 149declare <4 x i32> @llvm.loongarch.lsx.vfcmp.cle.s(<4 x float>, <4 x float>)150 151define <4 x i32> @lsx_vfcmp_cle_s(<4 x float> %va, <4 x float> %vb) nounwind {152; CHECK-LABEL: lsx_vfcmp_cle_s:153; CHECK: # %bb.0: # %entry154; CHECK-NEXT: vfcmp.cle.s $vr0, $vr0, $vr1155; CHECK-NEXT: ret156entry:157 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.cle.s(<4 x float> %va, <4 x float> %vb)158 ret <4 x i32> %res159}160 161declare <2 x i64> @llvm.loongarch.lsx.vfcmp.cle.d(<2 x double>, <2 x double>)162 163define <2 x i64> @lsx_vfcmp_cle_d(<2 x double> %va, <2 x double> %vb) nounwind {164; CHECK-LABEL: lsx_vfcmp_cle_d:165; CHECK: # %bb.0: # %entry166; CHECK-NEXT: vfcmp.cle.d $vr0, $vr0, $vr1167; CHECK-NEXT: ret168entry:169 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.cle.d(<2 x double> %va, <2 x double> %vb)170 ret <2 x i64> %res171}172 173declare <4 x i32> @llvm.loongarch.lsx.vfcmp.cule.s(<4 x float>, <4 x float>)174 175define <4 x i32> @lsx_vfcmp_cule_s(<4 x float> %va, <4 x float> %vb) nounwind {176; CHECK-LABEL: lsx_vfcmp_cule_s:177; CHECK: # %bb.0: # %entry178; CHECK-NEXT: vfcmp.cule.s $vr0, $vr0, $vr1179; CHECK-NEXT: ret180entry:181 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.cule.s(<4 x float> %va, <4 x float> %vb)182 ret <4 x i32> %res183}184 185declare <2 x i64> @llvm.loongarch.lsx.vfcmp.cule.d(<2 x double>, <2 x double>)186 187define <2 x i64> @lsx_vfcmp_cule_d(<2 x double> %va, <2 x double> %vb) nounwind {188; CHECK-LABEL: lsx_vfcmp_cule_d:189; CHECK: # %bb.0: # %entry190; CHECK-NEXT: vfcmp.cule.d $vr0, $vr0, $vr1191; CHECK-NEXT: ret192entry:193 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.cule.d(<2 x double> %va, <2 x double> %vb)194 ret <2 x i64> %res195}196 197declare <4 x i32> @llvm.loongarch.lsx.vfcmp.cne.s(<4 x float>, <4 x float>)198 199define <4 x i32> @lsx_vfcmp_cne_s(<4 x float> %va, <4 x float> %vb) nounwind {200; CHECK-LABEL: lsx_vfcmp_cne_s:201; CHECK: # %bb.0: # %entry202; CHECK-NEXT: vfcmp.cne.s $vr0, $vr0, $vr1203; CHECK-NEXT: ret204entry:205 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.cne.s(<4 x float> %va, <4 x float> %vb)206 ret <4 x i32> %res207}208 209declare <2 x i64> @llvm.loongarch.lsx.vfcmp.cne.d(<2 x double>, <2 x double>)210 211define <2 x i64> @lsx_vfcmp_cne_d(<2 x double> %va, <2 x double> %vb) nounwind {212; CHECK-LABEL: lsx_vfcmp_cne_d:213; CHECK: # %bb.0: # %entry214; CHECK-NEXT: vfcmp.cne.d $vr0, $vr0, $vr1215; CHECK-NEXT: ret216entry:217 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.cne.d(<2 x double> %va, <2 x double> %vb)218 ret <2 x i64> %res219}220 221declare <4 x i32> @llvm.loongarch.lsx.vfcmp.cor.s(<4 x float>, <4 x float>)222 223define <4 x i32> @lsx_vfcmp_cor_s(<4 x float> %va, <4 x float> %vb) nounwind {224; CHECK-LABEL: lsx_vfcmp_cor_s:225; CHECK: # %bb.0: # %entry226; CHECK-NEXT: vfcmp.cor.s $vr0, $vr0, $vr1227; CHECK-NEXT: ret228entry:229 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.cor.s(<4 x float> %va, <4 x float> %vb)230 ret <4 x i32> %res231}232 233declare <2 x i64> @llvm.loongarch.lsx.vfcmp.cor.d(<2 x double>, <2 x double>)234 235define <2 x i64> @lsx_vfcmp_cor_d(<2 x double> %va, <2 x double> %vb) nounwind {236; CHECK-LABEL: lsx_vfcmp_cor_d:237; CHECK: # %bb.0: # %entry238; CHECK-NEXT: vfcmp.cor.d $vr0, $vr0, $vr1239; CHECK-NEXT: ret240entry:241 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.cor.d(<2 x double> %va, <2 x double> %vb)242 ret <2 x i64> %res243}244 245declare <4 x i32> @llvm.loongarch.lsx.vfcmp.cune.s(<4 x float>, <4 x float>)246 247define <4 x i32> @lsx_vfcmp_cune_s(<4 x float> %va, <4 x float> %vb) nounwind {248; CHECK-LABEL: lsx_vfcmp_cune_s:249; CHECK: # %bb.0: # %entry250; CHECK-NEXT: vfcmp.cune.s $vr0, $vr0, $vr1251; CHECK-NEXT: ret252entry:253 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.cune.s(<4 x float> %va, <4 x float> %vb)254 ret <4 x i32> %res255}256 257declare <2 x i64> @llvm.loongarch.lsx.vfcmp.cune.d(<2 x double>, <2 x double>)258 259define <2 x i64> @lsx_vfcmp_cune_d(<2 x double> %va, <2 x double> %vb) nounwind {260; CHECK-LABEL: lsx_vfcmp_cune_d:261; CHECK: # %bb.0: # %entry262; CHECK-NEXT: vfcmp.cune.d $vr0, $vr0, $vr1263; CHECK-NEXT: ret264entry:265 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.cune.d(<2 x double> %va, <2 x double> %vb)266 ret <2 x i64> %res267}268 269declare <4 x i32> @llvm.loongarch.lsx.vfcmp.saf.s(<4 x float>, <4 x float>)270 271define <4 x i32> @lsx_vfcmp_saf_s(<4 x float> %va, <4 x float> %vb) nounwind {272; CHECK-LABEL: lsx_vfcmp_saf_s:273; CHECK: # %bb.0: # %entry274; CHECK-NEXT: vfcmp.saf.s $vr0, $vr0, $vr1275; CHECK-NEXT: ret276entry:277 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.saf.s(<4 x float> %va, <4 x float> %vb)278 ret <4 x i32> %res279}280 281declare <2 x i64> @llvm.loongarch.lsx.vfcmp.saf.d(<2 x double>, <2 x double>)282 283define <2 x i64> @lsx_vfcmp_saf_d(<2 x double> %va, <2 x double> %vb) nounwind {284; CHECK-LABEL: lsx_vfcmp_saf_d:285; CHECK: # %bb.0: # %entry286; CHECK-NEXT: vfcmp.saf.d $vr0, $vr0, $vr1287; CHECK-NEXT: ret288entry:289 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.saf.d(<2 x double> %va, <2 x double> %vb)290 ret <2 x i64> %res291}292 293declare <4 x i32> @llvm.loongarch.lsx.vfcmp.sun.s(<4 x float>, <4 x float>)294 295define <4 x i32> @lsx_vfcmp_sun_s(<4 x float> %va, <4 x float> %vb) nounwind {296; CHECK-LABEL: lsx_vfcmp_sun_s:297; CHECK: # %bb.0: # %entry298; CHECK-NEXT: vfcmp.sun.s $vr0, $vr0, $vr1299; CHECK-NEXT: ret300entry:301 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.sun.s(<4 x float> %va, <4 x float> %vb)302 ret <4 x i32> %res303}304 305declare <2 x i64> @llvm.loongarch.lsx.vfcmp.sun.d(<2 x double>, <2 x double>)306 307define <2 x i64> @lsx_vfcmp_sun_d(<2 x double> %va, <2 x double> %vb) nounwind {308; CHECK-LABEL: lsx_vfcmp_sun_d:309; CHECK: # %bb.0: # %entry310; CHECK-NEXT: vfcmp.sun.d $vr0, $vr0, $vr1311; CHECK-NEXT: ret312entry:313 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.sun.d(<2 x double> %va, <2 x double> %vb)314 ret <2 x i64> %res315}316 317declare <4 x i32> @llvm.loongarch.lsx.vfcmp.seq.s(<4 x float>, <4 x float>)318 319define <4 x i32> @lsx_vfcmp_seq_s(<4 x float> %va, <4 x float> %vb) nounwind {320; CHECK-LABEL: lsx_vfcmp_seq_s:321; CHECK: # %bb.0: # %entry322; CHECK-NEXT: vfcmp.seq.s $vr0, $vr0, $vr1323; CHECK-NEXT: ret324entry:325 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.seq.s(<4 x float> %va, <4 x float> %vb)326 ret <4 x i32> %res327}328 329declare <2 x i64> @llvm.loongarch.lsx.vfcmp.seq.d(<2 x double>, <2 x double>)330 331define <2 x i64> @lsx_vfcmp_seq_d(<2 x double> %va, <2 x double> %vb) nounwind {332; CHECK-LABEL: lsx_vfcmp_seq_d:333; CHECK: # %bb.0: # %entry334; CHECK-NEXT: vfcmp.seq.d $vr0, $vr0, $vr1335; CHECK-NEXT: ret336entry:337 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.seq.d(<2 x double> %va, <2 x double> %vb)338 ret <2 x i64> %res339}340 341declare <4 x i32> @llvm.loongarch.lsx.vfcmp.sueq.s(<4 x float>, <4 x float>)342 343define <4 x i32> @lsx_vfcmp_sueq_s(<4 x float> %va, <4 x float> %vb) nounwind {344; CHECK-LABEL: lsx_vfcmp_sueq_s:345; CHECK: # %bb.0: # %entry346; CHECK-NEXT: vfcmp.sueq.s $vr0, $vr0, $vr1347; CHECK-NEXT: ret348entry:349 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.sueq.s(<4 x float> %va, <4 x float> %vb)350 ret <4 x i32> %res351}352 353declare <2 x i64> @llvm.loongarch.lsx.vfcmp.sueq.d(<2 x double>, <2 x double>)354 355define <2 x i64> @lsx_vfcmp_sueq_d(<2 x double> %va, <2 x double> %vb) nounwind {356; CHECK-LABEL: lsx_vfcmp_sueq_d:357; CHECK: # %bb.0: # %entry358; CHECK-NEXT: vfcmp.sueq.d $vr0, $vr0, $vr1359; CHECK-NEXT: ret360entry:361 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.sueq.d(<2 x double> %va, <2 x double> %vb)362 ret <2 x i64> %res363}364 365declare <4 x i32> @llvm.loongarch.lsx.vfcmp.slt.s(<4 x float>, <4 x float>)366 367define <4 x i32> @lsx_vfcmp_slt_s(<4 x float> %va, <4 x float> %vb) nounwind {368; CHECK-LABEL: lsx_vfcmp_slt_s:369; CHECK: # %bb.0: # %entry370; CHECK-NEXT: vfcmp.slt.s $vr0, $vr0, $vr1371; CHECK-NEXT: ret372entry:373 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.slt.s(<4 x float> %va, <4 x float> %vb)374 ret <4 x i32> %res375}376 377declare <2 x i64> @llvm.loongarch.lsx.vfcmp.slt.d(<2 x double>, <2 x double>)378 379define <2 x i64> @lsx_vfcmp_slt_d(<2 x double> %va, <2 x double> %vb) nounwind {380; CHECK-LABEL: lsx_vfcmp_slt_d:381; CHECK: # %bb.0: # %entry382; CHECK-NEXT: vfcmp.slt.d $vr0, $vr0, $vr1383; CHECK-NEXT: ret384entry:385 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.slt.d(<2 x double> %va, <2 x double> %vb)386 ret <2 x i64> %res387}388 389declare <4 x i32> @llvm.loongarch.lsx.vfcmp.sult.s(<4 x float>, <4 x float>)390 391define <4 x i32> @lsx_vfcmp_sult_s(<4 x float> %va, <4 x float> %vb) nounwind {392; CHECK-LABEL: lsx_vfcmp_sult_s:393; CHECK: # %bb.0: # %entry394; CHECK-NEXT: vfcmp.sult.s $vr0, $vr0, $vr1395; CHECK-NEXT: ret396entry:397 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.sult.s(<4 x float> %va, <4 x float> %vb)398 ret <4 x i32> %res399}400 401declare <2 x i64> @llvm.loongarch.lsx.vfcmp.sult.d(<2 x double>, <2 x double>)402 403define <2 x i64> @lsx_vfcmp_sult_d(<2 x double> %va, <2 x double> %vb) nounwind {404; CHECK-LABEL: lsx_vfcmp_sult_d:405; CHECK: # %bb.0: # %entry406; CHECK-NEXT: vfcmp.sult.d $vr0, $vr0, $vr1407; CHECK-NEXT: ret408entry:409 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.sult.d(<2 x double> %va, <2 x double> %vb)410 ret <2 x i64> %res411}412 413declare <4 x i32> @llvm.loongarch.lsx.vfcmp.sle.s(<4 x float>, <4 x float>)414 415define <4 x i32> @lsx_vfcmp_sle_s(<4 x float> %va, <4 x float> %vb) nounwind {416; CHECK-LABEL: lsx_vfcmp_sle_s:417; CHECK: # %bb.0: # %entry418; CHECK-NEXT: vfcmp.sle.s $vr0, $vr0, $vr1419; CHECK-NEXT: ret420entry:421 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.sle.s(<4 x float> %va, <4 x float> %vb)422 ret <4 x i32> %res423}424 425declare <2 x i64> @llvm.loongarch.lsx.vfcmp.sle.d(<2 x double>, <2 x double>)426 427define <2 x i64> @lsx_vfcmp_sle_d(<2 x double> %va, <2 x double> %vb) nounwind {428; CHECK-LABEL: lsx_vfcmp_sle_d:429; CHECK: # %bb.0: # %entry430; CHECK-NEXT: vfcmp.sle.d $vr0, $vr0, $vr1431; CHECK-NEXT: ret432entry:433 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.sle.d(<2 x double> %va, <2 x double> %vb)434 ret <2 x i64> %res435}436 437declare <4 x i32> @llvm.loongarch.lsx.vfcmp.sule.s(<4 x float>, <4 x float>)438 439define <4 x i32> @lsx_vfcmp_sule_s(<4 x float> %va, <4 x float> %vb) nounwind {440; CHECK-LABEL: lsx_vfcmp_sule_s:441; CHECK: # %bb.0: # %entry442; CHECK-NEXT: vfcmp.sule.s $vr0, $vr0, $vr1443; CHECK-NEXT: ret444entry:445 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.sule.s(<4 x float> %va, <4 x float> %vb)446 ret <4 x i32> %res447}448 449declare <2 x i64> @llvm.loongarch.lsx.vfcmp.sule.d(<2 x double>, <2 x double>)450 451define <2 x i64> @lsx_vfcmp_sule_d(<2 x double> %va, <2 x double> %vb) nounwind {452; CHECK-LABEL: lsx_vfcmp_sule_d:453; CHECK: # %bb.0: # %entry454; CHECK-NEXT: vfcmp.sule.d $vr0, $vr0, $vr1455; CHECK-NEXT: ret456entry:457 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.sule.d(<2 x double> %va, <2 x double> %vb)458 ret <2 x i64> %res459}460 461declare <4 x i32> @llvm.loongarch.lsx.vfcmp.sne.s(<4 x float>, <4 x float>)462 463define <4 x i32> @lsx_vfcmp_sne_s(<4 x float> %va, <4 x float> %vb) nounwind {464; CHECK-LABEL: lsx_vfcmp_sne_s:465; CHECK: # %bb.0: # %entry466; CHECK-NEXT: vfcmp.sne.s $vr0, $vr0, $vr1467; CHECK-NEXT: ret468entry:469 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.sne.s(<4 x float> %va, <4 x float> %vb)470 ret <4 x i32> %res471}472 473declare <2 x i64> @llvm.loongarch.lsx.vfcmp.sne.d(<2 x double>, <2 x double>)474 475define <2 x i64> @lsx_vfcmp_sne_d(<2 x double> %va, <2 x double> %vb) nounwind {476; CHECK-LABEL: lsx_vfcmp_sne_d:477; CHECK: # %bb.0: # %entry478; CHECK-NEXT: vfcmp.sne.d $vr0, $vr0, $vr1479; CHECK-NEXT: ret480entry:481 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.sne.d(<2 x double> %va, <2 x double> %vb)482 ret <2 x i64> %res483}484 485declare <4 x i32> @llvm.loongarch.lsx.vfcmp.sor.s(<4 x float>, <4 x float>)486 487define <4 x i32> @lsx_vfcmp_sor_s(<4 x float> %va, <4 x float> %vb) nounwind {488; CHECK-LABEL: lsx_vfcmp_sor_s:489; CHECK: # %bb.0: # %entry490; CHECK-NEXT: vfcmp.sor.s $vr0, $vr0, $vr1491; CHECK-NEXT: ret492entry:493 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.sor.s(<4 x float> %va, <4 x float> %vb)494 ret <4 x i32> %res495}496 497declare <2 x i64> @llvm.loongarch.lsx.vfcmp.sor.d(<2 x double>, <2 x double>)498 499define <2 x i64> @lsx_vfcmp_sor_d(<2 x double> %va, <2 x double> %vb) nounwind {500; CHECK-LABEL: lsx_vfcmp_sor_d:501; CHECK: # %bb.0: # %entry502; CHECK-NEXT: vfcmp.sor.d $vr0, $vr0, $vr1503; CHECK-NEXT: ret504entry:505 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.sor.d(<2 x double> %va, <2 x double> %vb)506 ret <2 x i64> %res507}508 509declare <4 x i32> @llvm.loongarch.lsx.vfcmp.sune.s(<4 x float>, <4 x float>)510 511define <4 x i32> @lsx_vfcmp_sune_s(<4 x float> %va, <4 x float> %vb) nounwind {512; CHECK-LABEL: lsx_vfcmp_sune_s:513; CHECK: # %bb.0: # %entry514; CHECK-NEXT: vfcmp.sune.s $vr0, $vr0, $vr1515; CHECK-NEXT: ret516entry:517 %res = call <4 x i32> @llvm.loongarch.lsx.vfcmp.sune.s(<4 x float> %va, <4 x float> %vb)518 ret <4 x i32> %res519}520 521declare <2 x i64> @llvm.loongarch.lsx.vfcmp.sune.d(<2 x double>, <2 x double>)522 523define <2 x i64> @lsx_vfcmp_sune_d(<2 x double> %va, <2 x double> %vb) nounwind {524; CHECK-LABEL: lsx_vfcmp_sune_d:525; CHECK: # %bb.0: # %entry526; CHECK-NEXT: vfcmp.sune.d $vr0, $vr0, $vr1527; CHECK-NEXT: ret528entry:529 %res = call <2 x i64> @llvm.loongarch.lsx.vfcmp.sune.d(<2 x double> %va, <2 x double> %vb)530 ret <2 x i64> %res531}532