100 lines · plain
1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lsx < %s | FileCheck %s3; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s4 5declare <16 x i8> @llvm.loongarch.lsx.vseq.b(<16 x i8>, <16 x i8>)6 7define <16 x i8> @lsx_vseq_b(<16 x i8> %va, <16 x i8> %vb) nounwind {8; CHECK-LABEL: lsx_vseq_b:9; CHECK: # %bb.0: # %entry10; CHECK-NEXT: vseq.b $vr0, $vr0, $vr111; CHECK-NEXT: ret12entry:13 %res = call <16 x i8> @llvm.loongarch.lsx.vseq.b(<16 x i8> %va, <16 x i8> %vb)14 ret <16 x i8> %res15}16 17declare <8 x i16> @llvm.loongarch.lsx.vseq.h(<8 x i16>, <8 x i16>)18 19define <8 x i16> @lsx_vseq_h(<8 x i16> %va, <8 x i16> %vb) nounwind {20; CHECK-LABEL: lsx_vseq_h:21; CHECK: # %bb.0: # %entry22; CHECK-NEXT: vseq.h $vr0, $vr0, $vr123; CHECK-NEXT: ret24entry:25 %res = call <8 x i16> @llvm.loongarch.lsx.vseq.h(<8 x i16> %va, <8 x i16> %vb)26 ret <8 x i16> %res27}28 29declare <4 x i32> @llvm.loongarch.lsx.vseq.w(<4 x i32>, <4 x i32>)30 31define <4 x i32> @lsx_vseq_w(<4 x i32> %va, <4 x i32> %vb) nounwind {32; CHECK-LABEL: lsx_vseq_w:33; CHECK: # %bb.0: # %entry34; CHECK-NEXT: vseq.w $vr0, $vr0, $vr135; CHECK-NEXT: ret36entry:37 %res = call <4 x i32> @llvm.loongarch.lsx.vseq.w(<4 x i32> %va, <4 x i32> %vb)38 ret <4 x i32> %res39}40 41declare <2 x i64> @llvm.loongarch.lsx.vseq.d(<2 x i64>, <2 x i64>)42 43define <2 x i64> @lsx_vseq_d(<2 x i64> %va, <2 x i64> %vb) nounwind {44; CHECK-LABEL: lsx_vseq_d:45; CHECK: # %bb.0: # %entry46; CHECK-NEXT: vseq.d $vr0, $vr0, $vr147; CHECK-NEXT: ret48entry:49 %res = call <2 x i64> @llvm.loongarch.lsx.vseq.d(<2 x i64> %va, <2 x i64> %vb)50 ret <2 x i64> %res51}52 53declare <16 x i8> @llvm.loongarch.lsx.vseqi.b(<16 x i8>, i32)54 55define <16 x i8> @lsx_vseqi_b(<16 x i8> %va) nounwind {56; CHECK-LABEL: lsx_vseqi_b:57; CHECK: # %bb.0: # %entry58; CHECK-NEXT: vseqi.b $vr0, $vr0, 1559; CHECK-NEXT: ret60entry:61 %res = call <16 x i8> @llvm.loongarch.lsx.vseqi.b(<16 x i8> %va, i32 15)62 ret <16 x i8> %res63}64 65declare <8 x i16> @llvm.loongarch.lsx.vseqi.h(<8 x i16>, i32)66 67define <8 x i16> @lsx_vseqi_h(<8 x i16> %va) nounwind {68; CHECK-LABEL: lsx_vseqi_h:69; CHECK: # %bb.0: # %entry70; CHECK-NEXT: vseqi.h $vr0, $vr0, 1571; CHECK-NEXT: ret72entry:73 %res = call <8 x i16> @llvm.loongarch.lsx.vseqi.h(<8 x i16> %va, i32 15)74 ret <8 x i16> %res75}76 77declare <4 x i32> @llvm.loongarch.lsx.vseqi.w(<4 x i32>, i32)78 79define <4 x i32> @lsx_vseqi_w(<4 x i32> %va) nounwind {80; CHECK-LABEL: lsx_vseqi_w:81; CHECK: # %bb.0: # %entry82; CHECK-NEXT: vseqi.w $vr0, $vr0, -1683; CHECK-NEXT: ret84entry:85 %res = call <4 x i32> @llvm.loongarch.lsx.vseqi.w(<4 x i32> %va, i32 -16)86 ret <4 x i32> %res87}88 89declare <2 x i64> @llvm.loongarch.lsx.vseqi.d(<2 x i64>, i32)90 91define <2 x i64> @lsx_vseqi_d(<2 x i64> %va) nounwind {92; CHECK-LABEL: lsx_vseqi_d:93; CHECK: # %bb.0: # %entry94; CHECK-NEXT: vseqi.d $vr0, $vr0, -1695; CHECK-NEXT: ret96entry:97 %res = call <2 x i64> @llvm.loongarch.lsx.vseqi.d(<2 x i64> %va, i32 -16)98 ret <2 x i64> %res99}100