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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lsx %s -o - | FileCheck %s3; RUN: llc --mtriple=loongarch64 --mattr=+lsx %s -o - | FileCheck %s4 5;; vshuf4i.b6define <16 x i8> @shufflevector_vshuf4i_v16i8(<16 x i8> %a, <16 x i8> %b) {7; CHECK-LABEL: shufflevector_vshuf4i_v16i8:8; CHECK: # %bb.0:9; CHECK-NEXT: vshuf4i.b $vr0, $vr0, 2710; CHECK-NEXT: ret11 %c = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4, i32 11, i32 10, i32 9, i32 8, i32 15, i32 14, i32 13, i32 12>12 ret <16 x i8> %c13}14 15;; vshuf4i.h16define <8 x i16> @shufflevector_vshuf4i_v8i4(<8 x i16> %a, <8 x i16> %b) {17; CHECK-LABEL: shufflevector_vshuf4i_v8i4:18; CHECK: # %bb.0:19; CHECK-NEXT: vshuf4i.h $vr0, $vr0, 2720; CHECK-NEXT: ret21 %c = shufflevector <8 x i16> %a, <8 x i16> %b, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4>22 ret <8 x i16> %c23}24 25;; vshuf4i.w26define <4 x i32> @shufflevector_vshuf4i_v4i32(<4 x i32> %a, <4 x i32> %b) {27; CHECK-LABEL: shufflevector_vshuf4i_v4i32:28; CHECK: # %bb.0:29; CHECK-NEXT: vshuf4i.w $vr0, $vr0, 2730; CHECK-NEXT: ret31 %c = shufflevector <4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>32 ret <4 x i32> %c33}34 35;; vshuf4i.w36define <4 x float> @shufflevector_vshuf4i_v4f32(<4 x float> %a, <4 x float> %b) {37; CHECK-LABEL: shufflevector_vshuf4i_v4f32:38; CHECK: # %bb.0:39; CHECK-NEXT: vshuf4i.w $vr0, $vr0, 2740; CHECK-NEXT: ret41 %c = shufflevector <4 x float> %a, <4 x float> %b, <4 x i32> <i32 3, i32 2, i32 1, i32 0>42 ret <4 x float> %c43}44 45;; vshuf4i.d46define <2 x i64> @shufflevector_vshuf4i_v2d64(<2 x i64> %a, <2 x i64> %b) {47; CHECK-LABEL: shufflevector_vshuf4i_v2d64:48; CHECK: # %bb.0:49; CHECK-NEXT: vshuf4i.d $vr0, $vr1, 950; CHECK-NEXT: ret51 %c = shufflevector <2 x i64> %a, <2 x i64> %b, <2 x i32> <i32 1, i32 2>52 ret <2 x i64> %c53}54 55;; vshuf4i.d56define <2 x double> @shufflevector_vshuf4i_v2f64(<2 x double> %a, <2 x double> %b) {57; CHECK-LABEL: shufflevector_vshuf4i_v2f64:58; CHECK: # %bb.0:59; CHECK-NEXT: vshuf4i.d $vr0, $vr1, 960; CHECK-NEXT: ret61 %c = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 1, i32 2>62 ret <2 x double> %c63}64