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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 52; RUN: llc --mtriple=loongarch32 --mattr=+32s,+lsx < %s | FileCheck %s3; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s4 5define <16 x i8> @shuffle_16i8_vbsll_v_1(<16 x i8> %a) nounwind {6; CHECK-LABEL: shuffle_16i8_vbsll_v_1:7; CHECK: # %bb.0:8; CHECK-NEXT: vbsll.v $vr0, $vr0, 19; CHECK-NEXT: ret10 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 16, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14>11 ret <16 x i8> %shuffle12}13 14define <16 x i8> @shuffle_16i8_vbsll_v_2(<16 x i8> %a) nounwind {15; CHECK-LABEL: shuffle_16i8_vbsll_v_2:16; CHECK: # %bb.0:17; CHECK-NEXT: vbsll.v $vr0, $vr0, 218; CHECK-NEXT: ret19 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 16, i32 16, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13>20 ret <16 x i8> %shuffle21}22 23define <16 x i8> @shuffle_16i8_vbsll_v_3(<16 x i8> %a) nounwind {24; CHECK-LABEL: shuffle_16i8_vbsll_v_3:25; CHECK: # %bb.0:26; CHECK-NEXT: vbsll.v $vr0, $vr0, 327; CHECK-NEXT: ret28 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 16, i32 16, i32 16, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12>29 ret <16 x i8> %shuffle30}31 32define <16 x i8> @shuffle_16i8_vbsll_v_4(<16 x i8> %a) nounwind {33; CHECK-LABEL: shuffle_16i8_vbsll_v_4:34; CHECK: # %bb.0:35; CHECK-NEXT: vbsll.v $vr0, $vr0, 436; CHECK-NEXT: ret37 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 16, i32 16, i32 16, i32 16, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11>38 ret <16 x i8> %shuffle39}40 41define <16 x i8> @shuffle_16i8_vbsll_v_5(<16 x i8> %a) nounwind {42; CHECK-LABEL: shuffle_16i8_vbsll_v_5:43; CHECK: # %bb.0:44; CHECK-NEXT: vbsll.v $vr0, $vr0, 545; CHECK-NEXT: ret46 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 16, i32 16, i32 16, i32 16, i32 16, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10>47 ret <16 x i8> %shuffle48}49 50define <16 x i8> @shuffle_16i8_vbsll_v_6(<16 x i8> %a) nounwind {51; CHECK-LABEL: shuffle_16i8_vbsll_v_6:52; CHECK: # %bb.0:53; CHECK-NEXT: vbsll.v $vr0, $vr0, 654; CHECK-NEXT: ret55 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9>56 ret <16 x i8> %shuffle57}58 59define <16 x i8> @shuffle_16i8_vbsll_v_7(<16 x i8> %a) nounwind {60; CHECK-LABEL: shuffle_16i8_vbsll_v_7:61; CHECK: # %bb.0:62; CHECK-NEXT: vbsll.v $vr0, $vr0, 763; CHECK-NEXT: ret64 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>65 ret <16 x i8> %shuffle66}67 68define <16 x i8> @shuffle_16i8_vbsll_v_8(<16 x i8> %a) nounwind {69; CHECK-LABEL: shuffle_16i8_vbsll_v_8:70; CHECK: # %bb.0:71; CHECK-NEXT: vbsll.v $vr0, $vr0, 872; CHECK-NEXT: ret73 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>74 ret <16 x i8> %shuffle75}76 77define <16 x i8> @shuffle_16i8_vbsll_v_9(<16 x i8> %a) nounwind {78; CHECK-LABEL: shuffle_16i8_vbsll_v_9:79; CHECK: # %bb.0:80; CHECK-NEXT: vbsll.v $vr0, $vr0, 981; CHECK-NEXT: ret82 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6>83 ret <16 x i8> %shuffle84}85 86define <16 x i8> @shuffle_16i8_vbsll_v_10(<16 x i8> %a) nounwind {87; CHECK-LABEL: shuffle_16i8_vbsll_v_10:88; CHECK: # %bb.0:89; CHECK-NEXT: vbsll.v $vr0, $vr0, 1090; CHECK-NEXT: ret91 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5>92 ret <16 x i8> %shuffle93}94 95define <16 x i8> @shuffle_16i8_vbsll_v_11(<16 x i8> %a) nounwind {96; CHECK-LABEL: shuffle_16i8_vbsll_v_11:97; CHECK: # %bb.0:98; CHECK-NEXT: vbsll.v $vr0, $vr0, 1199; CHECK-NEXT: ret100 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 0, i32 1, i32 2, i32 3, i32 4>101 ret <16 x i8> %shuffle102}103 104define <16 x i8> @shuffle_16i8_vbsll_v_12(<16 x i8> %a) nounwind {105; CHECK-LABEL: shuffle_16i8_vbsll_v_12:106; CHECK: # %bb.0:107; CHECK-NEXT: vbsll.v $vr0, $vr0, 12108; CHECK-NEXT: ret109 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 0, i32 1, i32 2, i32 3>110 ret <16 x i8> %shuffle111}112 113define <16 x i8> @shuffle_16i8_vbsll_v_13(<16 x i8> %a) nounwind {114; CHECK-LABEL: shuffle_16i8_vbsll_v_13:115; CHECK: # %bb.0:116; CHECK-NEXT: vbsll.v $vr0, $vr0, 13117; CHECK-NEXT: ret118 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 0, i32 1, i32 2>119 ret <16 x i8> %shuffle120}121 122define <16 x i8> @shuffle_16i8_vbsll_v_14(<16 x i8> %a) nounwind {123; CHECK-LABEL: shuffle_16i8_vbsll_v_14:124; CHECK: # %bb.0:125; CHECK-NEXT: vbsll.v $vr0, $vr0, 14126; CHECK-NEXT: ret127 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 0, i32 1>128 ret <16 x i8> %shuffle129}130 131define <16 x i8> @shuffle_16i8_vbsll_v_15(<16 x i8> %a) nounwind {132; CHECK-LABEL: shuffle_16i8_vbsll_v_15:133; CHECK: # %bb.0:134; CHECK-NEXT: vbsll.v $vr0, $vr0, 15135; CHECK-NEXT: ret136 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 0>137 ret <16 x i8> %shuffle138}139 140define <8 x i16> @shuffle_8i16_vbsll_v_2(<8 x i16> %a) nounwind {141; CHECK-LABEL: shuffle_8i16_vbsll_v_2:142; CHECK: # %bb.0:143; CHECK-NEXT: vbsll.v $vr0, $vr0, 2144; CHECK-NEXT: ret145 %shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32> <i32 8, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6>146 ret <8 x i16> %shuffle147}148 149define <8 x i16> @shuffle_8i16_vbsll_v_4(<8 x i16> %a) nounwind {150; CHECK-LABEL: shuffle_8i16_vbsll_v_4:151; CHECK: # %bb.0:152; CHECK-NEXT: vbsll.v $vr0, $vr0, 4153; CHECK-NEXT: ret154 %shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32> <i32 8, i32 8, i32 0, i32 1, i32 2, i32 3, i32 4, i32 5>155 ret <8 x i16> %shuffle156}157 158define <8 x i16> @shuffle_8i16_vbsll_v_6(<8 x i16> %a) nounwind {159; CHECK-LABEL: shuffle_8i16_vbsll_v_6:160; CHECK: # %bb.0:161; CHECK-NEXT: vbsll.v $vr0, $vr0, 6162; CHECK-NEXT: ret163 %shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32> <i32 8, i32 8, i32 8, i32 0, i32 1, i32 2, i32 3, i32 4>164 ret <8 x i16> %shuffle165}166 167define <8 x i16> @shuffle_8i16_vbsll_v_8(<8 x i16> %a) nounwind {168; CHECK-LABEL: shuffle_8i16_vbsll_v_8:169; CHECK: # %bb.0:170; CHECK-NEXT: vbsll.v $vr0, $vr0, 8171; CHECK-NEXT: ret172 %shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32> <i32 8, i32 8, i32 8, i32 8, i32 0, i32 1, i32 2, i32 3>173 ret <8 x i16> %shuffle174}175 176define <8 x i16> @shuffle_8i16_vbsll_v_10(<8 x i16> %a) nounwind {177; CHECK-LABEL: shuffle_8i16_vbsll_v_10:178; CHECK: # %bb.0:179; CHECK-NEXT: vbsll.v $vr0, $vr0, 10180; CHECK-NEXT: ret181 %shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32> <i32 8, i32 8, i32 8, i32 8, i32 8, i32 0, i32 1, i32 2>182 ret <8 x i16> %shuffle183}184 185define <8 x i16> @shuffle_8i16_vbsll_v_12(<8 x i16> %a) nounwind {186; CHECK-LABEL: shuffle_8i16_vbsll_v_12:187; CHECK: # %bb.0:188; CHECK-NEXT: vbsll.v $vr0, $vr0, 12189; CHECK-NEXT: ret190 %shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32> <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 0, i32 1>191 ret <8 x i16> %shuffle192}193 194define <8 x i16> @shuffle_8i16_vbsll_v_14(<8 x i16> %a) nounwind {195; CHECK-LABEL: shuffle_8i16_vbsll_v_14:196; CHECK: # %bb.0:197; CHECK-NEXT: vbsll.v $vr0, $vr0, 14198; CHECK-NEXT: ret199 %shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32> <i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 0>200 ret <8 x i16> %shuffle201}202 203define <4 x i32> @shuffle_4i32_vbsll_v_4(<4 x i32> %a) nounwind {204; CHECK-LABEL: shuffle_4i32_vbsll_v_4:205; CHECK: # %bb.0:206; CHECK-NEXT: vbsll.v $vr0, $vr0, 4207; CHECK-NEXT: ret208 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 4, i32 0, i32 1, i32 2>209 ret <4 x i32> %shuffle210}211 212define <4 x i32> @shuffle_4i32_vbsll_v_8(<4 x i32> %a) nounwind {213; CHECK-LABEL: shuffle_4i32_vbsll_v_8:214; CHECK: # %bb.0:215; CHECK-NEXT: vbsll.v $vr0, $vr0, 8216; CHECK-NEXT: ret217 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 4, i32 4, i32 0, i32 1>218 ret <4 x i32> %shuffle219}220 221define <4 x i32> @shuffle_4i32_vbsll_v_12(<4 x i32> %a) nounwind {222; CHECK-LABEL: shuffle_4i32_vbsll_v_12:223; CHECK: # %bb.0:224; CHECK-NEXT: vbsll.v $vr0, $vr0, 12225; CHECK-NEXT: ret226 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 4, i32 4, i32 4, i32 0>227 ret <4 x i32> %shuffle228}229 230define <2 x i64> @shuffle_2i64_vbsll_v_8(<2 x i64> %a) nounwind {231; CHECK-LABEL: shuffle_2i64_vbsll_v_8:232; CHECK: # %bb.0:233; CHECK-NEXT: vrepli.b $vr1, 0234; CHECK-NEXT: vpackev.d $vr0, $vr0, $vr1235; CHECK-NEXT: ret236 %shuffle = shufflevector <2 x i64> %a, <2 x i64> zeroinitializer, <2 x i32> <i32 2, i32 0>237 ret <2 x i64> %shuffle238}239 240define <16 x i8> @shuffle_16i8_vbsrl_v_1(<16 x i8> %a) nounwind {241; CHECK-LABEL: shuffle_16i8_vbsrl_v_1:242; CHECK: # %bb.0:243; CHECK-NEXT: vbsrl.v $vr0, $vr0, 1244; CHECK-NEXT: ret245 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16>246 ret <16 x i8> %shuffle247}248 249define <16 x i8> @shuffle_16i8_vbsrl_v_2(<16 x i8> %a) nounwind {250; CHECK-LABEL: shuffle_16i8_vbsrl_v_2:251; CHECK: # %bb.0:252; CHECK-NEXT: vbsrl.v $vr0, $vr0, 2253; CHECK-NEXT: ret254 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 16>255 ret <16 x i8> %shuffle256}257 258define <16 x i8> @shuffle_16i8_vbsrl_v_3(<16 x i8> %a) nounwind {259; CHECK-LABEL: shuffle_16i8_vbsrl_v_3:260; CHECK: # %bb.0:261; CHECK-NEXT: vbsrl.v $vr0, $vr0, 3262; CHECK-NEXT: ret263 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 16, i32 16>264 ret <16 x i8> %shuffle265}266 267define <16 x i8> @shuffle_16i8_vbsrl_v_4(<16 x i8> %a) nounwind {268; CHECK-LABEL: shuffle_16i8_vbsrl_v_4:269; CHECK: # %bb.0:270; CHECK-NEXT: vbsrl.v $vr0, $vr0, 4271; CHECK-NEXT: ret272 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 16, i32 16, i32 16>273 ret <16 x i8> %shuffle274}275 276define <16 x i8> @shuffle_16i8_vbsrl_v_5(<16 x i8> %a) nounwind {277; CHECK-LABEL: shuffle_16i8_vbsrl_v_5:278; CHECK: # %bb.0:279; CHECK-NEXT: vbsrl.v $vr0, $vr0, 5280; CHECK-NEXT: ret281 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 16, i32 16, i32 16, i32 16>282 ret <16 x i8> %shuffle283}284 285define <16 x i8> @shuffle_16i8_vbsrl_v_6(<16 x i8> %a) nounwind {286; CHECK-LABEL: shuffle_16i8_vbsrl_v_6:287; CHECK: # %bb.0:288; CHECK-NEXT: vbsrl.v $vr0, $vr0, 6289; CHECK-NEXT: ret290 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>291 ret <16 x i8> %shuffle292}293 294define <16 x i8> @shuffle_16i8_vbsrl_v_7(<16 x i8> %a) nounwind {295; CHECK-LABEL: shuffle_16i8_vbsrl_v_7:296; CHECK: # %bb.0:297; CHECK-NEXT: vbsrl.v $vr0, $vr0, 7298; CHECK-NEXT: ret299 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>300 ret <16 x i8> %shuffle301}302 303define <16 x i8> @shuffle_16i8_vbsrl_v_8(<16 x i8> %a) nounwind {304; CHECK-LABEL: shuffle_16i8_vbsrl_v_8:305; CHECK: # %bb.0:306; CHECK-NEXT: vbsrl.v $vr0, $vr0, 8307; CHECK-NEXT: ret308 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>309 ret <16 x i8> %shuffle310}311 312define <16 x i8> @shuffle_16i8_vbsrl_v_9(<16 x i8> %a) nounwind {313; CHECK-LABEL: shuffle_16i8_vbsrl_v_9:314; CHECK: # %bb.0:315; CHECK-NEXT: vbsrl.v $vr0, $vr0, 9316; CHECK-NEXT: ret317 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>318 ret <16 x i8> %shuffle319}320 321define <16 x i8> @shuffle_16i8_vbsrl_v_10(<16 x i8> %a) nounwind {322; CHECK-LABEL: shuffle_16i8_vbsrl_v_10:323; CHECK: # %bb.0:324; CHECK-NEXT: vbsrl.v $vr0, $vr0, 10325; CHECK-NEXT: ret326 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 10, i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>327 ret <16 x i8> %shuffle328}329 330define <16 x i8> @shuffle_16i8_vbsrl_v_11(<16 x i8> %a) nounwind {331; CHECK-LABEL: shuffle_16i8_vbsrl_v_11:332; CHECK: # %bb.0:333; CHECK-NEXT: vbsrl.v $vr0, $vr0, 11334; CHECK-NEXT: ret335 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 11, i32 12, i32 13, i32 14, i32 15, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>336 ret <16 x i8> %shuffle337}338 339define <16 x i8> @shuffle_16i8_vbsrl_v_12(<16 x i8> %a) nounwind {340; CHECK-LABEL: shuffle_16i8_vbsrl_v_12:341; CHECK: # %bb.0:342; CHECK-NEXT: vbsrl.v $vr0, $vr0, 12343; CHECK-NEXT: ret344 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 12, i32 13, i32 14, i32 15, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>345 ret <16 x i8> %shuffle346}347 348define <16 x i8> @shuffle_16i8_vbsrl_v_13(<16 x i8> %a) nounwind {349; CHECK-LABEL: shuffle_16i8_vbsrl_v_13:350; CHECK: # %bb.0:351; CHECK-NEXT: vbsrl.v $vr0, $vr0, 13352; CHECK-NEXT: ret353 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 13, i32 14, i32 15, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>354 ret <16 x i8> %shuffle355}356 357define <16 x i8> @shuffle_16i8_vbsrl_v_14(<16 x i8> %a) nounwind {358; CHECK-LABEL: shuffle_16i8_vbsrl_v_14:359; CHECK: # %bb.0:360; CHECK-NEXT: vbsrl.v $vr0, $vr0, 14361; CHECK-NEXT: ret362 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 14, i32 15, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>363 ret <16 x i8> %shuffle364}365 366define <16 x i8> @shuffle_16i8_vbsrl_v_15(<16 x i8> %a) nounwind {367; CHECK-LABEL: shuffle_16i8_vbsrl_v_15:368; CHECK: # %bb.0:369; CHECK-NEXT: vbsrl.v $vr0, $vr0, 15370; CHECK-NEXT: ret371 %shuffle = shufflevector <16 x i8> %a, <16 x i8> zeroinitializer, <16 x i32> <i32 15, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>372 ret <16 x i8> %shuffle373}374 375define <8 x i16> @shuffle_8i16_vbsrl_v_2(<8 x i16> %a) nounwind {376; CHECK-LABEL: shuffle_8i16_vbsrl_v_2:377; CHECK: # %bb.0:378; CHECK-NEXT: vbsrl.v $vr0, $vr0, 2379; CHECK-NEXT: ret380 %shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8>381 ret <8 x i16> %shuffle382}383 384define <8 x i16> @shuffle_8i16_vbsrl_v_4(<8 x i16> %a) nounwind {385; CHECK-LABEL: shuffle_8i16_vbsrl_v_4:386; CHECK: # %bb.0:387; CHECK-NEXT: vbsrl.v $vr0, $vr0, 4388; CHECK-NEXT: ret389 %shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32> <i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 8>390 ret <8 x i16> %shuffle391}392 393define <8 x i16> @shuffle_8i16_vbsrl_v_6(<8 x i16> %a) nounwind {394; CHECK-LABEL: shuffle_8i16_vbsrl_v_6:395; CHECK: # %bb.0:396; CHECK-NEXT: vbsrl.v $vr0, $vr0, 6397; CHECK-NEXT: ret398 %shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32> <i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 8, i32 8>399 ret <8 x i16> %shuffle400}401 402define <8 x i16> @shuffle_8i16_vbsrl_v_8(<8 x i16> %a) nounwind {403; CHECK-LABEL: shuffle_8i16_vbsrl_v_8:404; CHECK: # %bb.0:405; CHECK-NEXT: vbsrl.v $vr0, $vr0, 8406; CHECK-NEXT: ret407 %shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 8, i32 8, i32 8, i32 8>408 ret <8 x i16> %shuffle409}410 411define <8 x i16> @shuffle_8i16_vbsrl_v_10(<8 x i16> %a) nounwind {412; CHECK-LABEL: shuffle_8i16_vbsrl_v_10:413; CHECK: # %bb.0:414; CHECK-NEXT: vbsrl.v $vr0, $vr0, 10415; CHECK-NEXT: ret416 %shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32> <i32 5, i32 6, i32 7, i32 8, i32 8, i32 8, i32 8, i32 8>417 ret <8 x i16> %shuffle418}419 420define <8 x i16> @shuffle_8i16_vbsrl_v_12(<8 x i16> %a) nounwind {421; CHECK-LABEL: shuffle_8i16_vbsrl_v_12:422; CHECK: # %bb.0:423; CHECK-NEXT: vbsrl.v $vr0, $vr0, 12424; CHECK-NEXT: ret425 %shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32> <i32 6, i32 7, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>426 ret <8 x i16> %shuffle427}428 429define <8 x i16> @shuffle_8i16_vbsrl_v_14(<8 x i16> %a) nounwind {430; CHECK-LABEL: shuffle_8i16_vbsrl_v_14:431; CHECK: # %bb.0:432; CHECK-NEXT: vbsrl.v $vr0, $vr0, 14433; CHECK-NEXT: ret434 %shuffle = shufflevector <8 x i16> %a, <8 x i16> zeroinitializer, <8 x i32> <i32 7, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8, i32 8>435 ret <8 x i16> %shuffle436}437 438define <4 x i32> @shuffle_4i32_vbsrl_v_4(<4 x i32> %a) nounwind {439; CHECK-LABEL: shuffle_4i32_vbsrl_v_4:440; CHECK: # %bb.0:441; CHECK-NEXT: vbsrl.v $vr0, $vr0, 4442; CHECK-NEXT: ret443 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 1, i32 2, i32 3, i32 4>444 ret <4 x i32> %shuffle445}446 447define <4 x i32> @shuffle_4i32_vbsrl_v_8(<4 x i32> %a) nounwind {448; CHECK-LABEL: shuffle_4i32_vbsrl_v_8:449; CHECK: # %bb.0:450; CHECK-NEXT: vbsrl.v $vr0, $vr0, 8451; CHECK-NEXT: ret452 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 2, i32 3, i32 4, i32 4>453 ret <4 x i32> %shuffle454}455 456define <4 x i32> @shuffle_4i32_vbsrl_v_12(<4 x i32> %a) nounwind {457; CHECK-LABEL: shuffle_4i32_vbsrl_v_12:458; CHECK: # %bb.0:459; CHECK-NEXT: vbsrl.v $vr0, $vr0, 12460; CHECK-NEXT: ret461 %shuffle = shufflevector <4 x i32> %a, <4 x i32> zeroinitializer, <4 x i32> <i32 3, i32 4, i32 4, i32 4>462 ret <4 x i32> %shuffle463}464 465define <2 x i64> @shuffle_2i64_vbsrl_v_8(<2 x i64> %a) nounwind {466; CHECK-LABEL: shuffle_2i64_vbsrl_v_8:467; CHECK: # %bb.0:468; CHECK-NEXT: vrepli.b $vr1, 0469; CHECK-NEXT: vshuf4i.d $vr0, $vr1, 9470; CHECK-NEXT: ret471 %shuffle = shufflevector <2 x i64> %a, <2 x i64> zeroinitializer, <2 x i32> <i32 1, i32 2>472 ret <2 x i64> %shuffle473}474