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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc < %s -mtriple=m68k-linux -verify-machineinstrs | FileCheck %s3 4declare i8 @llvm.fshl.i8(i8, i8, i8)5declare i16 @llvm.fshl.i16(i16, i16, i16)6declare i32 @llvm.fshl.i32(i32, i32, i32)7 8; op reg, reg9 10define zeroext i8 @rolb(i8 zeroext %a, i8 zeroext %b) nounwind {11; CHECK-LABEL: rolb:12; CHECK: ; %bb.0:13; CHECK-NEXT: move.b (11,%sp), %d014; CHECK-NEXT: move.b (7,%sp), %d115; CHECK-NEXT: rol.b %d0, %d116; CHECK-NEXT: move.l %d1, %d017; CHECK-NEXT: and.l #255, %d018; CHECK-NEXT: rts19 %1 = tail call i8 @llvm.fshl.i8(i8 %a, i8 %a, i8 %b)20 ret i8 %121}22 23define zeroext i16 @rolw(i16 zeroext %a, i16 zeroext %b) nounwind {24; CHECK-LABEL: rolw:25; CHECK: ; %bb.0:26; CHECK-NEXT: move.w (10,%sp), %d027; CHECK-NEXT: move.w (6,%sp), %d128; CHECK-NEXT: rol.w %d0, %d129; CHECK-NEXT: move.l %d1, %d030; CHECK-NEXT: and.l #65535, %d031; CHECK-NEXT: rts32 %1 = tail call i16 @llvm.fshl.i16(i16 %a, i16 %a, i16 %b)33 ret i16 %134}35 36define i32 @roll(i32 %a, i32 %b) nounwind {37; CHECK-LABEL: roll:38; CHECK: ; %bb.0:39; CHECK-NEXT: move.l (8,%sp), %d140; CHECK-NEXT: move.l (4,%sp), %d041; CHECK-NEXT: rol.l %d1, %d042; CHECK-NEXT: rts43 %1 = tail call i32 @llvm.fshl.i32(i32 %a, i32 %a, i32 %b)44 ret i32 %145}46 47; op reg, imm48 49define zeroext i8 @rolib(i8 zeroext %a) nounwind {50; CHECK-LABEL: rolib:51; CHECK: ; %bb.0:52; CHECK-NEXT: move.b (7,%sp), %d053; CHECK-NEXT: rol.b #3, %d054; CHECK-NEXT: and.l #255, %d055; CHECK-NEXT: rts56 %1 = tail call i8 @llvm.fshl.i8(i8 %a, i8 %a, i8 3)57 ret i8 %158}59 60define zeroext i16 @roliw(i16 zeroext %a) nounwind {61; CHECK-LABEL: roliw:62; CHECK: ; %bb.0:63; CHECK-NEXT: move.w (6,%sp), %d064; CHECK-NEXT: rol.w #5, %d065; CHECK-NEXT: and.l #65535, %d066; CHECK-NEXT: rts67 %1 = tail call i16 @llvm.fshl.i16(i16 %a, i16 %a, i16 5)68 ret i16 %169}70 71define i32 @rolil(i32 %a) nounwind {72; CHECK-LABEL: rolil:73; CHECK: ; %bb.0:74; CHECK-NEXT: move.l (4,%sp), %d075; CHECK-NEXT: rol.l #7, %d076; CHECK-NEXT: rts77 %1 = tail call i32 @llvm.fshl.i32(i32 %a, i32 %a, i32 7)78 ret i32 %179}80