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1; RUN: llc -mtriple=m68k -mattr="+reserve-a0" < %s | FileCheck --check-prefix=A0 %s2; RUN: llc -mtriple=m68k -mattr="+reserve-a1" < %s | FileCheck --check-prefix=A1 %s3; RUN: llc -mtriple=m68k -mattr="+reserve-a2" < %s | FileCheck --check-prefix=A2 %s4; RUN: llc -mtriple=m68k -mattr="+reserve-a3" < %s | FileCheck --check-prefix=A3 %s5; RUN: llc -mtriple=m68k -mattr="+reserve-a4" < %s | FileCheck --check-prefix=A4 %s6; RUN: llc -mtriple=m68k -mattr="+reserve-a5" < %s | FileCheck --check-prefix=A5 %s7; RUN: llc -mtriple=m68k -mattr="+reserve-a6" < %s | FileCheck --check-prefix=A6 %s8; RUN: llc -mtriple=m68k -mattr="+reserve-d0" < %s | FileCheck --check-prefix=D0 %s9; RUN: llc -mtriple=m68k -mattr="+reserve-d1" < %s | FileCheck --check-prefix=D1 %s10; RUN: llc -mtriple=m68k -mattr="+reserve-d2" < %s | FileCheck --check-prefix=D2 %s11; RUN: llc -mtriple=m68k -mattr="+reserve-d3" < %s | FileCheck --check-prefix=D3 %s12; RUN: llc -mtriple=m68k -mattr="+reserve-d4" < %s | FileCheck --check-prefix=D4 %s13; RUN: llc -mtriple=m68k -mattr="+reserve-d5" < %s | FileCheck --check-prefix=D5 %s14; RUN: llc -mtriple=m68k -mattr="+reserve-d6" < %s | FileCheck --check-prefix=D6 %s15; RUN: llc -mtriple=m68k -mattr="+reserve-d7" < %s | FileCheck --check-prefix=D7 %s16 17; Used to exhaust all registers18;19; A better way to do this might be:20; ```21; @var = global [16 x i32] zeroinitializer22; ...23; %tmp = load load volatile [16 x i32], [16 x i32]* @var24; store volatile [16 x i32] %tmp, [16 x i32]* @var25; ```26; Which is copied from `test/CodeGen/RISCV/reserved-regs.ll`.27; But currently we have problem doing codegen for the above snippet28; (https://bugs.llvm.org/show_bug.cgi?id=50377).29define void @foo(ptr nocapture readonly %a, ptr nocapture readonly %b, ptr nocapture readonly %c, ptr nocapture readonly %d,30 ptr nocapture readonly %a1, ptr nocapture readonly %b1, ptr nocapture readonly %c1, ptr nocapture readonly %d1,31 ptr nocapture readonly %a2, ptr nocapture readonly %b2, ptr nocapture readonly %c2, ptr nocapture readonly %d2,32 ptr nocapture readonly %a3, ptr nocapture readonly %b3, ptr nocapture readonly %c3, ptr nocapture readonly %d3) {33entry:34 %0 = load i32, ptr %a, align 435 %1 = load i32, ptr %b, align 436 %2 = load i32, ptr %c, align 437 %3 = load i32, ptr %d, align 438 %4 = load i32, ptr %a1, align 439 %5 = load i32, ptr %b1, align 440 %6 = load i32, ptr %c1, align 441 %7 = load i32, ptr %d1, align 442 %8 = load i32, ptr %a2, align 443 %9 = load i32, ptr %b2, align 444 %10 = load i32, ptr %c2, align 445 %11 = load i32, ptr %d2, align 446 %12 = load i32, ptr %a3, align 447 %13 = load i32, ptr %b3, align 448 %14 = load i32, ptr %c3, align 449 %15 = load i32, ptr %d3, align 450 ; A0-NOT: %a051 ; A1-NOT: %a152 ; A2-NOT: %a253 ; A3-NOT: %a354 ; A4-NOT: %a455 ; A5-NOT: %a556 ; A6-NOT: %a657 ; D0-NOT: %d058 ; D1-NOT: %d159 ; D2-NOT: %d260 ; D3-NOT: %d361 ; D4-NOT: %d462 ; D5-NOT: %d563 ; D6-NOT: %d664 ; D7-NOT: %d765 tail call void @bar(i32 %0, i32 %1, i32 %2, i32 %3, i32 %4, i32 %5, i32 %6, i32 %7, i32 %8, i32 %9, i32 %10, i32 %11, i32 %12, i32 %13, i32 %14, i32 %15)66 ret void67}68 69declare void @bar(i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32, i32)70 71