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1# RUN: llc -mtriple aarch64-- -run-pass instruction-select -simplify-mir \2# RUN: -verify-machineinstrs %s -o - | FileCheck %s3#4# RUN: llc -mtriple aarch64-- -global-isel=true -global-isel-abort=2 \5# RUN: -start-after=regbankselect -stop-before=finalize-isel \6# RUN: -simplify-mir -verify-machineinstrs %s -o - 2>&1 \7# RUN: | FileCheck %s --check-prefix=FALLBACK8 9# Test that:10# 1) MIRParser can deserialize FailedISel property.11# 2) Machine Verifier respects FailedISel and doesn't complain needlessly.12# 3) MIRPrinter is able to print FailedISel MIR after InstructionSelect pass.13# 4) MIRPrinter can serialize FailedISel property.14# 5) It's possible to start llc mid-GlobalISel pipeline from a MIR file with15# the FailedISel property set to true and watch it properly fallback to16# FastISel / SelectionDAG ISel.17# 6) Resetting a MachineFunction resets unique MachineBasicBlock IDs as well.18--- |19 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"20 target triple = "aarch64--"21 22 define i32 @test(i32 %a, i32 %b) #0 {23 entry:24 %add = add i32 %b, %a25 ret i32 %add26 }27 28 attributes #0 = { nounwind readnone ssp }29...30---31# CHECK-LABEL: name: test32# CHECK: failedISel: true33#34# FALLBACK: warning: Instruction selection used fallback path for test35# FALLBACK-LABEL: name: test36# FALLBACK-NOT: failedISel37name: test38alignment: 439legalized: true40regBankSelected: true41failedISel: true42tracksRegLiveness: true43body: |44 bb.0.entry:45 liveins: $w0, $w146 47 ; CHECK: liveins: $w0, $w148 ;49 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $w050 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $w151 ; CHECK: [[ADD:%[0-9]+]]:gpr(s32) = G_ADD [[COPY1]], [[COPY]]52 ; CHECK: $w0 = COPY [[ADD]](s32)53 ; CHECK: RET_ReallyLR implicit $w054 ;55 ; FALLBACK: body: |56 ; FALLBACK-NEXT: bb.0.entry:57 ; FALLBACK-NEXT: liveins: $w0, $w158 ;59 ; FALLBACK: [[COPY:%[0-9]+]]:gpr32 = COPY $w160 ; FALLBACK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w061 ; FALLBACK: [[ADDWrr:%[0-9]+]]:gpr32 = ADDWrr [[COPY]], [[COPY1]]62 ; FALLBACK: $w0 = COPY [[ADDWrr]]63 ; FALLBACK: RET_ReallyLR implicit $w064 65 %0:_(s32) = COPY $w066 %1:_(s32) = COPY $w167 %2:gpr(s32) = G_ADD %1, %068 $w0 = COPY %2(s32)69 RET_ReallyLR implicit $w070...71