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1; RUN: llc -O0 -frame-pointer=all < %s | FileCheck %s2 3target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16"4target triple = "msp430---elf"5 6define void @fp() nounwind {7entry:8; CHECK-LABEL: fp:9; CHECK: push r410; CHECK: mov r1, r411; CHECK: sub #2, r112 %i = alloca i16, align 213; CHECK: clr -2(r4)14 store i16 0, ptr %i, align 215; CHECK: pop r416 ret void17}18 19; Due to FPB not being marked as reserved, the register allocator used to select20; r4 as the register for the "r" constraint below. This test verifies that this21; does not happen anymore. Note that the only reason an ISR is used here is that22; the register allocator selects r4 first instead of fifth in a normal function.23define msp430_intrcc void @fpb_alloced() #0 {24; CHECK-LABEL: fpb_alloced:25; CHECK-NOT: mov.b #0, r426; CHECK: nop27 call void asm sideeffect "nop", "r"(i8 0)28 ret void29}30 31attributes #0 = { noinline nounwind optnone "interrupt"="2" }32