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1; RUN: llc -mtriple=msp430 < %s | FileCheck %s2target datalayout = "e-p:16:16:16-i1:8:8-i8:8:8-i16:16:16-i32:16:32"3target triple = "msp430-generic-generic"4 5define i16 @sccweqand(i16 %a, i16 %b) nounwind {6 %t1 = and i16 %a, %b7 %t2 = icmp eq i16 %t1, 08 %t3 = zext i1 %t2 to i169 ret i16 %t310}11; CHECK-LABEL: sccweqand:12; CHECK: bit r13, r1213; CHECK: mov r2, r1214; CHECK: rra r1215; CHECK: and #1, r1216 17define i16 @sccwneand(i16 %a, i16 %b) nounwind {18 %t1 = and i16 %a, %b19 %t2 = icmp ne i16 %t1, 020 %t3 = zext i1 %t2 to i1621 ret i16 %t322}23; CHECK-LABEL: sccwneand:24; CHECK: bit r13, r1225; CHECK: mov r2, r1226; CHECK: and #1, r1227 28define i16 @sccwne(i16 %a, i16 %b) nounwind {29 %t1 = icmp ne i16 %a, %b30 %t2 = zext i1 %t1 to i1631 ret i16 %t232}33; CHECK-LABEL:sccwne:34; CHECK: cmp r13, r1235; CHECK: mov r2, r1336; CHECK: rra r1337; CHECK: mov #1, r1238; CHECK: bic r13, r1239 40define i16 @sccweq(i16 %a, i16 %b) nounwind {41 %t1 = icmp eq i16 %a, %b42 %t2 = zext i1 %t1 to i1643 ret i16 %t244}45; CHECK-LABEL:sccweq:46; CHECK: cmp r13, r1247; CHECK: mov r2, r1248; CHECK: rra r1249; CHECK: and #1, r1250 51define i16 @sccwugt(i16 %a, i16 %b) nounwind {52 %t1 = icmp ugt i16 %a, %b53 %t2 = zext i1 %t1 to i1654 ret i16 %t255}56; CHECK-LABEL:sccwugt:57; CHECK: cmp r12, r1358; CHECK: mov #1, r1259; CHECK: bic r2, r1260 61define i16 @sccwuge(i16 %a, i16 %b) nounwind {62 %t1 = icmp uge i16 %a, %b63 %t2 = zext i1 %t1 to i1664 ret i16 %t265}66; CHECK-LABEL:sccwuge:67; CHECK: cmp r13, r1268; CHECK: mov r2, r1269; CHECK: and #1, r1270 71define i16 @sccwult(i16 %a, i16 %b) nounwind {72 %t1 = icmp ult i16 %a, %b73 %t2 = zext i1 %t1 to i1674 ret i16 %t275}76; CHECK-LABEL:sccwult:77; CHECK: cmp r13, r1278; CHECK: mov #1, r1279; CHECK: bic r2, r1280 81define i16 @sccwule(i16 %a, i16 %b) nounwind {82 %t1 = icmp ule i16 %a, %b83 %t2 = zext i1 %t1 to i1684 ret i16 %t285}86; CHECK-LABEL:sccwule:87; CHECK: cmp r12, r1388; CHECK: mov r2, r1289; CHECK: and #1, r1290 91define i16 @sccwsgt(i16 %a, i16 %b) nounwind {92 %t1 = icmp sgt i16 %a, %b93 %t2 = zext i1 %t1 to i1694 ret i16 %t295}96 97define i16 @sccwsge(i16 %a, i16 %b) nounwind {98 %t1 = icmp sge i16 %a, %b99 %t2 = zext i1 %t1 to i16100 ret i16 %t2101}102 103define i16 @sccwslt(i16 %a, i16 %b) nounwind {104 %t1 = icmp slt i16 %a, %b105 %t2 = zext i1 %t1 to i16106 ret i16 %t2107}108 109define i16 @sccwsle(i16 %a, i16 %b) nounwind {110 %t1 = icmp sle i16 %a, %b111 %t2 = zext i1 %t1 to i16112 ret i16 %t2113}114 115