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1; RUN: llc -mtriple=mipsel -relocation-model=pic -O0 \2; RUN: -fast-isel-abort=3 -mcpu=mips32r2 < %s | FileCheck %s3; RUN: llc -mtriple=mipsel -relocation-model=pic -O0 \4; RUN: -fast-isel-abort=3 -mcpu=mips32 < %s | FileCheck %s5 6@s1 = global i16 -89, align 27@s2 = global i16 4, align 28@us1 = global i16 -503, align 29@us2 = global i16 5, align 210@s3 = common global i16 0, align 211@us3 = common global i16 0, align 212 13define void @sll() {14entry:15 %0 = load i16, ptr @s1, align 216 %1 = load i16, ptr @s2, align 217 %shl = shl i16 %0, %118 store i16 %shl, ptr @s3, align 219; CHECK-LABEL: sll:20; CHECK: lui $[[REG_GPa:[0-9]+]], %hi(_gp_disp)21; CHECK-DAG: addiu $[[REG_GPb:[0-9]+]], $[[REG_GPa]], %lo(_gp_disp)22; CHECK-DAG: addu $[[REG_GP:[0-9]+]], $[[REG_GPb]], $2523; CHECK-DAG: lw $[[S3_ADDR:[0-9]+]], %got(s3)($[[REG_GP]])24; CHECK-DAG: lw $[[S2_ADDR:[0-9]+]], %got(s2)($[[REG_GP]])25; CHECK-DAG: lw $[[S1_ADDR:[0-9]+]], %got(s1)($[[REG_GP]])26; CHECK-DAG: lhu $[[S1:[0-9]+]], 0($[[S1_ADDR]])27; CHECK-DAG: lhu $[[S2:[0-9]+]], 0($[[S2_ADDR]])28; CHECK-DAG: sllv $[[RES:[0-9]+]], $[[S1]], $[[S2]]29; CHECK: sh $[[RES]], 0($[[S3_ADDR]])30 ret void31}32 33define void @slli() {34entry:35 %0 = load i16, ptr @s1, align 236 %shl = shl i16 %0, 537 store i16 %shl, ptr @s3, align 238; CHECK-LABEL: slli:39; CHECK: lui $[[REG_GPa:[0-9]+]], %hi(_gp_disp)40; CHECK-DAG: addiu $[[REG_GPb:[0-9]+]], $[[REG_GPa]], %lo(_gp_disp)41; CHECK-DAG: addu $[[REG_GP:[0-9]+]], $[[REG_GPb]], $2542; CHECK-DAG: lw $[[S1_ADDR:[0-9]+]], %got(s1)($[[REG_GP]])43; CHECK-DAG: lhu $[[S1:[0-9]+]], 0($[[S1_ADDR]])44; CHECK: sll $[[RES:[0-9]+]], $[[S1]], 545; CHECK: lw $[[S3_ADDR:[0-9]+]], %got(s3)($[[REG_GP]])46; CHECK: sh $[[RES]], 0($[[S3_ADDR]])47 ret void48}49 50define void @srl() {51entry:52 %0 = load i16, ptr @us1, align 253 %1 = load i16, ptr @us2, align 254 %shr = lshr i16 %0, %155 store i16 %shr, ptr @us3, align 256 ret void57; CHECK-LABEL: srl:58; CHECK: lui $[[REG_GPa:[0-9]+]], %hi(_gp_disp)59; CHECK-DAG: addiu $[[REG_GPb:[0-9]+]], $[[REG_GPa]], %lo(_gp_disp)60; CHECK-DAG: addu $[[REG_GP:[0-9]+]], $[[REG_GPb]], $2561; CHECK-DAG: lw $[[US2_ADDR:[0-9]+]], %got(us2)($[[REG_GP]])62; CHECK-DAG: lw $[[US1_ADDR:[0-9]+]], %got(us1)($[[REG_GP]])63; CHECK-DAG: lhu $[[US1:[0-9]+]], 0($[[US1_ADDR]])64; CHECK-DAG: lhu $[[US2:[0-9]+]], 0($[[US2_ADDR]])65; CHECK: srlv $[[RES:[0-9]+]], $[[US1]], $[[US2]]66; CHECK: lw $[[US3_ADDR:[0-9]+]], %got(us3)($[[REG_GP]])67; CHECK: sh $[[RES]], 0($[[S3_ADDR]])68}69 70define void @srli() {71entry:72 %0 = load i16, ptr @us1, align 273 %shr = lshr i16 %0, 474 store i16 %shr, ptr @us3, align 275; CHECK-LABEL: srli:76; CHECK: lui $[[REG_GPa:[0-9]+]], %hi(_gp_disp)77; CHECK-DAG: addiu $[[REG_GPb:[0-9]+]], $[[REG_GPa]], %lo(_gp_disp)78; CHECK-DAG: addu $[[REG_GP:[0-9]+]], $[[REG_GPb]], $2579; CHECK-DAG: lw $[[US1_ADDR:[0-9]+]], %got(us1)($[[REG_GP]])80; CHECK-DAG: lhu $[[US1:[0-9]+]], 0($[[US1_ADDR]])81; CHECK: srl $[[RES:[0-9]+]], $[[US1]], 482; CHECK: lw $[[US3_ADDR:[0-9]+]], %got(us3)($[[REG_GP]])83; CHECK: sh $[[RES]], 0($[[S3_ADDR]])84 ret void85}86 87define void @sra() {88entry:89 %0 = load i16, ptr @s1, align 290 %1 = load i16, ptr @s2, align 291 %shr = ashr i16 %0, %192 store i16 %shr, ptr @s3, align 293; CHECK-LABEL: sra:94; CHECK: lui $[[REG_GPa:[0-9]+]], %hi(_gp_disp)95; CHECK-DAG: addiu $[[REG_GPb:[0-9]+]], $[[REG_GPa]], %lo(_gp_disp)96; CHECK-DAG: addu $[[REG_GP:[0-9]+]], $[[REG_GPb]], $2597; CHECK-DAG: lw $[[S2_ADDR:[0-9]+]], %got(s2)($[[REG_GP]])98; CHECK-DAG: lw $[[S1_ADDR:[0-9]+]], %got(s1)($[[REG_GP]])99; CHECK-DAG: lhu $[[S1:[0-9]+]], 0($[[S1_ADDR]])100; CHECK-DAG: lhu $[[S2:[0-9]+]], 0($[[S2_ADDR]])101; CHECK: srav $[[RES:[0-9]+]], $[[S1]], $[[S2]]102; CHECK: lw $[[S3_ADDR:[0-9]+]], %got(s3)($[[REG_GP]])103; CHECK: sh $[[RES]], 0($[[S3_ADDR]])104 ret void105}106 107define void @srai() {108entry:109 %0 = load i16, ptr @s1, align 2110 %shr = ashr i16 %0, 2111 store i16 %shr, ptr @s3, align 2112; CHECK-LABEL: srai:113; CHECK: lui $[[REG_GPa:[0-9]+]], %hi(_gp_disp)114; CHECK-DAG: addiu $[[REG_GPb:[0-9]+]], $[[REG_GPa]], %lo(_gp_disp)115; CHECK-DAG: addu $[[REG_GP:[0-9]+]], $[[REG_GPb]], $25116; CHECK-DAG: lw $[[S1_ADDR:[0-9]+]], %got(s1)($[[REG_GP]])117; CHECK-DAG: lhu $[[S1:[0-9]+]], 0($[[S1_ADDR]])118; CHECK: sra $[[RES:[0-9]+]], $[[S1]], 2119; CHECK: lw $[[S3_ADDR:[0-9]+]], %got(s3)($[[REG_GP]])120; CHECK: sh $[[RES]], 0($[[S3_ADDR]])121 ret void122}123