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1; RUN: llc -mtriple=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \2; RUN: < %s | FileCheck %s 3; RUN: llc -mtriple=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \4; RUN: < %s | FileCheck %s5; RUN: llc -mtriple=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32r2 \6; RUN: < %s | FileCheck %s -check-prefix=mips32r2 7; RUN: llc -mtriple=mipsel -relocation-model=pic -O0 -fast-isel-abort=3 -mcpu=mips32 \8; RUN: < %s | FileCheck %s -check-prefix=mips329 10@f = common global float 0.000000e+00, align 411@de = common global double 0.000000e+00, align 812 13; Function Attrs: nounwind14define void @f1() #0 {15entry:16 store float 0x3FFA76C8C0000000, ptr @f, align 417 ret void18; CHECK: .ent f119; CHECK: lui $[[REG1:[0-9]+]], 1633920; CHECK: ori $[[REG2:[0-9]+]], $[[REG1]], 4666221; CHECK: mtc1 $[[REG2]], $f[[REG3:[0-9]+]]22; CHECK: lw $[[REG4:[0-9]+]], %got(f)(${{[0-9]+}})23; CHECK: swc1 $f[[REG3]], 0($[[REG4]])24; CHECK: .end f125 26}27 28; Function Attrs: nounwind29define void @d1() #0 {30entry:31 store double 1.234567e+00, ptr @de, align 832; mip32r2: .ent d133; mips32r2: lui $[[REG1a:[0-9]+]], 1637134; mips32r2: ori $[[REG2a:[0-9]+]], $[[REG1a]], 4935335; mips32r2: lui $[[REG1b:[0-9]+]], 2140336; mips32r2: ori $[[REG2b:[0-9]+]], $[[REG1b]], 3495137; mips32r2: mtc1 $[[REG2b]], $f[[REG3:[0-9]+]]38; mips32r2: mthc1 $[[REG2a]], $f[[REG3]]39; mips32r2: sdc1 $f[[REG3]], 0(${{[0-9]+}})40; mips32r2: .end d141; mips32: .ent d142; mips32: lui $[[REG1a:[0-9]+]], 1637143; mips32: ori $[[REG2a:[0-9]+]], $[[REG1a]], 4935344; mips32: lui $[[REG1b:[0-9]+]], 2140345; mips32: ori $[[REG2b:[0-9]+]], $[[REG1b]], 3495146; mips32: mtc1 $[[REG2b]], $f[[REG3:[0-9]+]]47; mips32: mtc1 $[[REG2a]], $f{{[0-9]+}}48; mips32: sdc1 $f[[REG3]], 0(${{[0-9]+}})49; mips32: .end d150 51 ret void52}53 54attributes #0 = { nounwind "less-precise-fpmad"="false" "frame-pointer"="all" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "use-soft-float"="false" }55