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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS323--- |4 5 define void @and_i32() {entry: ret void}6 define void @and_imm() {entry: ret void}7 define void @and_not_imm32ZExt16() {entry: ret void}8 define void @or_i32() {entry: ret void}9 define void @or_imm() {entry: ret void}10 define void @or_not_imm32ZExt16() {entry: ret void}11 define void @xor_i32() {entry: ret void}12 define void @xor_imm() {entry: ret void}13 define void @xor_not_imm32ZExt16() {entry: ret void}14 define void @shl(i32) {entry: ret void}15 define void @ashr(i32) {entry: ret void}16 define void @lshr(i32) {entry: ret void}17 define void @shlv(i32, i32) {entry: ret void}18 define void @ashrv(i32, i32) {entry: ret void}19 define void @lshrv(i32, i32) {entry: ret void}20 21...22---23name: and_i3224alignment: 425legalized: true26regBankSelected: true27tracksRegLiveness: true28body: |29 bb.1.entry:30 liveins: $a0, $a131 32 ; MIPS32-LABEL: name: and_i3233 ; MIPS32: liveins: $a0, $a134 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a035 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a136 ; MIPS32: [[AND:%[0-9]+]]:gpr32 = AND [[COPY1]], [[COPY]]37 ; MIPS32: $v0 = COPY [[AND]]38 ; MIPS32: RetRA implicit $v039 %0:gprb(s32) = COPY $a040 %1:gprb(s32) = COPY $a141 %2:gprb(s32) = G_AND %1, %042 $v0 = COPY %2(s32)43 RetRA implicit $v044 45...46---47name: and_imm48alignment: 449legalized: true50regBankSelected: true51tracksRegLiveness: true52body: |53 bb.1.entry:54 liveins: $a055 56 ; MIPS32-LABEL: name: and_imm57 ; MIPS32: liveins: $a058 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a059 ; MIPS32: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 25560 ; MIPS32: $v0 = COPY [[ANDi]]61 ; MIPS32: RetRA implicit $v062 %0:gprb(s32) = COPY $a063 %1:gprb(s32) = G_CONSTANT i32 25564 %2:gprb(s32) = G_AND %0, %165 $v0 = COPY %2(s32)66 RetRA implicit $v067 68...69---70name: and_not_imm32ZExt1671alignment: 472legalized: true73regBankSelected: true74tracksRegLiveness: true75body: |76 bb.1.entry:77 liveins: $a078 79 ; MIPS32-LABEL: name: and_not_imm32ZExt1680 ; MIPS32: liveins: $a081 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a082 ; MIPS32: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu $zero, 6528083 ; MIPS32: [[AND:%[0-9]+]]:gpr32 = AND [[COPY]], [[ADDiu]]84 ; MIPS32: $v0 = COPY [[AND]]85 ; MIPS32: RetRA implicit $v086 %0:gprb(s32) = COPY $a087 %1:gprb(s32) = G_CONSTANT i32 -25688 %2:gprb(s32) = G_AND %0, %189 $v0 = COPY %2(s32)90 RetRA implicit $v091 92...93---94name: or_i3295alignment: 496legalized: true97regBankSelected: true98tracksRegLiveness: true99body: |100 bb.1.entry:101 liveins: $a0, $a1102 103 ; MIPS32-LABEL: name: or_i32104 ; MIPS32: liveins: $a0, $a1105 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0106 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1107 ; MIPS32: [[OR:%[0-9]+]]:gpr32 = OR [[COPY1]], [[COPY]]108 ; MIPS32: $v0 = COPY [[OR]]109 ; MIPS32: RetRA implicit $v0110 %0:gprb(s32) = COPY $a0111 %1:gprb(s32) = COPY $a1112 %2:gprb(s32) = G_OR %1, %0113 $v0 = COPY %2(s32)114 RetRA implicit $v0115 116...117---118name: or_imm119alignment: 4120legalized: true121regBankSelected: true122tracksRegLiveness: true123body: |124 bb.1.entry:125 liveins: $a0126 127 ; MIPS32-LABEL: name: or_imm128 ; MIPS32: liveins: $a0129 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0130 ; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi [[COPY]], 65535131 ; MIPS32: $v0 = COPY [[ORi]]132 ; MIPS32: RetRA implicit $v0133 %0:gprb(s32) = COPY $a0134 %1:gprb(s32) = G_CONSTANT i32 65535135 %2:gprb(s32) = G_OR %0, %1136 $v0 = COPY %2(s32)137 RetRA implicit $v0138 139...140---141name: or_not_imm32ZExt16142alignment: 4143legalized: true144regBankSelected: true145tracksRegLiveness: true146body: |147 bb.1.entry:148 liveins: $a0149 150 ; MIPS32-LABEL: name: or_not_imm32ZExt16151 ; MIPS32: liveins: $a0152 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0153 ; MIPS32: [[LUi:%[0-9]+]]:gpr32 = LUi 1154 ; MIPS32: [[OR:%[0-9]+]]:gpr32 = OR [[COPY]], [[LUi]]155 ; MIPS32: $v0 = COPY [[OR]]156 ; MIPS32: RetRA implicit $v0157 %0:gprb(s32) = COPY $a0158 %1:gprb(s32) = G_CONSTANT i32 65536159 %2:gprb(s32) = G_OR %0, %1160 $v0 = COPY %2(s32)161 RetRA implicit $v0162 163...164---165name: xor_i32166alignment: 4167legalized: true168regBankSelected: true169tracksRegLiveness: true170body: |171 bb.1.entry:172 liveins: $a0, $a1173 174 ; MIPS32-LABEL: name: xor_i32175 ; MIPS32: liveins: $a0, $a1176 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0177 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1178 ; MIPS32: [[XOR:%[0-9]+]]:gpr32 = XOR [[COPY1]], [[COPY]]179 ; MIPS32: $v0 = COPY [[XOR]]180 ; MIPS32: RetRA implicit $v0181 %0:gprb(s32) = COPY $a0182 %1:gprb(s32) = COPY $a1183 %2:gprb(s32) = G_XOR %1, %0184 $v0 = COPY %2(s32)185 RetRA implicit $v0186 187...188---189name: xor_imm190alignment: 4191legalized: true192regBankSelected: true193tracksRegLiveness: true194body: |195 bb.1.entry:196 liveins: $a0197 198 ; MIPS32-LABEL: name: xor_imm199 ; MIPS32: liveins: $a0200 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0201 ; MIPS32: [[XORi:%[0-9]+]]:gpr32 = XORi [[COPY]], 1202 ; MIPS32: $v0 = COPY [[XORi]]203 ; MIPS32: RetRA implicit $v0204 %0:gprb(s32) = COPY $a0205 %1:gprb(s32) = G_CONSTANT i32 1206 %2:gprb(s32) = G_XOR %0, %1207 $v0 = COPY %2(s32)208 RetRA implicit $v0209 210...211---212name: xor_not_imm32ZExt16213alignment: 4214legalized: true215regBankSelected: true216tracksRegLiveness: true217body: |218 bb.1.entry:219 liveins: $a0220 221 ; MIPS32-LABEL: name: xor_not_imm32ZExt16222 ; MIPS32: liveins: $a0223 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0224 ; MIPS32: [[NOR:%[0-9]+]]:gpr32 = NOR [[COPY]], $zero225 ; MIPS32: $v0 = COPY [[NOR]]226 ; MIPS32: RetRA implicit $v0227 %0:gprb(s32) = COPY $a0228 %1:gprb(s32) = G_CONSTANT i32 -1229 %2:gprb(s32) = G_XOR %0, %1230 $v0 = COPY %2(s32)231 RetRA implicit $v0232 233...234---235name: shl236alignment: 4237legalized: true238regBankSelected: true239tracksRegLiveness: true240body: |241 bb.1.entry:242 liveins: $a0243 244 ; MIPS32-LABEL: name: shl245 ; MIPS32: liveins: $a0246 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0247 ; MIPS32: [[SLL:%[0-9]+]]:gpr32 = SLL [[COPY]], 1248 ; MIPS32: $v0 = COPY [[SLL]]249 ; MIPS32: RetRA implicit $v0250 %0:gprb(s32) = COPY $a0251 %1:gprb(s32) = G_CONSTANT i32 1252 %2:gprb(s32) = G_SHL %0, %1253 $v0 = COPY %2(s32)254 RetRA implicit $v0255 256...257---258name: ashr259alignment: 4260legalized: true261regBankSelected: true262tracksRegLiveness: true263body: |264 bb.1.entry:265 liveins: $a0266 267 ; MIPS32-LABEL: name: ashr268 ; MIPS32: liveins: $a0269 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0270 ; MIPS32: [[SRA:%[0-9]+]]:gpr32 = SRA [[COPY]], 1271 ; MIPS32: $v0 = COPY [[SRA]]272 ; MIPS32: RetRA implicit $v0273 %0:gprb(s32) = COPY $a0274 %1:gprb(s32) = G_CONSTANT i32 1275 %2:gprb(s32) = G_ASHR %0, %1276 $v0 = COPY %2(s32)277 RetRA implicit $v0278 279...280---281name: lshr282alignment: 4283legalized: true284regBankSelected: true285tracksRegLiveness: true286body: |287 bb.1.entry:288 liveins: $a0289 290 ; MIPS32-LABEL: name: lshr291 ; MIPS32: liveins: $a0292 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0293 ; MIPS32: [[SRL:%[0-9]+]]:gpr32 = SRL [[COPY]], 1294 ; MIPS32: $v0 = COPY [[SRL]]295 ; MIPS32: RetRA implicit $v0296 %0:gprb(s32) = COPY $a0297 %1:gprb(s32) = G_CONSTANT i32 1298 %2:gprb(s32) = G_LSHR %0, %1299 $v0 = COPY %2(s32)300 RetRA implicit $v0301 302...303---304name: shlv305alignment: 4306legalized: true307regBankSelected: true308tracksRegLiveness: true309body: |310 bb.1.entry:311 liveins: $a0, $a1312 313 ; MIPS32-LABEL: name: shlv314 ; MIPS32: liveins: $a0, $a1315 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0316 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1317 ; MIPS32: [[SLLV:%[0-9]+]]:gpr32 = SLLV [[COPY]], [[COPY1]]318 ; MIPS32: $v0 = COPY [[SLLV]]319 ; MIPS32: RetRA implicit $v0320 %0:gprb(s32) = COPY $a0321 %1:gprb(s32) = COPY $a1322 %2:gprb(s32) = G_SHL %0, %1323 $v0 = COPY %2(s32)324 RetRA implicit $v0325 326...327---328name: ashrv329alignment: 4330legalized: true331regBankSelected: true332tracksRegLiveness: true333body: |334 bb.1.entry:335 liveins: $a0, $a1336 337 ; MIPS32-LABEL: name: ashrv338 ; MIPS32: liveins: $a0, $a1339 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0340 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1341 ; MIPS32: [[SRAV:%[0-9]+]]:gpr32 = SRAV [[COPY]], [[COPY1]]342 ; MIPS32: $v0 = COPY [[SRAV]]343 ; MIPS32: RetRA implicit $v0344 %0:gprb(s32) = COPY $a0345 %1:gprb(s32) = COPY $a1346 %2:gprb(s32) = G_ASHR %0, %1347 $v0 = COPY %2(s32)348 RetRA implicit $v0349 350...351---352name: lshrv353alignment: 4354legalized: true355regBankSelected: true356tracksRegLiveness: true357body: |358 bb.1.entry:359 liveins: $a0, $a1360 361 ; MIPS32-LABEL: name: lshrv362 ; MIPS32: liveins: $a0, $a1363 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0364 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1365 ; MIPS32: [[SRLV:%[0-9]+]]:gpr32 = SRLV [[COPY]], [[COPY1]]366 ; MIPS32: $v0 = COPY [[SRLV]]367 ; MIPS32: RetRA implicit $v0368 %0:gprb(s32) = COPY $a0369 %1:gprb(s32) = COPY $a1370 %2:gprb(s32) = G_LSHR %0, %1371 $v0 = COPY %2(s32)372 RetRA implicit $v0373 374...375