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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=mipsel-linux-gnu -mcpu=mips32r5 -mattr=+msa,+fp64,+nan2008 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=P56003--- |4 5 define void @fabs_v4f32(ptr %a, ptr %c) { entry: ret void }6 define void @fabs_v2f64(ptr %a, ptr %c) { entry: ret void }7 8...9---10name: fabs_v4f3211alignment: 412legalized: true13regBankSelected: true14tracksRegLiveness: true15body: |16 bb.1.entry:17 liveins: $a0, $a118 19 ; P5600-LABEL: name: fabs_v4f3220 ; P5600: liveins: $a0, $a121 ; P5600: [[COPY:%[0-9]+]]:gpr32 = COPY $a022 ; P5600: [[COPY1:%[0-9]+]]:gpr32 = COPY $a123 ; P5600: [[LD_W:%[0-9]+]]:msa128w = LD_W [[COPY]], 0 :: (load (<4 x s32>) from %ir.a)24 ; P5600: [[FABS_W:%[0-9]+]]:msa128w = FABS_W [[LD_W]]25 ; P5600: ST_W [[FABS_W]], [[COPY1]], 0 :: (store (<4 x s32>) into %ir.c)26 ; P5600: RetRA27 %0:gprb(p0) = COPY $a028 %1:gprb(p0) = COPY $a129 %2:fprb(<4 x s32>) = G_LOAD %0(p0) :: (load (<4 x s32>) from %ir.a)30 %3:fprb(<4 x s32>) = G_FABS %231 G_STORE %3(<4 x s32>), %1(p0) :: (store (<4 x s32>) into %ir.c)32 RetRA33 34...35---36name: fabs_v2f6437alignment: 438legalized: true39regBankSelected: true40tracksRegLiveness: true41body: |42 bb.1.entry:43 liveins: $a0, $a144 45 ; P5600-LABEL: name: fabs_v2f6446 ; P5600: liveins: $a0, $a147 ; P5600: [[COPY:%[0-9]+]]:gpr32 = COPY $a048 ; P5600: [[COPY1:%[0-9]+]]:gpr32 = COPY $a149 ; P5600: [[LD_D:%[0-9]+]]:msa128d = LD_D [[COPY]], 0 :: (load (<2 x s64>) from %ir.a)50 ; P5600: [[FABS_D:%[0-9]+]]:msa128d = FABS_D [[LD_D]]51 ; P5600: ST_D [[FABS_D]], [[COPY1]], 0 :: (store (<2 x s64>) into %ir.c)52 ; P5600: RetRA53 %0:gprb(p0) = COPY $a054 %1:gprb(p0) = COPY $a155 %2:fprb(<2 x s64>) = G_LOAD %0(p0) :: (load (<2 x s64>) from %ir.a)56 %3:fprb(<2 x s64>) = G_FABS %257 G_STORE %3(<2 x s64>), %1(p0) :: (store (<2 x s64>) into %ir.c)58 RetRA59 60...61