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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS323--- |4 5 define void @eq_i32() {entry: ret void}6 define void @ne_i32() {entry: ret void}7 define void @sgt_i32() {entry: ret void}8 define void @sge_i32() {entry: ret void}9 define void @slt_i32() {entry: ret void}10 define void @sle_i32() {entry: ret void}11 define void @ugt_i32() {entry: ret void}12 define void @uge_i32() {entry: ret void}13 define void @ult_i32() {entry: ret void}14 define void @ule_i32() {entry: ret void}15 define void @eq_ptr() {entry: ret void}16 17 18...19---20name: eq_i3221alignment: 422legalized: true23regBankSelected: true24tracksRegLiveness: true25body: |26 bb.1.entry:27 liveins: $a0, $a128 29 ; MIPS32-LABEL: name: eq_i3230 ; MIPS32: liveins: $a0, $a131 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a032 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a133 ; MIPS32: [[XOR:%[0-9]+]]:gpr32 = XOR [[COPY]], [[COPY1]]34 ; MIPS32: [[SLTiu:%[0-9]+]]:gpr32 = SLTiu [[XOR]], 135 ; MIPS32: $v0 = COPY [[SLTiu]]36 ; MIPS32: RetRA implicit $v037 %0:gprb(s32) = COPY $a038 %1:gprb(s32) = COPY $a139 %4:gprb(s32) = G_ICMP intpred(eq), %0(s32), %140 %3:gprb(s32) = COPY %4(s32)41 $v0 = COPY %3(s32)42 RetRA implicit $v043 44...45---46name: ne_i3247alignment: 448legalized: true49regBankSelected: true50tracksRegLiveness: true51body: |52 bb.1.entry:53 liveins: $a0, $a154 55 ; MIPS32-LABEL: name: ne_i3256 ; MIPS32: liveins: $a0, $a157 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a058 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a159 ; MIPS32: [[XOR:%[0-9]+]]:gpr32 = XOR [[COPY]], [[COPY1]]60 ; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu $zero, [[XOR]]61 ; MIPS32: $v0 = COPY [[SLTu]]62 ; MIPS32: RetRA implicit $v063 %0:gprb(s32) = COPY $a064 %1:gprb(s32) = COPY $a165 %4:gprb(s32) = G_ICMP intpred(ne), %0(s32), %166 %3:gprb(s32) = COPY %4(s32)67 $v0 = COPY %3(s32)68 RetRA implicit $v069 70...71---72name: sgt_i3273alignment: 474legalized: true75regBankSelected: true76tracksRegLiveness: true77body: |78 bb.1.entry:79 liveins: $a0, $a180 81 ; MIPS32-LABEL: name: sgt_i3282 ; MIPS32: liveins: $a0, $a183 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a084 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a185 ; MIPS32: [[SLT:%[0-9]+]]:gpr32 = SLT [[COPY1]], [[COPY]]86 ; MIPS32: $v0 = COPY [[SLT]]87 ; MIPS32: RetRA implicit $v088 %0:gprb(s32) = COPY $a089 %1:gprb(s32) = COPY $a190 %4:gprb(s32) = G_ICMP intpred(sgt), %0(s32), %191 %3:gprb(s32) = COPY %4(s32)92 $v0 = COPY %3(s32)93 RetRA implicit $v094 95...96---97name: sge_i3298alignment: 499legalized: true100regBankSelected: true101tracksRegLiveness: true102body: |103 bb.1.entry:104 liveins: $a0, $a1105 106 ; MIPS32-LABEL: name: sge_i32107 ; MIPS32: liveins: $a0, $a1108 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0109 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1110 ; MIPS32: [[SLT:%[0-9]+]]:gpr32 = SLT [[COPY]], [[COPY1]]111 ; MIPS32: [[XORi:%[0-9]+]]:gpr32 = XORi [[SLT]], 1112 ; MIPS32: $v0 = COPY [[XORi]]113 ; MIPS32: RetRA implicit $v0114 %0:gprb(s32) = COPY $a0115 %1:gprb(s32) = COPY $a1116 %4:gprb(s32) = G_ICMP intpred(sge), %0(s32), %1117 %3:gprb(s32) = COPY %4(s32)118 $v0 = COPY %3(s32)119 RetRA implicit $v0120 121...122---123name: slt_i32124alignment: 4125legalized: true126regBankSelected: true127tracksRegLiveness: true128body: |129 bb.1.entry:130 liveins: $a0, $a1131 132 ; MIPS32-LABEL: name: slt_i32133 ; MIPS32: liveins: $a0, $a1134 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0135 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1136 ; MIPS32: [[SLT:%[0-9]+]]:gpr32 = SLT [[COPY]], [[COPY1]]137 ; MIPS32: $v0 = COPY [[SLT]]138 ; MIPS32: RetRA implicit $v0139 %0:gprb(s32) = COPY $a0140 %1:gprb(s32) = COPY $a1141 %4:gprb(s32) = G_ICMP intpred(slt), %0(s32), %1142 %3:gprb(s32) = COPY %4(s32)143 $v0 = COPY %3(s32)144 RetRA implicit $v0145 146...147---148name: sle_i32149alignment: 4150legalized: true151regBankSelected: true152tracksRegLiveness: true153body: |154 bb.1.entry:155 liveins: $a0, $a1156 157 ; MIPS32-LABEL: name: sle_i32158 ; MIPS32: liveins: $a0, $a1159 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0160 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1161 ; MIPS32: [[SLT:%[0-9]+]]:gpr32 = SLT [[COPY1]], [[COPY]]162 ; MIPS32: [[XORi:%[0-9]+]]:gpr32 = XORi [[SLT]], 1163 ; MIPS32: $v0 = COPY [[XORi]]164 ; MIPS32: RetRA implicit $v0165 %0:gprb(s32) = COPY $a0166 %1:gprb(s32) = COPY $a1167 %4:gprb(s32) = G_ICMP intpred(sle), %0(s32), %1168 %3:gprb(s32) = COPY %4(s32)169 $v0 = COPY %3(s32)170 RetRA implicit $v0171 172...173---174name: ugt_i32175alignment: 4176legalized: true177regBankSelected: true178tracksRegLiveness: true179body: |180 bb.1.entry:181 liveins: $a0, $a1182 183 ; MIPS32-LABEL: name: ugt_i32184 ; MIPS32: liveins: $a0, $a1185 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0186 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1187 ; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu [[COPY1]], [[COPY]]188 ; MIPS32: $v0 = COPY [[SLTu]]189 ; MIPS32: RetRA implicit $v0190 %0:gprb(s32) = COPY $a0191 %1:gprb(s32) = COPY $a1192 %4:gprb(s32) = G_ICMP intpred(ugt), %0(s32), %1193 %3:gprb(s32) = COPY %4(s32)194 $v0 = COPY %3(s32)195 RetRA implicit $v0196 197...198---199name: uge_i32200alignment: 4201legalized: true202regBankSelected: true203tracksRegLiveness: true204body: |205 bb.1.entry:206 liveins: $a0, $a1207 208 ; MIPS32-LABEL: name: uge_i32209 ; MIPS32: liveins: $a0, $a1210 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0211 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1212 ; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu [[COPY]], [[COPY1]]213 ; MIPS32: [[XORi:%[0-9]+]]:gpr32 = XORi [[SLTu]], 1214 ; MIPS32: $v0 = COPY [[XORi]]215 ; MIPS32: RetRA implicit $v0216 %0:gprb(s32) = COPY $a0217 %1:gprb(s32) = COPY $a1218 %4:gprb(s32) = G_ICMP intpred(uge), %0(s32), %1219 %3:gprb(s32) = COPY %4(s32)220 $v0 = COPY %3(s32)221 RetRA implicit $v0222 223...224---225name: ult_i32226alignment: 4227legalized: true228regBankSelected: true229tracksRegLiveness: true230body: |231 bb.1.entry:232 liveins: $a0, $a1233 234 ; MIPS32-LABEL: name: ult_i32235 ; MIPS32: liveins: $a0, $a1236 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0237 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1238 ; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu [[COPY]], [[COPY1]]239 ; MIPS32: $v0 = COPY [[SLTu]]240 ; MIPS32: RetRA implicit $v0241 %0:gprb(s32) = COPY $a0242 %1:gprb(s32) = COPY $a1243 %4:gprb(s32) = G_ICMP intpred(ult), %0(s32), %1244 %3:gprb(s32) = COPY %4(s32)245 $v0 = COPY %3(s32)246 RetRA implicit $v0247 248...249---250name: ule_i32251alignment: 4252legalized: true253regBankSelected: true254tracksRegLiveness: true255body: |256 bb.1.entry:257 liveins: $a0, $a1258 259 ; MIPS32-LABEL: name: ule_i32260 ; MIPS32: liveins: $a0, $a1261 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0262 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1263 ; MIPS32: [[SLTu:%[0-9]+]]:gpr32 = SLTu [[COPY1]], [[COPY]]264 ; MIPS32: [[XORi:%[0-9]+]]:gpr32 = XORi [[SLTu]], 1265 ; MIPS32: $v0 = COPY [[XORi]]266 ; MIPS32: RetRA implicit $v0267 %0:gprb(s32) = COPY $a0268 %1:gprb(s32) = COPY $a1269 %4:gprb(s32) = G_ICMP intpred(ule), %0(s32), %1270 %3:gprb(s32) = COPY %4(s32)271 $v0 = COPY %3(s32)272 RetRA implicit $v0273 274...275---276name: eq_ptr277alignment: 4278legalized: true279regBankSelected: true280tracksRegLiveness: true281body: |282 bb.1.entry:283 liveins: $a0, $a1284 285 ; MIPS32-LABEL: name: eq_ptr286 ; MIPS32: liveins: $a0, $a1287 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0288 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1289 ; MIPS32: [[XOR:%[0-9]+]]:gpr32 = XOR [[COPY]], [[COPY1]]290 ; MIPS32: [[SLTiu:%[0-9]+]]:gpr32 = SLTiu [[XOR]], 1291 ; MIPS32: $v0 = COPY [[SLTiu]]292 ; MIPS32: RetRA implicit $v0293 %0:gprb(p0) = COPY $a0294 %1:gprb(p0) = COPY $a1295 %4:gprb(s32) = G_ICMP intpred(eq), %0(p0), %1296 %3:gprb(s32) = COPY %4(s32)297 $v0 = COPY %3(s32)298 RetRA implicit $v0299 300...301