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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32FP323# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32FP644--- |5 6 define void @load_i32(ptr %ptr) {entry: ret void}7 define void @load_float(ptr %ptr) {entry: ret void}8 define void @load_double(ptr %ptr) {entry: ret void}9 10...11---12name: load_i3213alignment: 414legalized: true15regBankSelected: true16tracksRegLiveness: true17body: |18 bb.1.entry:19 liveins: $a020 21 ; MIPS32FP32-LABEL: name: load_i3222 ; MIPS32FP32: liveins: $a023 ; MIPS32FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a024 ; MIPS32FP32: [[LW:%[0-9]+]]:gpr32 = LW [[COPY]], 0 :: (load (s32) from %ir.ptr)25 ; MIPS32FP32: $v0 = COPY [[LW]]26 ; MIPS32FP32: RetRA implicit $v027 ; MIPS32FP64-LABEL: name: load_i3228 ; MIPS32FP64: liveins: $a029 ; MIPS32FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a030 ; MIPS32FP64: [[LW:%[0-9]+]]:gpr32 = LW [[COPY]], 0 :: (load (s32) from %ir.ptr)31 ; MIPS32FP64: $v0 = COPY [[LW]]32 ; MIPS32FP64: RetRA implicit $v033 %0:gprb(p0) = COPY $a034 %1:gprb(s32) = G_LOAD %0(p0) :: (load (s32) from %ir.ptr)35 $v0 = COPY %1(s32)36 RetRA implicit $v037 38...39---40name: load_float41alignment: 442legalized: true43regBankSelected: true44tracksRegLiveness: true45body: |46 bb.1.entry:47 liveins: $a048 49 ; MIPS32FP32-LABEL: name: load_float50 ; MIPS32FP32: liveins: $a051 ; MIPS32FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a052 ; MIPS32FP32: [[LWC1_:%[0-9]+]]:fgr32 = LWC1 [[COPY]], 0 :: (load (s32) from %ir.ptr)53 ; MIPS32FP32: $f0 = COPY [[LWC1_]]54 ; MIPS32FP32: RetRA implicit $f055 ; MIPS32FP64-LABEL: name: load_float56 ; MIPS32FP64: liveins: $a057 ; MIPS32FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a058 ; MIPS32FP64: [[LWC1_:%[0-9]+]]:fgr32 = LWC1 [[COPY]], 0 :: (load (s32) from %ir.ptr)59 ; MIPS32FP64: $f0 = COPY [[LWC1_]]60 ; MIPS32FP64: RetRA implicit $f061 %0:gprb(p0) = COPY $a062 %1:fprb(s32) = G_LOAD %0(p0) :: (load (s32) from %ir.ptr)63 $f0 = COPY %1(s32)64 RetRA implicit $f065 66...67---68name: load_double69alignment: 470legalized: true71regBankSelected: true72tracksRegLiveness: true73body: |74 bb.1.entry:75 liveins: $a076 77 ; MIPS32FP32-LABEL: name: load_double78 ; MIPS32FP32: liveins: $a079 ; MIPS32FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a080 ; MIPS32FP32: [[LDC1_:%[0-9]+]]:afgr64 = LDC1 [[COPY]], 0 :: (load (s64) from %ir.ptr)81 ; MIPS32FP32: $d0 = COPY [[LDC1_]]82 ; MIPS32FP32: RetRA implicit $d083 ; MIPS32FP64-LABEL: name: load_double84 ; MIPS32FP64: liveins: $a085 ; MIPS32FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a086 ; MIPS32FP64: [[LDC164_:%[0-9]+]]:fgr64 = LDC164 [[COPY]], 0 :: (load (s64) from %ir.ptr)87 ; MIPS32FP64: $d0 = COPY [[LDC164_]]88 ; MIPS32FP64: RetRA implicit $d089 %0:gprb(p0) = COPY $a090 %1:fprb(s64) = G_LOAD %0(p0) :: (load (s64) from %ir.ptr)91 $d0 = COPY %1(s64)92 RetRA implicit $d093 94...95