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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -mcpu=mips32r6 -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32R63--- |4 5 @float_align1 = common global float 0.000000e+00, align 16 @float_align8 = common global float 0.000000e+00, align 87 @i32_align2 = common global i32 0, align 28 9 define float @load_float_align1() {10 entry:11 %0 = load float, ptr @float_align1, align 112 ret float %013 }14 15 define float @load_float_align8() {16 entry:17 %0 = load float, ptr @float_align8, align 818 ret float %019 }20 21 define i32 @load_i32_align2() {22 entry:23 %0 = load i32, ptr @i32_align2, align 224 ret i32 %025 }26 27...28---29name: load_float_align130alignment: 431legalized: true32regBankSelected: true33tracksRegLiveness: true34body: |35 bb.1.entry:36 37 ; MIPS32R6-LABEL: name: load_float_align138 ; MIPS32R6: [[LUi:%[0-9]+]]:gpr32 = LUi target-flags(mips-abs-hi) @float_align139 ; MIPS32R6: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu [[LUi]], target-flags(mips-abs-lo) @float_align140 ; MIPS32R6: [[LWC1_:%[0-9]+]]:fgr32 = LWC1 [[ADDiu]], 0 :: (dereferenceable load (s32) from @float_align1, align 1)41 ; MIPS32R6: $f0 = COPY [[LWC1_]]42 ; MIPS32R6: RetRA implicit $f043 %1:gprb(p0) = G_GLOBAL_VALUE @float_align144 %0:fprb(s32) = G_LOAD %1(p0) :: (dereferenceable load (s32) from @float_align1, align 1)45 $f0 = COPY %0(s32)46 RetRA implicit $f047 48...49---50name: load_float_align851alignment: 452legalized: true53regBankSelected: true54tracksRegLiveness: true55body: |56 bb.1.entry:57 58 ; MIPS32R6-LABEL: name: load_float_align859 ; MIPS32R6: [[LUi:%[0-9]+]]:gpr32 = LUi target-flags(mips-abs-hi) @float_align860 ; MIPS32R6: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu [[LUi]], target-flags(mips-abs-lo) @float_align861 ; MIPS32R6: [[LWC1_:%[0-9]+]]:fgr32 = LWC1 [[ADDiu]], 0 :: (dereferenceable load (s32) from @float_align8, align 8)62 ; MIPS32R6: $f0 = COPY [[LWC1_]]63 ; MIPS32R6: RetRA implicit $f064 %1:gprb(p0) = G_GLOBAL_VALUE @float_align865 %0:fprb(s32) = G_LOAD %1(p0) :: (dereferenceable load (s32) from @float_align8, align 8)66 $f0 = COPY %0(s32)67 RetRA implicit $f068 69...70---71name: load_i32_align272alignment: 473legalized: true74regBankSelected: true75tracksRegLiveness: true76body: |77 bb.1.entry:78 79 ; MIPS32R6-LABEL: name: load_i32_align280 ; MIPS32R6: [[LUi:%[0-9]+]]:gpr32 = LUi target-flags(mips-abs-hi) @i32_align281 ; MIPS32R6: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu [[LUi]], target-flags(mips-abs-lo) @i32_align282 ; MIPS32R6: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (dereferenceable load (s32) from @i32_align2, align 2)83 ; MIPS32R6: $v0 = COPY [[LW]]84 ; MIPS32R6: RetRA implicit $v085 %1:gprb(p0) = G_GLOBAL_VALUE @i32_align286 %0:gprb(s32) = G_LOAD %1(p0) :: (dereferenceable load (s32) from @i32_align2, align 2)87 $v0 = COPY %0(s32)88 RetRA implicit $v089 90...91