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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS323--- |4 5  define void @_16_bit_positive_offset() {entry: ret void}6  define void @_16_bit_negative_offset() {entry: ret void}7  define void @_large_positive_offset() {entry: ret void}8  define void @_large_negative_offset() {entry: ret void}9  define void @fold_f32_load() {entry: ret void}10  define void @fold_f64_store() {entry: ret void}11  define void @fold_i16_load() {entry: ret void}12  define void @fold_i32_store() {entry: ret void}13 14...15---16name:            _16_bit_positive_offset17alignment:       418legalized:       true19regBankSelected: true20tracksRegLiveness: true21body:             |22  bb.1.entry:23    liveins: $a024 25    ; MIPS32-LABEL: name: _16_bit_positive_offset26    ; MIPS32: liveins: $a027    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a028    ; MIPS32: [[LBu:%[0-9]+]]:gpr32 = LBu [[COPY]], 32767 :: (load (s8))29    ; MIPS32: $v0 = COPY [[LBu]]30    ; MIPS32: RetRA implicit $v031    %0:gprb(p0) = COPY $a032    %1:gprb(s32) = G_CONSTANT i32 3276733    %2:gprb(p0) = G_PTR_ADD %0, %1(s32)34    %4:gprb(s32) = G_ZEXTLOAD %2(p0) :: (load (s8))35    $v0 = COPY %4(s32)36    RetRA implicit $v037 38...39---40name:            _16_bit_negative_offset41alignment:       442legalized:       true43regBankSelected: true44tracksRegLiveness: true45body:             |46  bb.1.entry:47    liveins: $a0, $a148 49    ; MIPS32-LABEL: name: _16_bit_negative_offset50    ; MIPS32: liveins: $a0, $a151    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a052    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a153    ; MIPS32: SB [[COPY]], [[COPY1]], -32768 :: (store (s8))54    ; MIPS32: RetRA55    %2:gprb(s32) = COPY $a056    %1:gprb(p0) = COPY $a157    %3:gprb(s32) = G_CONSTANT i32 -3276858    %4:gprb(p0) = G_PTR_ADD %1, %3(s32)59    %5:gprb(s32) = COPY %2(s32)60    G_STORE %5(s32), %4(p0) :: (store (s8))61    RetRA62 63...64---65name:            _large_positive_offset66alignment:       467legalized:       true68regBankSelected: true69tracksRegLiveness: true70body:             |71  bb.1.entry:72    liveins: $a0, $a173 74    ; MIPS32-LABEL: name: _large_positive_offset75    ; MIPS32: liveins: $a0, $a176    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a077    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a178    ; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi $zero, 3276879    ; MIPS32: [[ADDu:%[0-9]+]]:gpr32 = ADDu [[COPY1]], [[ORi]]80    ; MIPS32: SB [[COPY]], [[ADDu]], 0 :: (store (s8))81    ; MIPS32: RetRA82    %2:gprb(s32) = COPY $a083    %1:gprb(p0) = COPY $a184    %3:gprb(s32) = G_CONSTANT i32 3276885    %4:gprb(p0) = G_PTR_ADD %1, %3(s32)86    %5:gprb(s32) = COPY %2(s32)87    G_STORE %5(s32), %4(p0) :: (store (s8))88    RetRA89 90...91---92name:            _large_negative_offset93alignment:       494legalized:       true95regBankSelected: true96tracksRegLiveness: true97body:             |98  bb.1.entry:99    liveins: $a0100 101    ; MIPS32-LABEL: name: _large_negative_offset102    ; MIPS32: liveins: $a0103    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0104    ; MIPS32: [[LUi:%[0-9]+]]:gpr32 = LUi 65535105    ; MIPS32: [[ORi:%[0-9]+]]:gpr32 = ORi [[LUi]], 32767106    ; MIPS32: [[ADDu:%[0-9]+]]:gpr32 = ADDu [[COPY]], [[ORi]]107    ; MIPS32: [[LB:%[0-9]+]]:gpr32 = LB [[ADDu]], 0 :: (load (s8))108    ; MIPS32: $v0 = COPY [[LB]]109    ; MIPS32: RetRA implicit $v0110    %0:gprb(p0) = COPY $a0111    %1:gprb(s32) = G_CONSTANT i32 -32769112    %2:gprb(p0) = G_PTR_ADD %0, %1(s32)113    %4:gprb(s32) = G_SEXTLOAD %2(p0) :: (load (s8))114    $v0 = COPY %4(s32)115    RetRA implicit $v0116 117...118---119name:            fold_f32_load120alignment:       4121legalized:       true122regBankSelected: true123tracksRegLiveness: true124body:             |125  bb.1.entry:126    liveins: $a0127 128    ; MIPS32-LABEL: name: fold_f32_load129    ; MIPS32: liveins: $a0130    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0131    ; MIPS32: [[LWC1_:%[0-9]+]]:fgr32 = LWC1 [[COPY]], 40 :: (load (s32))132    ; MIPS32: $f0 = COPY [[LWC1_]]133    ; MIPS32: RetRA implicit $f0134    %0:gprb(p0) = COPY $a0135    %1:gprb(s32) = G_CONSTANT i32 40136    %2:gprb(p0) = G_PTR_ADD %0, %1(s32)137    %3:fprb(s32) = G_LOAD %2(p0) :: (load (s32))138    $f0 = COPY %3(s32)139    RetRA implicit $f0140 141...142---143name:            fold_f64_store144alignment:       4145legalized:       true146regBankSelected: true147tracksRegLiveness: true148body:             |149  bb.1.entry:150    liveins: $a2, $d6151 152    ; MIPS32-LABEL: name: fold_f64_store153    ; MIPS32: liveins: $a2, $d6154    ; MIPS32: [[COPY:%[0-9]+]]:afgr64 = COPY $d6155    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a2156    ; MIPS32: SDC1 [[COPY]], [[COPY1]], -80 :: (store (s64))157    ; MIPS32: RetRA158    %0:fprb(s64) = COPY $d6159    %1:gprb(p0) = COPY $a2160    %2:gprb(s32) = G_CONSTANT i32 -80161    %3:gprb(p0) = G_PTR_ADD %1, %2(s32)162    G_STORE %0(s64), %3(p0) :: (store (s64))163    RetRA164 165...166---167name:            fold_i16_load168alignment:       4169legalized:       true170regBankSelected: true171tracksRegLiveness: true172body:             |173  bb.1.entry:174    liveins: $a0175 176    ; MIPS32-LABEL: name: fold_i16_load177    ; MIPS32: liveins: $a0178    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0179    ; MIPS32: [[LHu:%[0-9]+]]:gpr32 = LHu [[COPY]], -20 :: (load (s16))180    ; MIPS32: $v0 = COPY [[LHu]]181    ; MIPS32: RetRA implicit $v0182    %0:gprb(p0) = COPY $a0183    %1:gprb(s32) = G_CONSTANT i32 -20184    %2:gprb(p0) = G_PTR_ADD %0, %1(s32)185    %4:gprb(s32) = G_LOAD %2(p0) :: (load (s16))186    $v0 = COPY %4(s32)187    RetRA implicit $v0188 189...190---191name:            fold_i32_store192alignment:       4193legalized:       true194regBankSelected: true195tracksRegLiveness: true196body:             |197  bb.1.entry:198    liveins: $a0, $a1199 200    ; MIPS32-LABEL: name: fold_i32_store201    ; MIPS32: liveins: $a0, $a1202    ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a0203    ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1204    ; MIPS32: SW [[COPY]], [[COPY1]], 40 :: (store (s32))205    ; MIPS32: RetRA206    %0:gprb(s32) = COPY $a0207    %1:gprb(p0) = COPY $a1208    %2:gprb(s32) = G_CONSTANT i32 40209    %3:gprb(p0) = G_PTR_ADD %1, %2(s32)210    G_STORE %0(s32), %3(p0) :: (store (s32))211    RetRA212 213...214 215