157 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mcpu=mips32r5 -mattr=msa,+fp64 -mattr=nan2008 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=P56003--- |4 5 define void @load_store_v16i8(ptr %a, ptr %b) { entry: ret void }6 define void @load_store_v8i16(ptr %a, ptr %b) { entry: ret void }7 define void @load_store_v4i32(ptr %a, ptr %b) { entry: ret void }8 define void @load_store_v2i64(ptr %a, ptr %b) { entry: ret void }9 define void @load_store_v4f32(ptr %a, ptr %b) { entry: ret void }10 define void @load_store_v2f64(ptr %a, ptr %b) { entry: ret void }11 12...13---14name: load_store_v16i815alignment: 416legalized: true17regBankSelected: true18tracksRegLiveness: true19body: |20 bb.1.entry:21 liveins: $a0, $a122 23 ; P5600-LABEL: name: load_store_v16i824 ; P5600: liveins: $a0, $a125 ; P5600: [[COPY:%[0-9]+]]:gpr32 = COPY $a026 ; P5600: [[COPY1:%[0-9]+]]:gpr32 = COPY $a127 ; P5600: [[LD_B:%[0-9]+]]:msa128b = LD_B [[COPY1]], 0 :: (load (<16 x s8>) from %ir.b)28 ; P5600: ST_B [[LD_B]], [[COPY]], 0 :: (store (<16 x s8>) into %ir.a)29 ; P5600: RetRA30 %0:gprb(p0) = COPY $a031 %1:gprb(p0) = COPY $a132 %2:fprb(<16 x s8>) = G_LOAD %1(p0) :: (load (<16 x s8>) from %ir.b)33 G_STORE %2(<16 x s8>), %0(p0) :: (store (<16 x s8>) into %ir.a)34 RetRA35 36...37---38name: load_store_v8i1639alignment: 440legalized: true41regBankSelected: true42tracksRegLiveness: true43body: |44 bb.1.entry:45 liveins: $a0, $a146 47 ; P5600-LABEL: name: load_store_v8i1648 ; P5600: liveins: $a0, $a149 ; P5600: [[COPY:%[0-9]+]]:gpr32 = COPY $a050 ; P5600: [[COPY1:%[0-9]+]]:gpr32 = COPY $a151 ; P5600: [[LD_H:%[0-9]+]]:msa128h = LD_H [[COPY1]], 0 :: (load (<8 x s16>) from %ir.b)52 ; P5600: ST_H [[LD_H]], [[COPY]], 0 :: (store (<8 x s16>) into %ir.a)53 ; P5600: RetRA54 %0:gprb(p0) = COPY $a055 %1:gprb(p0) = COPY $a156 %2:fprb(<8 x s16>) = G_LOAD %1(p0) :: (load (<8 x s16>) from %ir.b)57 G_STORE %2(<8 x s16>), %0(p0) :: (store (<8 x s16>) into %ir.a)58 RetRA59 60...61---62name: load_store_v4i3263alignment: 464legalized: true65regBankSelected: true66tracksRegLiveness: true67body: |68 bb.1.entry:69 liveins: $a0, $a170 71 ; P5600-LABEL: name: load_store_v4i3272 ; P5600: liveins: $a0, $a173 ; P5600: [[COPY:%[0-9]+]]:gpr32 = COPY $a074 ; P5600: [[COPY1:%[0-9]+]]:gpr32 = COPY $a175 ; P5600: [[LD_W:%[0-9]+]]:msa128w = LD_W [[COPY1]], 0 :: (load (<4 x s32>) from %ir.b)76 ; P5600: ST_W [[LD_W]], [[COPY]], 0 :: (store (<4 x s32>) into %ir.a)77 ; P5600: RetRA78 %0:gprb(p0) = COPY $a079 %1:gprb(p0) = COPY $a180 %2:fprb(<4 x s32>) = G_LOAD %1(p0) :: (load (<4 x s32>) from %ir.b)81 G_STORE %2(<4 x s32>), %0(p0) :: (store (<4 x s32>) into %ir.a)82 RetRA83 84...85---86name: load_store_v2i6487alignment: 488legalized: true89regBankSelected: true90tracksRegLiveness: true91body: |92 bb.1.entry:93 liveins: $a0, $a194 95 ; P5600-LABEL: name: load_store_v2i6496 ; P5600: liveins: $a0, $a197 ; P5600: [[COPY:%[0-9]+]]:gpr32 = COPY $a098 ; P5600: [[COPY1:%[0-9]+]]:gpr32 = COPY $a199 ; P5600: [[LD_D:%[0-9]+]]:msa128d = LD_D [[COPY1]], 0 :: (load (<2 x s64>) from %ir.b)100 ; P5600: ST_D [[LD_D]], [[COPY]], 0 :: (store (<2 x s64>) into %ir.a)101 ; P5600: RetRA102 %0:gprb(p0) = COPY $a0103 %1:gprb(p0) = COPY $a1104 %2:fprb(<2 x s64>) = G_LOAD %1(p0) :: (load (<2 x s64>) from %ir.b)105 G_STORE %2(<2 x s64>), %0(p0) :: (store (<2 x s64>) into %ir.a)106 RetRA107 108...109---110name: load_store_v4f32111alignment: 4112legalized: true113regBankSelected: true114tracksRegLiveness: true115body: |116 bb.1.entry:117 liveins: $a0, $a1118 119 ; P5600-LABEL: name: load_store_v4f32120 ; P5600: liveins: $a0, $a1121 ; P5600: [[COPY:%[0-9]+]]:gpr32 = COPY $a0122 ; P5600: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1123 ; P5600: [[LD_W:%[0-9]+]]:msa128w = LD_W [[COPY1]], 0 :: (load (<4 x s32>) from %ir.b)124 ; P5600: ST_W [[LD_W]], [[COPY]], 0 :: (store (<4 x s32>) into %ir.a)125 ; P5600: RetRA126 %0:gprb(p0) = COPY $a0127 %1:gprb(p0) = COPY $a1128 %2:fprb(<4 x s32>) = G_LOAD %1(p0) :: (load (<4 x s32>) from %ir.b)129 G_STORE %2(<4 x s32>), %0(p0) :: (store (<4 x s32>) into %ir.a)130 RetRA131 132...133---134name: load_store_v2f64135alignment: 4136legalized: true137regBankSelected: true138tracksRegLiveness: true139body: |140 bb.1.entry:141 liveins: $a0, $a1142 143 ; P5600-LABEL: name: load_store_v2f64144 ; P5600: liveins: $a0, $a1145 ; P5600: [[COPY:%[0-9]+]]:gpr32 = COPY $a0146 ; P5600: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1147 ; P5600: [[LD_D:%[0-9]+]]:msa128d = LD_D [[COPY1]], 0 :: (load (<2 x s64>) from %ir.b)148 ; P5600: ST_D [[LD_D]], [[COPY]], 0 :: (store (<2 x s64>) into %ir.a)149 ; P5600: RetRA150 %0:gprb(p0) = COPY $a0151 %1:gprb(p0) = COPY $a1152 %2:fprb(<2 x s64>) = G_LOAD %1(p0) :: (load (<2 x s64>) from %ir.b)153 G_STORE %2(<2 x s64>), %0(p0) :: (store (<2 x s64>) into %ir.a)154 RetRA155 156...157