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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32FP323# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32FP644--- |5 6 define i32 @phi_i32(i1 %cnd, i32 %a, i32 %b) {7 entry:8 br i1 %cnd, label %cond.true, label %cond.false9 10 cond.true: ; preds = %entry11 br label %cond.end12 13 cond.false: ; preds = %entry14 br label %cond.end15 16 cond.end: ; preds = %cond.false, %cond.true17 %cond = phi i32 [ %a, %cond.true ], [ %b, %cond.false ]18 ret i32 %cond19 }20 21 define i64 @phi_i64(i1 %cnd, i64 %a, i64 %b) {22 entry:23 br i1 %cnd, label %cond.true, label %cond.false24 25 cond.true: ; preds = %entry26 br label %cond.end27 28 cond.false: ; preds = %entry29 br label %cond.end30 31 cond.end: ; preds = %cond.false, %cond.true32 %cond = phi i64 [ %a, %cond.true ], [ %b, %cond.false ]33 ret i64 %cond34 }35 36 define float @phi_float(i1 %cnd, float %a, float %b) {37 entry:38 br i1 %cnd, label %cond.true, label %cond.false39 40 cond.true: ; preds = %entry41 br label %cond.end42 43 cond.false: ; preds = %entry44 br label %cond.end45 46 cond.end: ; preds = %cond.false, %cond.true47 %cond = phi float [ %a, %cond.true ], [ %b, %cond.false ]48 ret float %cond49 }50 51 define double @phi_double(double %a, double %b, i1 %cnd) {52 entry:53 br i1 %cnd, label %cond.true, label %cond.false54 55 cond.true: ; preds = %entry56 br label %cond.end57 58 cond.false: ; preds = %entry59 br label %cond.end60 61 cond.end: ; preds = %cond.false, %cond.true62 %cond = phi double [ %a, %cond.true ], [ %b, %cond.false ]63 ret double %cond64 }65 66...67---68name: phi_i3269alignment: 470legalized: true71regBankSelected: true72tracksRegLiveness: true73body: |74 ; MIPS32FP32-LABEL: name: phi_i3275 ; MIPS32FP32: bb.0.entry:76 ; MIPS32FP32-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)77 ; MIPS32FP32-NEXT: liveins: $a0, $a1, $a278 ; MIPS32FP32-NEXT: {{ $}}79 ; MIPS32FP32-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $a080 ; MIPS32FP32-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $a181 ; MIPS32FP32-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $a282 ; MIPS32FP32-NEXT: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 183 ; MIPS32FP32-NEXT: BNE [[ANDi]], $zero, %bb.1, implicit-def dead $at84 ; MIPS32FP32-NEXT: J %bb.2, implicit-def dead $at85 ; MIPS32FP32-NEXT: {{ $}}86 ; MIPS32FP32-NEXT: bb.1.cond.true:87 ; MIPS32FP32-NEXT: successors: %bb.3(0x80000000)88 ; MIPS32FP32-NEXT: {{ $}}89 ; MIPS32FP32-NEXT: J %bb.3, implicit-def dead $at90 ; MIPS32FP32-NEXT: {{ $}}91 ; MIPS32FP32-NEXT: bb.2.cond.false:92 ; MIPS32FP32-NEXT: successors: %bb.3(0x80000000)93 ; MIPS32FP32-NEXT: {{ $}}94 ; MIPS32FP32-NEXT: bb.3.cond.end:95 ; MIPS32FP32-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.1, [[COPY2]], %bb.296 ; MIPS32FP32-NEXT: $v0 = COPY [[PHI]]97 ; MIPS32FP32-NEXT: RetRA implicit $v098 ;99 ; MIPS32FP64-LABEL: name: phi_i32100 ; MIPS32FP64: bb.0.entry:101 ; MIPS32FP64-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)102 ; MIPS32FP64-NEXT: liveins: $a0, $a1, $a2103 ; MIPS32FP64-NEXT: {{ $}}104 ; MIPS32FP64-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $a0105 ; MIPS32FP64-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1106 ; MIPS32FP64-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2107 ; MIPS32FP64-NEXT: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 1108 ; MIPS32FP64-NEXT: BNE [[ANDi]], $zero, %bb.1, implicit-def dead $at109 ; MIPS32FP64-NEXT: J %bb.2, implicit-def dead $at110 ; MIPS32FP64-NEXT: {{ $}}111 ; MIPS32FP64-NEXT: bb.1.cond.true:112 ; MIPS32FP64-NEXT: successors: %bb.3(0x80000000)113 ; MIPS32FP64-NEXT: {{ $}}114 ; MIPS32FP64-NEXT: J %bb.3, implicit-def dead $at115 ; MIPS32FP64-NEXT: {{ $}}116 ; MIPS32FP64-NEXT: bb.2.cond.false:117 ; MIPS32FP64-NEXT: successors: %bb.3(0x80000000)118 ; MIPS32FP64-NEXT: {{ $}}119 ; MIPS32FP64-NEXT: bb.3.cond.end:120 ; MIPS32FP64-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.1, [[COPY2]], %bb.2121 ; MIPS32FP64-NEXT: $v0 = COPY [[PHI]]122 ; MIPS32FP64-NEXT: RetRA implicit $v0123 bb.1.entry:124 liveins: $a0, $a1, $a2125 126 %3:gprb(s32) = COPY $a0127 %1:gprb(s32) = COPY $a1128 %2:gprb(s32) = COPY $a2129 %6:gprb(s32) = G_CONSTANT i32 1130 %7:gprb(s32) = COPY %3(s32)131 %5:gprb(s32) = G_AND %7, %6132 G_BRCOND %5(s32), %bb.2133 G_BR %bb.3134 135 bb.2.cond.true:136 G_BR %bb.4137 138 bb.3.cond.false:139 140 bb.4.cond.end:141 %4:gprb(s32) = G_PHI %1(s32), %bb.2, %2(s32), %bb.3142 $v0 = COPY %4(s32)143 RetRA implicit $v0144 145...146---147name: phi_i64148alignment: 4149legalized: true150regBankSelected: true151tracksRegLiveness: true152fixedStack:153 - { id: 0, offset: 20, size: 4, alignment: 4, isImmutable: true }154 - { id: 1, offset: 16, size: 4, alignment: 8, isImmutable: true }155body: |156 ; MIPS32FP32-LABEL: name: phi_i64157 ; MIPS32FP32: bb.0.entry:158 ; MIPS32FP32-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)159 ; MIPS32FP32-NEXT: liveins: $a0, $a2, $a3160 ; MIPS32FP32-NEXT: {{ $}}161 ; MIPS32FP32-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $a0162 ; MIPS32FP32-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $a2163 ; MIPS32FP32-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $a3164 ; MIPS32FP32-NEXT: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu %fixed-stack.0, 0165 ; MIPS32FP32-NEXT: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (load (s32) from %fixed-stack.0, align 8)166 ; MIPS32FP32-NEXT: [[ADDiu1:%[0-9]+]]:gpr32 = ADDiu %fixed-stack.1, 0167 ; MIPS32FP32-NEXT: [[LW1:%[0-9]+]]:gpr32 = LW [[ADDiu1]], 0 :: (load (s32) from %fixed-stack.1)168 ; MIPS32FP32-NEXT: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 1169 ; MIPS32FP32-NEXT: BNE [[ANDi]], $zero, %bb.1, implicit-def dead $at170 ; MIPS32FP32-NEXT: J %bb.2, implicit-def dead $at171 ; MIPS32FP32-NEXT: {{ $}}172 ; MIPS32FP32-NEXT: bb.1.cond.true:173 ; MIPS32FP32-NEXT: successors: %bb.3(0x80000000)174 ; MIPS32FP32-NEXT: {{ $}}175 ; MIPS32FP32-NEXT: J %bb.3, implicit-def dead $at176 ; MIPS32FP32-NEXT: {{ $}}177 ; MIPS32FP32-NEXT: bb.2.cond.false:178 ; MIPS32FP32-NEXT: successors: %bb.3(0x80000000)179 ; MIPS32FP32-NEXT: {{ $}}180 ; MIPS32FP32-NEXT: bb.3.cond.end:181 ; MIPS32FP32-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.1, [[LW]], %bb.2182 ; MIPS32FP32-NEXT: [[PHI1:%[0-9]+]]:gpr32 = PHI [[COPY2]], %bb.1, [[LW1]], %bb.2183 ; MIPS32FP32-NEXT: $v0 = COPY [[PHI]]184 ; MIPS32FP32-NEXT: $v1 = COPY [[PHI1]]185 ; MIPS32FP32-NEXT: RetRA implicit $v0, implicit $v1186 ;187 ; MIPS32FP64-LABEL: name: phi_i64188 ; MIPS32FP64: bb.0.entry:189 ; MIPS32FP64-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)190 ; MIPS32FP64-NEXT: liveins: $a0, $a2, $a3191 ; MIPS32FP64-NEXT: {{ $}}192 ; MIPS32FP64-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $a0193 ; MIPS32FP64-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $a2194 ; MIPS32FP64-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $a3195 ; MIPS32FP64-NEXT: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu %fixed-stack.0, 0196 ; MIPS32FP64-NEXT: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (load (s32) from %fixed-stack.0, align 8)197 ; MIPS32FP64-NEXT: [[ADDiu1:%[0-9]+]]:gpr32 = ADDiu %fixed-stack.1, 0198 ; MIPS32FP64-NEXT: [[LW1:%[0-9]+]]:gpr32 = LW [[ADDiu1]], 0 :: (load (s32) from %fixed-stack.1)199 ; MIPS32FP64-NEXT: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 1200 ; MIPS32FP64-NEXT: BNE [[ANDi]], $zero, %bb.1, implicit-def dead $at201 ; MIPS32FP64-NEXT: J %bb.2, implicit-def dead $at202 ; MIPS32FP64-NEXT: {{ $}}203 ; MIPS32FP64-NEXT: bb.1.cond.true:204 ; MIPS32FP64-NEXT: successors: %bb.3(0x80000000)205 ; MIPS32FP64-NEXT: {{ $}}206 ; MIPS32FP64-NEXT: J %bb.3, implicit-def dead $at207 ; MIPS32FP64-NEXT: {{ $}}208 ; MIPS32FP64-NEXT: bb.2.cond.false:209 ; MIPS32FP64-NEXT: successors: %bb.3(0x80000000)210 ; MIPS32FP64-NEXT: {{ $}}211 ; MIPS32FP64-NEXT: bb.3.cond.end:212 ; MIPS32FP64-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.1, [[LW]], %bb.2213 ; MIPS32FP64-NEXT: [[PHI1:%[0-9]+]]:gpr32 = PHI [[COPY2]], %bb.1, [[LW1]], %bb.2214 ; MIPS32FP64-NEXT: $v0 = COPY [[PHI]]215 ; MIPS32FP64-NEXT: $v1 = COPY [[PHI1]]216 ; MIPS32FP64-NEXT: RetRA implicit $v0, implicit $v1217 bb.1.entry:218 liveins: $a0, $a2, $a3219 220 %3:gprb(s32) = COPY $a0221 %4:gprb(s32) = COPY $a2222 %5:gprb(s32) = COPY $a3223 %8:gprb(p0) = G_FRAME_INDEX %fixed-stack.1224 %6:gprb(s32) = G_LOAD %8(p0) :: (load (s32) from %fixed-stack.1, align 8)225 %9:gprb(p0) = G_FRAME_INDEX %fixed-stack.0226 %7:gprb(s32) = G_LOAD %9(p0) :: (load (s32) from %fixed-stack.0)227 %14:gprb(s32) = G_CONSTANT i32 1228 %15:gprb(s32) = COPY %3(s32)229 %13:gprb(s32) = G_AND %15, %14230 G_BRCOND %13(s32), %bb.2231 G_BR %bb.3232 233 bb.2.cond.true:234 G_BR %bb.4235 236 bb.3.cond.false:237 238 bb.4.cond.end:239 %20:gprb(s32) = G_PHI %4(s32), %bb.2, %6(s32), %bb.3240 %21:gprb(s32) = G_PHI %5(s32), %bb.2, %7(s32), %bb.3241 $v0 = COPY %20(s32)242 $v1 = COPY %21(s32)243 RetRA implicit $v0, implicit $v1244 245...246---247name: phi_float248alignment: 4249legalized: true250regBankSelected: true251tracksRegLiveness: true252body: |253 ; MIPS32FP32-LABEL: name: phi_float254 ; MIPS32FP32: bb.0.entry:255 ; MIPS32FP32-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)256 ; MIPS32FP32-NEXT: liveins: $a0, $a1, $a2257 ; MIPS32FP32-NEXT: {{ $}}258 ; MIPS32FP32-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $a0259 ; MIPS32FP32-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1260 ; MIPS32FP32-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2261 ; MIPS32FP32-NEXT: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 1262 ; MIPS32FP32-NEXT: BNE [[ANDi]], $zero, %bb.1, implicit-def dead $at263 ; MIPS32FP32-NEXT: J %bb.2, implicit-def dead $at264 ; MIPS32FP32-NEXT: {{ $}}265 ; MIPS32FP32-NEXT: bb.1.cond.true:266 ; MIPS32FP32-NEXT: successors: %bb.3(0x80000000)267 ; MIPS32FP32-NEXT: {{ $}}268 ; MIPS32FP32-NEXT: J %bb.3, implicit-def dead $at269 ; MIPS32FP32-NEXT: {{ $}}270 ; MIPS32FP32-NEXT: bb.2.cond.false:271 ; MIPS32FP32-NEXT: successors: %bb.3(0x80000000)272 ; MIPS32FP32-NEXT: {{ $}}273 ; MIPS32FP32-NEXT: bb.3.cond.end:274 ; MIPS32FP32-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.1, [[COPY2]], %bb.2275 ; MIPS32FP32-NEXT: $f0 = COPY [[PHI]]276 ; MIPS32FP32-NEXT: RetRA implicit $f0277 ;278 ; MIPS32FP64-LABEL: name: phi_float279 ; MIPS32FP64: bb.0.entry:280 ; MIPS32FP64-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)281 ; MIPS32FP64-NEXT: liveins: $a0, $a1, $a2282 ; MIPS32FP64-NEXT: {{ $}}283 ; MIPS32FP64-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY $a0284 ; MIPS32FP64-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1285 ; MIPS32FP64-NEXT: [[COPY2:%[0-9]+]]:gpr32 = COPY $a2286 ; MIPS32FP64-NEXT: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[COPY]], 1287 ; MIPS32FP64-NEXT: BNE [[ANDi]], $zero, %bb.1, implicit-def dead $at288 ; MIPS32FP64-NEXT: J %bb.2, implicit-def dead $at289 ; MIPS32FP64-NEXT: {{ $}}290 ; MIPS32FP64-NEXT: bb.1.cond.true:291 ; MIPS32FP64-NEXT: successors: %bb.3(0x80000000)292 ; MIPS32FP64-NEXT: {{ $}}293 ; MIPS32FP64-NEXT: J %bb.3, implicit-def dead $at294 ; MIPS32FP64-NEXT: {{ $}}295 ; MIPS32FP64-NEXT: bb.2.cond.false:296 ; MIPS32FP64-NEXT: successors: %bb.3(0x80000000)297 ; MIPS32FP64-NEXT: {{ $}}298 ; MIPS32FP64-NEXT: bb.3.cond.end:299 ; MIPS32FP64-NEXT: [[PHI:%[0-9]+]]:gpr32 = PHI [[COPY1]], %bb.1, [[COPY2]], %bb.2300 ; MIPS32FP64-NEXT: $f0 = COPY [[PHI]]301 ; MIPS32FP64-NEXT: RetRA implicit $f0302 bb.1.entry:303 liveins: $a0, $a1, $a2304 305 %3:gprb(s32) = COPY $a0306 %1:gprb(s32) = COPY $a1307 %2:gprb(s32) = COPY $a2308 %6:gprb(s32) = G_CONSTANT i32 1309 %7:gprb(s32) = COPY %3(s32)310 %5:gprb(s32) = G_AND %7, %6311 G_BRCOND %5(s32), %bb.2312 G_BR %bb.3313 314 bb.2.cond.true:315 G_BR %bb.4316 317 bb.3.cond.false:318 319 bb.4.cond.end:320 %4:gprb(s32) = G_PHI %1(s32), %bb.2, %2(s32), %bb.3321 $f0 = COPY %4(s32)322 RetRA implicit $f0323 324...325---326name: phi_double327alignment: 4328legalized: true329regBankSelected: true330tracksRegLiveness: true331fixedStack:332 - { id: 0, offset: 16, size: 4, alignment: 8, isImmutable: true }333body: |334 ; MIPS32FP32-LABEL: name: phi_double335 ; MIPS32FP32: bb.0.entry:336 ; MIPS32FP32-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)337 ; MIPS32FP32-NEXT: liveins: $d6, $d7338 ; MIPS32FP32-NEXT: {{ $}}339 ; MIPS32FP32-NEXT: [[COPY:%[0-9]+]]:afgr64 = COPY $d6340 ; MIPS32FP32-NEXT: [[COPY1:%[0-9]+]]:afgr64 = COPY $d7341 ; MIPS32FP32-NEXT: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu %fixed-stack.0, 0342 ; MIPS32FP32-NEXT: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (load (s32) from %fixed-stack.0, align 8)343 ; MIPS32FP32-NEXT: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[LW]], 1344 ; MIPS32FP32-NEXT: BNE [[ANDi]], $zero, %bb.1, implicit-def dead $at345 ; MIPS32FP32-NEXT: J %bb.2, implicit-def dead $at346 ; MIPS32FP32-NEXT: {{ $}}347 ; MIPS32FP32-NEXT: bb.1.cond.true:348 ; MIPS32FP32-NEXT: successors: %bb.3(0x80000000)349 ; MIPS32FP32-NEXT: {{ $}}350 ; MIPS32FP32-NEXT: J %bb.3, implicit-def dead $at351 ; MIPS32FP32-NEXT: {{ $}}352 ; MIPS32FP32-NEXT: bb.2.cond.false:353 ; MIPS32FP32-NEXT: successors: %bb.3(0x80000000)354 ; MIPS32FP32-NEXT: {{ $}}355 ; MIPS32FP32-NEXT: bb.3.cond.end:356 ; MIPS32FP32-NEXT: [[PHI:%[0-9]+]]:afgr64 = PHI [[COPY]], %bb.1, [[COPY1]], %bb.2357 ; MIPS32FP32-NEXT: $d0 = COPY [[PHI]]358 ; MIPS32FP32-NEXT: RetRA implicit $d0359 ;360 ; MIPS32FP64-LABEL: name: phi_double361 ; MIPS32FP64: bb.0.entry:362 ; MIPS32FP64-NEXT: successors: %bb.1(0x40000000), %bb.2(0x40000000)363 ; MIPS32FP64-NEXT: liveins: $d6, $d7364 ; MIPS32FP64-NEXT: {{ $}}365 ; MIPS32FP64-NEXT: [[COPY:%[0-9]+]]:fgr64 = COPY $d6366 ; MIPS32FP64-NEXT: [[COPY1:%[0-9]+]]:fgr64 = COPY $d7367 ; MIPS32FP64-NEXT: [[ADDiu:%[0-9]+]]:gpr32 = ADDiu %fixed-stack.0, 0368 ; MIPS32FP64-NEXT: [[LW:%[0-9]+]]:gpr32 = LW [[ADDiu]], 0 :: (load (s32) from %fixed-stack.0, align 8)369 ; MIPS32FP64-NEXT: [[ANDi:%[0-9]+]]:gpr32 = ANDi [[LW]], 1370 ; MIPS32FP64-NEXT: BNE [[ANDi]], $zero, %bb.1, implicit-def dead $at371 ; MIPS32FP64-NEXT: J %bb.2, implicit-def dead $at372 ; MIPS32FP64-NEXT: {{ $}}373 ; MIPS32FP64-NEXT: bb.1.cond.true:374 ; MIPS32FP64-NEXT: successors: %bb.3(0x80000000)375 ; MIPS32FP64-NEXT: {{ $}}376 ; MIPS32FP64-NEXT: J %bb.3, implicit-def dead $at377 ; MIPS32FP64-NEXT: {{ $}}378 ; MIPS32FP64-NEXT: bb.2.cond.false:379 ; MIPS32FP64-NEXT: successors: %bb.3(0x80000000)380 ; MIPS32FP64-NEXT: {{ $}}381 ; MIPS32FP64-NEXT: bb.3.cond.end:382 ; MIPS32FP64-NEXT: [[PHI:%[0-9]+]]:fgr64 = PHI [[COPY]], %bb.1, [[COPY1]], %bb.2383 ; MIPS32FP64-NEXT: $d0 = COPY [[PHI]]384 ; MIPS32FP64-NEXT: RetRA implicit $d0385 bb.1.entry:386 liveins: $d6, $d7387 388 %0:fprb(s64) = COPY $d6389 %1:fprb(s64) = COPY $d7390 %4:gprb(p0) = G_FRAME_INDEX %fixed-stack.0391 %3:gprb(s32) = G_LOAD %4(p0) :: (load (s32) from %fixed-stack.0, align 8)392 %7:gprb(s32) = G_CONSTANT i32 1393 %8:gprb(s32) = COPY %3(s32)394 %6:gprb(s32) = G_AND %8, %7395 G_BRCOND %6(s32), %bb.2396 G_BR %bb.3397 398 bb.2.cond.true:399 G_BR %bb.4400 401 bb.3.cond.false:402 403 bb.4.cond.end:404 %5:fprb(s64) = G_PHI %0(s64), %bb.2, %1(s64), %bb.3405 $d0 = COPY %5(s64)406 RetRA implicit $d0407 408...409