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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS323--- |4 5 define void @sdiv_i32() {entry: ret void}6 define void @srem_i32() {entry: ret void}7 define void @udiv_i32() {entry: ret void}8 define void @urem_i32() {entry: ret void}9 10...11---12name: sdiv_i3213alignment: 414legalized: true15regBankSelected: true16tracksRegLiveness: true17body: |18 bb.1.entry:19 liveins: $a0, $a120 21 ; MIPS32-LABEL: name: sdiv_i3222 ; MIPS32: liveins: $a0, $a123 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a024 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a125 ; MIPS32: [[PseudoSDIV:%[0-9]+]]:acc64 = PseudoSDIV [[COPY1]], [[COPY]]26 ; MIPS32: [[PseudoMFLO:%[0-9]+]]:gpr32 = PseudoMFLO [[PseudoSDIV]]27 ; MIPS32: $v0 = COPY [[PseudoMFLO]]28 ; MIPS32: RetRA implicit $v029 %0:gprb(s32) = COPY $a030 %1:gprb(s32) = COPY $a131 %2:gprb(s32) = G_SDIV %1, %032 $v0 = COPY %2(s32)33 RetRA implicit $v034 35...36---37name: srem_i3238alignment: 439legalized: true40regBankSelected: true41tracksRegLiveness: true42body: |43 bb.1.entry:44 liveins: $a0, $a145 46 ; MIPS32-LABEL: name: srem_i3247 ; MIPS32: liveins: $a0, $a148 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a049 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a150 ; MIPS32: [[PseudoSDIV:%[0-9]+]]:acc64 = PseudoSDIV [[COPY1]], [[COPY]]51 ; MIPS32: [[PseudoMFHI:%[0-9]+]]:gpr32 = PseudoMFHI [[PseudoSDIV]]52 ; MIPS32: $v0 = COPY [[PseudoMFHI]]53 ; MIPS32: RetRA implicit $v054 %0:gprb(s32) = COPY $a055 %1:gprb(s32) = COPY $a156 %2:gprb(s32) = G_SREM %1, %057 $v0 = COPY %2(s32)58 RetRA implicit $v059 60...61---62name: udiv_i3263alignment: 464legalized: true65regBankSelected: true66tracksRegLiveness: true67body: |68 bb.1.entry:69 liveins: $a0, $a170 71 ; MIPS32-LABEL: name: udiv_i3272 ; MIPS32: liveins: $a0, $a173 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a074 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a175 ; MIPS32: [[PseudoUDIV:%[0-9]+]]:acc64 = PseudoUDIV [[COPY1]], [[COPY]]76 ; MIPS32: [[PseudoMFLO:%[0-9]+]]:gpr32 = PseudoMFLO [[PseudoUDIV]]77 ; MIPS32: $v0 = COPY [[PseudoMFLO]]78 ; MIPS32: RetRA implicit $v079 %0:gprb(s32) = COPY $a080 %1:gprb(s32) = COPY $a181 %2:gprb(s32) = G_UDIV %1, %082 $v0 = COPY %2(s32)83 RetRA implicit $v084 85...86---87name: urem_i3288alignment: 489legalized: true90regBankSelected: true91tracksRegLiveness: true92body: |93 bb.1.entry:94 liveins: $a0, $a195 96 ; MIPS32-LABEL: name: urem_i3297 ; MIPS32: liveins: $a0, $a198 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a099 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a1100 ; MIPS32: [[PseudoUDIV:%[0-9]+]]:acc64 = PseudoUDIV [[COPY1]], [[COPY]]101 ; MIPS32: [[PseudoMFHI:%[0-9]+]]:gpr32 = PseudoMFHI [[PseudoUDIV]]102 ; MIPS32: $v0 = COPY [[PseudoMFHI]]103 ; MIPS32: RetRA implicit $v0104 %0:gprb(s32) = COPY $a0105 %1:gprb(s32) = COPY $a1106 %2:gprb(s32) = G_UREM %1, %0107 $v0 = COPY %2(s32)108 RetRA implicit $v0109 110...111