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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32FP323# RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS32FP644--- |5 6  define void @store_i32(ptr %ptr) { entry: ret void }7  define void @store_float(ptr %ptr) { entry: ret void }8  define void @store_double(ptr %ptr) { entry: ret void }9 10...11---12name:            store_i3213alignment:       414legalized:       true15regBankSelected: true16tracksRegLiveness: true17body:             |18  bb.1.entry:19    liveins: $a0, $a120 21    ; MIPS32FP32-LABEL: name: store_i3222    ; MIPS32FP32: liveins: $a0, $a123    ; MIPS32FP32: [[COPY:%[0-9]+]]:gpr32 = COPY $a024    ; MIPS32FP32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a125    ; MIPS32FP32: SW [[COPY]], [[COPY1]], 0 :: (store (s32) into %ir.ptr)26    ; MIPS32FP32: RetRA27    ; MIPS32FP64-LABEL: name: store_i3228    ; MIPS32FP64: liveins: $a0, $a129    ; MIPS32FP64: [[COPY:%[0-9]+]]:gpr32 = COPY $a030    ; MIPS32FP64: [[COPY1:%[0-9]+]]:gpr32 = COPY $a131    ; MIPS32FP64: SW [[COPY]], [[COPY1]], 0 :: (store (s32) into %ir.ptr)32    ; MIPS32FP64: RetRA33    %0:gprb(s32) = COPY $a034    %1:gprb(p0) = COPY $a135    G_STORE %0(s32), %1(p0) :: (store (s32) into %ir.ptr)36    RetRA37 38...39---40name:            store_float41alignment:       442legalized:       true43regBankSelected: true44tracksRegLiveness: true45body:             |46  bb.1.entry:47    liveins: $a1, $f1248 49    ; MIPS32FP32-LABEL: name: store_float50    ; MIPS32FP32: liveins: $a1, $f1251    ; MIPS32FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f1252    ; MIPS32FP32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a153    ; MIPS32FP32: SWC1 [[COPY]], [[COPY1]], 0 :: (store (s32) into %ir.ptr)54    ; MIPS32FP32: RetRA55    ; MIPS32FP64-LABEL: name: store_float56    ; MIPS32FP64: liveins: $a1, $f1257    ; MIPS32FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f1258    ; MIPS32FP64: [[COPY1:%[0-9]+]]:gpr32 = COPY $a159    ; MIPS32FP64: SWC1 [[COPY]], [[COPY1]], 0 :: (store (s32) into %ir.ptr)60    ; MIPS32FP64: RetRA61    %0:fprb(s32) = COPY $f1262    %1:gprb(p0) = COPY $a163    G_STORE %0(s32), %1(p0) :: (store (s32) into %ir.ptr)64    RetRA65 66...67---68name:            store_double69alignment:       470legalized:       true71regBankSelected: true72tracksRegLiveness: true73body:             |74  bb.1.entry:75    liveins: $a2, $d676 77    ; MIPS32FP32-LABEL: name: store_double78    ; MIPS32FP32: liveins: $a2, $d679    ; MIPS32FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d680    ; MIPS32FP32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a281    ; MIPS32FP32: SDC1 [[COPY]], [[COPY1]], 0 :: (store (s64) into %ir.ptr)82    ; MIPS32FP32: RetRA83    ; MIPS32FP64-LABEL: name: store_double84    ; MIPS32FP64: liveins: $a2, $d685    ; MIPS32FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d686    ; MIPS32FP64: [[COPY1:%[0-9]+]]:gpr32 = COPY $a287    ; MIPS32FP64: SDC164 [[COPY]], [[COPY1]], 0 :: (store (s64) into %ir.ptr)88    ; MIPS32FP64: RetRA89    %0:fprb(s64) = COPY $d690    %1:gprb(p0) = COPY $a291    G_STORE %0(s64), %1(p0) :: (store (s64) into %ir.ptr)92    RetRA93 94...95