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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS323--- |4 5 define void @load_store_i8(ptr %px, ptr %py) {entry: ret void}6 define void @load_store_i16(ptr %px, ptr %py) {entry: ret void}7 define void @load_store_i32(ptr %px, ptr %py) {entry: ret void}8 9...10---11name: load_store_i812alignment: 413legalized: true14regBankSelected: true15tracksRegLiveness: true16body: |17 bb.1.entry:18 liveins: $a0, $a119 20 ; MIPS32-LABEL: name: load_store_i821 ; MIPS32: liveins: $a0, $a122 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a023 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a124 ; MIPS32: [[LBu:%[0-9]+]]:gpr32 = LBu [[COPY1]], 0 :: (load (s8) from %ir.py)25 ; MIPS32: SB [[LBu]], [[COPY]], 0 :: (store (s8) into %ir.px)26 ; MIPS32: RetRA27 %0:gprb(p0) = COPY $a028 %1:gprb(p0) = COPY $a129 %4:gprb(s32) = G_LOAD %1(p0) :: (load (s8) from %ir.py)30 %3:gprb(s32) = COPY %4(s32)31 G_STORE %3(s32), %0(p0) :: (store (s8) into %ir.px)32 RetRA33 34...35---36name: load_store_i1637alignment: 438legalized: true39regBankSelected: true40tracksRegLiveness: true41body: |42 bb.1.entry:43 liveins: $a0, $a144 45 ; MIPS32-LABEL: name: load_store_i1646 ; MIPS32: liveins: $a0, $a147 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a048 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a149 ; MIPS32: [[LHu:%[0-9]+]]:gpr32 = LHu [[COPY1]], 0 :: (load (s16) from %ir.py)50 ; MIPS32: SH [[LHu]], [[COPY]], 0 :: (store (s16) into %ir.px)51 ; MIPS32: RetRA52 %0:gprb(p0) = COPY $a053 %1:gprb(p0) = COPY $a154 %4:gprb(s32) = G_LOAD %1(p0) :: (load (s16) from %ir.py)55 %3:gprb(s32) = COPY %4(s32)56 G_STORE %3(s32), %0(p0) :: (store (s16) into %ir.px)57 RetRA58 59...60---61name: load_store_i3262alignment: 463legalized: true64regBankSelected: true65tracksRegLiveness: true66body: |67 bb.1.entry:68 liveins: $a0, $a169 70 ; MIPS32-LABEL: name: load_store_i3271 ; MIPS32: liveins: $a0, $a172 ; MIPS32: [[COPY:%[0-9]+]]:gpr32 = COPY $a073 ; MIPS32: [[COPY1:%[0-9]+]]:gpr32 = COPY $a174 ; MIPS32: [[LW:%[0-9]+]]:gpr32 = LW [[COPY1]], 0 :: (load (s32) from %ir.py)75 ; MIPS32: SW [[LW]], [[COPY]], 0 :: (store (s32) into %ir.px)76 ; MIPS32: RetRA77 %0:gprb(p0) = COPY $a078 %1:gprb(p0) = COPY $a179 %2:gprb(s32) = G_LOAD %1(p0) :: (load (s32) from %ir.py)80 G_STORE %2(s32), %0(p0) :: (store (s32) into %ir.px)81 RetRA82 83...84