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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS323--- |4 5 define void @and_i1() {entry: ret void}6 define void @and_i8() {entry: ret void}7 define void @and_i16() {entry: ret void}8 define void @and_i32() {entry: ret void}9 define void @and_i64() {entry: ret void}10 define void @or_i1() {entry: ret void}11 define void @or_i8() {entry: ret void}12 define void @or_i16() {entry: ret void}13 define void @or_i32() {entry: ret void}14 define void @or_i64() {entry: ret void}15 define void @xor_i1() {entry: ret void}16 define void @xor_i8() {entry: ret void}17 define void @xor_i16() {entry: ret void}18 define void @xor_i32() {entry: ret void}19 define void @xor_i64() {entry: ret void}20 define void @shl(i32) {entry: ret void}21 define void @ashr(i32) {entry: ret void}22 define void @lshr(i32) {entry: ret void}23 define void @lshr_i64_shift_amount(i32) {entry: ret void}24 define void @shlv(i32, i32) {entry: ret void}25 define void @ashrv(i32, i32) {entry: ret void}26 define void @lshrv(i32, i32) {entry: ret void}27 define void @shl_i16() {entry: ret void}28 define void @ashr_i8() {entry: ret void}29 define void @lshr_i16() {entry: ret void}30 define void @shl_i64() {entry: ret void}31 define void @ashl_i64() {entry: ret void}32 define void @lshr_i64() {entry: ret void}33 34...35---36name: and_i137alignment: 438tracksRegLiveness: true39body: |40 bb.1.entry:41 liveins: $a0, $a142 43 ; MIPS32-LABEL: name: and_i144 ; MIPS32: liveins: $a0, $a145 ; MIPS32-NEXT: {{ $}}46 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a047 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a148 ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[COPY]]49 ; MIPS32-NEXT: $v0 = COPY [[AND]](s32)50 ; MIPS32-NEXT: RetRA implicit $v051 %2:_(s32) = COPY $a052 %0:_(s1) = G_TRUNC %2(s32)53 %3:_(s32) = COPY $a154 %1:_(s1) = G_TRUNC %3(s32)55 %4:_(s1) = G_AND %1, %056 %5:_(s32) = G_ANYEXT %4(s1)57 $v0 = COPY %5(s32)58 RetRA implicit $v059 60...61---62name: and_i863alignment: 464tracksRegLiveness: true65body: |66 bb.1.entry:67 liveins: $a0, $a168 69 ; MIPS32-LABEL: name: and_i870 ; MIPS32: liveins: $a0, $a171 ; MIPS32-NEXT: {{ $}}72 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a073 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a174 ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[COPY]]75 ; MIPS32-NEXT: $v0 = COPY [[AND]](s32)76 ; MIPS32-NEXT: RetRA implicit $v077 %2:_(s32) = COPY $a078 %0:_(s8) = G_TRUNC %2(s32)79 %3:_(s32) = COPY $a180 %1:_(s8) = G_TRUNC %3(s32)81 %4:_(s8) = G_AND %1, %082 %5:_(s32) = G_ANYEXT %4(s8)83 $v0 = COPY %5(s32)84 RetRA implicit $v085 86...87---88name: and_i1689alignment: 490tracksRegLiveness: true91body: |92 bb.1.entry:93 liveins: $a0, $a194 95 ; MIPS32-LABEL: name: and_i1696 ; MIPS32: liveins: $a0, $a197 ; MIPS32-NEXT: {{ $}}98 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a099 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1100 ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[COPY]]101 ; MIPS32-NEXT: $v0 = COPY [[AND]](s32)102 ; MIPS32-NEXT: RetRA implicit $v0103 %2:_(s32) = COPY $a0104 %0:_(s16) = G_TRUNC %2(s32)105 %3:_(s32) = COPY $a1106 %1:_(s16) = G_TRUNC %3(s32)107 %4:_(s16) = G_AND %1, %0108 %5:_(s32) = G_ANYEXT %4(s16)109 $v0 = COPY %5(s32)110 RetRA implicit $v0111 112...113---114name: and_i32115alignment: 4116tracksRegLiveness: true117body: |118 bb.1.entry:119 liveins: $a0, $a1120 121 ; MIPS32-LABEL: name: and_i32122 ; MIPS32: liveins: $a0, $a1123 ; MIPS32-NEXT: {{ $}}124 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0125 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1126 ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY1]], [[COPY]]127 ; MIPS32-NEXT: $v0 = COPY [[AND]](s32)128 ; MIPS32-NEXT: RetRA implicit $v0129 %0:_(s32) = COPY $a0130 %1:_(s32) = COPY $a1131 %2:_(s32) = G_AND %1, %0132 $v0 = COPY %2(s32)133 RetRA implicit $v0134 135...136---137name: and_i64138alignment: 4139tracksRegLiveness: true140body: |141 bb.1.entry:142 liveins: $a0, $a1, $a2, $a3143 144 ; MIPS32-LABEL: name: and_i64145 ; MIPS32: liveins: $a0, $a1, $a2, $a3146 ; MIPS32-NEXT: {{ $}}147 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0148 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1149 ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2150 ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3151 ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY2]], [[COPY]]152 ; MIPS32-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[COPY3]], [[COPY1]]153 ; MIPS32-NEXT: $v0 = COPY [[AND]](s32)154 ; MIPS32-NEXT: $v1 = COPY [[AND1]](s32)155 ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1156 %2:_(s32) = COPY $a0157 %3:_(s32) = COPY $a1158 %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)159 %4:_(s32) = COPY $a2160 %5:_(s32) = COPY $a3161 %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)162 %6:_(s64) = G_AND %1, %0163 %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)164 $v0 = COPY %7(s32)165 $v1 = COPY %8(s32)166 RetRA implicit $v0, implicit $v1167 168...169---170name: or_i1171alignment: 4172tracksRegLiveness: true173body: |174 bb.1.entry:175 liveins: $a0, $a1176 177 ; MIPS32-LABEL: name: or_i1178 ; MIPS32: liveins: $a0, $a1179 ; MIPS32-NEXT: {{ $}}180 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0181 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1182 ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY1]], [[COPY]]183 ; MIPS32-NEXT: $v0 = COPY [[OR]](s32)184 ; MIPS32-NEXT: RetRA implicit $v0185 %2:_(s32) = COPY $a0186 %0:_(s1) = G_TRUNC %2(s32)187 %3:_(s32) = COPY $a1188 %1:_(s1) = G_TRUNC %3(s32)189 %4:_(s1) = G_OR %1, %0190 %5:_(s32) = G_ANYEXT %4(s1)191 $v0 = COPY %5(s32)192 RetRA implicit $v0193 194...195---196name: or_i8197alignment: 4198tracksRegLiveness: true199body: |200 bb.1.entry:201 liveins: $a0, $a1202 203 ; MIPS32-LABEL: name: or_i8204 ; MIPS32: liveins: $a0, $a1205 ; MIPS32-NEXT: {{ $}}206 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0207 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1208 ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY1]], [[COPY]]209 ; MIPS32-NEXT: $v0 = COPY [[OR]](s32)210 ; MIPS32-NEXT: RetRA implicit $v0211 %2:_(s32) = COPY $a0212 %0:_(s8) = G_TRUNC %2(s32)213 %3:_(s32) = COPY $a1214 %1:_(s8) = G_TRUNC %3(s32)215 %4:_(s8) = G_OR %1, %0216 %5:_(s32) = G_ANYEXT %4(s8)217 $v0 = COPY %5(s32)218 RetRA implicit $v0219 220...221---222name: or_i16223alignment: 4224tracksRegLiveness: true225body: |226 bb.1.entry:227 liveins: $a0, $a1228 229 ; MIPS32-LABEL: name: or_i16230 ; MIPS32: liveins: $a0, $a1231 ; MIPS32-NEXT: {{ $}}232 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0233 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1234 ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY1]], [[COPY]]235 ; MIPS32-NEXT: $v0 = COPY [[OR]](s32)236 ; MIPS32-NEXT: RetRA implicit $v0237 %2:_(s32) = COPY $a0238 %0:_(s16) = G_TRUNC %2(s32)239 %3:_(s32) = COPY $a1240 %1:_(s16) = G_TRUNC %3(s32)241 %4:_(s16) = G_OR %1, %0242 %5:_(s32) = G_ANYEXT %4(s16)243 $v0 = COPY %5(s32)244 RetRA implicit $v0245 246...247---248name: or_i32249alignment: 4250tracksRegLiveness: true251body: |252 bb.1.entry:253 liveins: $a0, $a1254 255 ; MIPS32-LABEL: name: or_i32256 ; MIPS32: liveins: $a0, $a1257 ; MIPS32-NEXT: {{ $}}258 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0259 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1260 ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY1]], [[COPY]]261 ; MIPS32-NEXT: $v0 = COPY [[OR]](s32)262 ; MIPS32-NEXT: RetRA implicit $v0263 %0:_(s32) = COPY $a0264 %1:_(s32) = COPY $a1265 %2:_(s32) = G_OR %1, %0266 $v0 = COPY %2(s32)267 RetRA implicit $v0268 269...270---271name: or_i64272alignment: 4273tracksRegLiveness: true274body: |275 bb.1.entry:276 liveins: $a0, $a1, $a2, $a3277 278 ; MIPS32-LABEL: name: or_i64279 ; MIPS32: liveins: $a0, $a1, $a2, $a3280 ; MIPS32-NEXT: {{ $}}281 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0282 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1283 ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2284 ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3285 ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[COPY2]], [[COPY]]286 ; MIPS32-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[COPY3]], [[COPY1]]287 ; MIPS32-NEXT: $v0 = COPY [[OR]](s32)288 ; MIPS32-NEXT: $v1 = COPY [[OR1]](s32)289 ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1290 %2:_(s32) = COPY $a0291 %3:_(s32) = COPY $a1292 %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)293 %4:_(s32) = COPY $a2294 %5:_(s32) = COPY $a3295 %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)296 %6:_(s64) = G_OR %1, %0297 %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)298 $v0 = COPY %7(s32)299 $v1 = COPY %8(s32)300 RetRA implicit $v0, implicit $v1301 302...303---304name: xor_i1305alignment: 4306tracksRegLiveness: true307body: |308 bb.1.entry:309 liveins: $a0, $a1310 311 ; MIPS32-LABEL: name: xor_i1312 ; MIPS32: liveins: $a0, $a1313 ; MIPS32-NEXT: {{ $}}314 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0315 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1316 ; MIPS32-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY1]], [[COPY]]317 ; MIPS32-NEXT: $v0 = COPY [[XOR]](s32)318 ; MIPS32-NEXT: RetRA implicit $v0319 %2:_(s32) = COPY $a0320 %0:_(s1) = G_TRUNC %2(s32)321 %3:_(s32) = COPY $a1322 %1:_(s1) = G_TRUNC %3(s32)323 %4:_(s1) = G_XOR %1, %0324 %5:_(s32) = G_ANYEXT %4(s1)325 $v0 = COPY %5(s32)326 RetRA implicit $v0327 328...329---330name: xor_i8331alignment: 4332tracksRegLiveness: true333body: |334 bb.1.entry:335 liveins: $a0, $a1336 337 ; MIPS32-LABEL: name: xor_i8338 ; MIPS32: liveins: $a0, $a1339 ; MIPS32-NEXT: {{ $}}340 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0341 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1342 ; MIPS32-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY1]], [[COPY]]343 ; MIPS32-NEXT: $v0 = COPY [[XOR]](s32)344 ; MIPS32-NEXT: RetRA implicit $v0345 %2:_(s32) = COPY $a0346 %0:_(s8) = G_TRUNC %2(s32)347 %3:_(s32) = COPY $a1348 %1:_(s8) = G_TRUNC %3(s32)349 %4:_(s8) = G_XOR %1, %0350 %5:_(s32) = G_ANYEXT %4(s8)351 $v0 = COPY %5(s32)352 RetRA implicit $v0353 354...355---356name: xor_i16357alignment: 4358tracksRegLiveness: true359body: |360 bb.1.entry:361 liveins: $a0, $a1362 363 ; MIPS32-LABEL: name: xor_i16364 ; MIPS32: liveins: $a0, $a1365 ; MIPS32-NEXT: {{ $}}366 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0367 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1368 ; MIPS32-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY1]], [[COPY]]369 ; MIPS32-NEXT: $v0 = COPY [[XOR]](s32)370 ; MIPS32-NEXT: RetRA implicit $v0371 %2:_(s32) = COPY $a0372 %0:_(s16) = G_TRUNC %2(s32)373 %3:_(s32) = COPY $a1374 %1:_(s16) = G_TRUNC %3(s32)375 %4:_(s16) = G_XOR %1, %0376 %5:_(s32) = G_ANYEXT %4(s16)377 $v0 = COPY %5(s32)378 RetRA implicit $v0379 380...381---382name: xor_i32383alignment: 4384tracksRegLiveness: true385body: |386 bb.1.entry:387 liveins: $a0, $a1388 389 ; MIPS32-LABEL: name: xor_i32390 ; MIPS32: liveins: $a0, $a1391 ; MIPS32-NEXT: {{ $}}392 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0393 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1394 ; MIPS32-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY1]], [[COPY]]395 ; MIPS32-NEXT: $v0 = COPY [[XOR]](s32)396 ; MIPS32-NEXT: RetRA implicit $v0397 %0:_(s32) = COPY $a0398 %1:_(s32) = COPY $a1399 %2:_(s32) = G_XOR %1, %0400 $v0 = COPY %2(s32)401 RetRA implicit $v0402 403...404---405name: xor_i64406alignment: 4407tracksRegLiveness: true408body: |409 bb.1.entry:410 liveins: $a0, $a1, $a2, $a3411 412 ; MIPS32-LABEL: name: xor_i64413 ; MIPS32: liveins: $a0, $a1, $a2, $a3414 ; MIPS32-NEXT: {{ $}}415 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0416 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1417 ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2418 ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3419 ; MIPS32-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY2]], [[COPY]]420 ; MIPS32-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[COPY3]], [[COPY1]]421 ; MIPS32-NEXT: $v0 = COPY [[XOR]](s32)422 ; MIPS32-NEXT: $v1 = COPY [[XOR1]](s32)423 ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1424 %2:_(s32) = COPY $a0425 %3:_(s32) = COPY $a1426 %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)427 %4:_(s32) = COPY $a2428 %5:_(s32) = COPY $a3429 %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)430 %6:_(s64) = G_XOR %1, %0431 %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)432 $v0 = COPY %7(s32)433 $v1 = COPY %8(s32)434 RetRA implicit $v0, implicit $v1435 436...437---438name: shl439alignment: 4440tracksRegLiveness: true441body: |442 bb.1.entry:443 liveins: $a0444 445 ; MIPS32-LABEL: name: shl446 ; MIPS32: liveins: $a0447 ; MIPS32-NEXT: {{ $}}448 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0449 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1450 ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)451 ; MIPS32-NEXT: $v0 = COPY [[SHL]](s32)452 ; MIPS32-NEXT: RetRA implicit $v0453 %0:_(s32) = COPY $a0454 %1:_(s32) = G_CONSTANT i32 1455 %2:_(s32) = G_SHL %0, %1456 $v0 = COPY %2(s32)457 RetRA implicit $v0458 459...460---461name: ashr462alignment: 4463tracksRegLiveness: true464body: |465 bb.1.entry:466 liveins: $a0467 468 ; MIPS32-LABEL: name: ashr469 ; MIPS32: liveins: $a0470 ; MIPS32-NEXT: {{ $}}471 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0472 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1473 ; MIPS32-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[C]](s32)474 ; MIPS32-NEXT: $v0 = COPY [[ASHR]](s32)475 ; MIPS32-NEXT: RetRA implicit $v0476 %0:_(s32) = COPY $a0477 %1:_(s32) = G_CONSTANT i32 1478 %2:_(s32) = G_ASHR %0, %1479 $v0 = COPY %2(s32)480 RetRA implicit $v0481 482...483---484name: lshr485alignment: 4486tracksRegLiveness: true487body: |488 bb.1.entry:489 liveins: $a0490 491 ; MIPS32-LABEL: name: lshr492 ; MIPS32: liveins: $a0493 ; MIPS32-NEXT: {{ $}}494 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0495 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1496 ; MIPS32-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)497 ; MIPS32-NEXT: $v0 = COPY [[LSHR]](s32)498 ; MIPS32-NEXT: RetRA implicit $v0499 %0:_(s32) = COPY $a0500 %1:_(s32) = G_CONSTANT i32 1501 %2:_(s32) = G_LSHR %0, %1502 $v0 = COPY %2(s32)503 RetRA implicit $v0504 505...506---507name: lshr_i64_shift_amount508alignment: 4509tracksRegLiveness: true510body: |511 bb.1.entry:512 liveins: $a0513 514 ; MIPS32-LABEL: name: lshr_i64_shift_amount515 ; MIPS32: liveins: $a0516 ; MIPS32-NEXT: {{ $}}517 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0518 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1519 ; MIPS32-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[C]](s32)520 ; MIPS32-NEXT: $v0 = COPY [[LSHR]](s32)521 ; MIPS32-NEXT: RetRA implicit $v0522 %0:_(s32) = COPY $a0523 %1:_(s64) = G_CONSTANT i64 1524 %2:_(s32) = G_LSHR %0, %1525 $v0 = COPY %2(s32)526 RetRA implicit $v0527 528...529---530name: shlv531alignment: 4532tracksRegLiveness: true533body: |534 bb.1.entry:535 liveins: $a0, $a1536 537 ; MIPS32-LABEL: name: shlv538 ; MIPS32: liveins: $a0, $a1539 ; MIPS32-NEXT: {{ $}}540 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0541 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1542 ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[COPY1]](s32)543 ; MIPS32-NEXT: $v0 = COPY [[SHL]](s32)544 ; MIPS32-NEXT: RetRA implicit $v0545 %0:_(s32) = COPY $a0546 %1:_(s32) = COPY $a1547 %2:_(s32) = G_SHL %0, %1548 $v0 = COPY %2(s32)549 RetRA implicit $v0550 551...552---553name: ashrv554alignment: 4555tracksRegLiveness: true556body: |557 bb.1.entry:558 liveins: $a0, $a1559 560 ; MIPS32-LABEL: name: ashrv561 ; MIPS32: liveins: $a0, $a1562 ; MIPS32-NEXT: {{ $}}563 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0564 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1565 ; MIPS32-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY]], [[COPY1]](s32)566 ; MIPS32-NEXT: $v0 = COPY [[ASHR]](s32)567 ; MIPS32-NEXT: RetRA implicit $v0568 %0:_(s32) = COPY $a0569 %1:_(s32) = COPY $a1570 %2:_(s32) = G_ASHR %0, %1571 $v0 = COPY %2(s32)572 RetRA implicit $v0573 574...575---576name: lshrv577alignment: 4578tracksRegLiveness: true579body: |580 bb.1.entry:581 liveins: $a0, $a1582 583 ; MIPS32-LABEL: name: lshrv584 ; MIPS32: liveins: $a0, $a1585 ; MIPS32-NEXT: {{ $}}586 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0587 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1588 ; MIPS32-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY1]](s32)589 ; MIPS32-NEXT: $v0 = COPY [[LSHR]](s32)590 ; MIPS32-NEXT: RetRA implicit $v0591 %0:_(s32) = COPY $a0592 %1:_(s32) = COPY $a1593 %2:_(s32) = G_LSHR %0, %1594 $v0 = COPY %2(s32)595 RetRA implicit $v0596 597...598---599name: shl_i16600alignment: 4601tracksRegLiveness: true602body: |603 bb.1.entry:604 liveins: $a0605 606 ; MIPS32-LABEL: name: shl_i16607 ; MIPS32: liveins: $a0608 ; MIPS32-NEXT: {{ $}}609 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0610 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2611 ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C]](s32)612 ; MIPS32-NEXT: $v0 = COPY [[SHL]](s32)613 ; MIPS32-NEXT: RetRA implicit $v0614 %1:_(s32) = COPY $a0615 %0:_(s16) = G_TRUNC %1(s32)616 %2:_(s16) = G_CONSTANT i16 2617 %3:_(s16) = G_SHL %0, %2(s16)618 %4:_(s32) = G_ANYEXT %3(s16)619 $v0 = COPY %4(s32)620 RetRA implicit $v0621 622...623---624name: ashr_i8625alignment: 4626tracksRegLiveness: true627body: |628 bb.1.entry:629 liveins: $a0630 631 ; MIPS32-LABEL: name: ashr_i8632 ; MIPS32: liveins: $a0633 ; MIPS32-NEXT: {{ $}}634 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0635 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2636 ; MIPS32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 24637 ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[C1]](s32)638 ; MIPS32-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C1]](s32)639 ; MIPS32-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[ASHR]], [[C]](s32)640 ; MIPS32-NEXT: $v0 = COPY [[ASHR1]](s32)641 ; MIPS32-NEXT: RetRA implicit $v0642 %1:_(s32) = COPY $a0643 %0:_(s8) = G_TRUNC %1(s32)644 %2:_(s8) = G_CONSTANT i8 2645 %3:_(s8) = G_ASHR %0, %2(s8)646 %4:_(s32) = G_ANYEXT %3(s8)647 $v0 = COPY %4(s32)648 RetRA implicit $v0649 650...651---652name: lshr_i16653alignment: 4654tracksRegLiveness: true655body: |656 bb.1.entry:657 liveins: $a0658 659 ; MIPS32-LABEL: name: lshr_i16660 ; MIPS32: liveins: $a0661 ; MIPS32-NEXT: {{ $}}662 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0663 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2664 ; MIPS32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535665 ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[COPY]], [[C1]]666 ; MIPS32-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[AND]], [[C]](s32)667 ; MIPS32-NEXT: $v0 = COPY [[LSHR]](s32)668 ; MIPS32-NEXT: RetRA implicit $v0669 %1:_(s32) = COPY $a0670 %0:_(s16) = G_TRUNC %1(s32)671 %2:_(s16) = G_CONSTANT i16 2672 %3:_(s16) = G_LSHR %0, %2(s16)673 %4:_(s32) = G_ANYEXT %3(s16)674 $v0 = COPY %4(s32)675 RetRA implicit $v0676 677...678---679name: shl_i64680alignment: 4681tracksRegLiveness: true682body: |683 bb.1.entry:684 liveins: $a0, $a1, $a2, $a3685 686 ; MIPS32-LABEL: name: shl_i64687 ; MIPS32: liveins: $a0, $a1, $a2, $a3688 ; MIPS32-NEXT: {{ $}}689 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0690 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1691 ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2692 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32693 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY2]], [[C]]694 ; MIPS32-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY2]]695 ; MIPS32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0696 ; MIPS32-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY2]](s32), [[C]]697 ; MIPS32-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY2]](s32), [[C1]]698 ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[COPY2]](s32)699 ; MIPS32-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[SUB1]](s32)700 ; MIPS32-NEXT: [[SHL1:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[COPY2]](s32)701 ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL1]]702 ; MIPS32-NEXT: [[SHL2:%[0-9]+]]:_(s32) = G_SHL [[COPY]], [[SUB]](s32)703 ; MIPS32-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[SHL]], [[C1]]704 ; MIPS32-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[OR]], [[SHL2]]705 ; MIPS32-NEXT: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[ICMP1]](s32), [[COPY1]], [[SELECT1]]706 ; MIPS32-NEXT: $v0 = COPY [[SELECT]](s32)707 ; MIPS32-NEXT: $v1 = COPY [[SELECT2]](s32)708 ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1709 %2:_(s32) = COPY $a0710 %3:_(s32) = COPY $a1711 %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)712 %4:_(s32) = COPY $a2713 %5:_(s32) = COPY $a3714 %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)715 %6:_(s64) = G_SHL %0, %1(s64)716 %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)717 $v0 = COPY %7(s32)718 $v1 = COPY %8(s32)719 RetRA implicit $v0, implicit $v1720 721...722---723name: ashl_i64724alignment: 4725tracksRegLiveness: true726body: |727 bb.1.entry:728 liveins: $a0, $a1, $a2, $a3729 730 ; MIPS32-LABEL: name: ashl_i64731 ; MIPS32: liveins: $a0, $a1, $a2, $a3732 ; MIPS32-NEXT: {{ $}}733 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0734 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1735 ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2736 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32737 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY2]], [[C]]738 ; MIPS32-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY2]]739 ; MIPS32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0740 ; MIPS32-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY2]](s32), [[C]]741 ; MIPS32-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY2]](s32), [[C1]]742 ; MIPS32-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[COPY1]], [[COPY2]](s32)743 ; MIPS32-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY2]](s32)744 ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[SUB1]](s32)745 ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR]], [[SHL]]746 ; MIPS32-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 31747 ; MIPS32-NEXT: [[ASHR1:%[0-9]+]]:_(s32) = G_ASHR [[COPY1]], [[C2]](s32)748 ; MIPS32-NEXT: [[ASHR2:%[0-9]+]]:_(s32) = G_ASHR [[COPY1]], [[SUB]](s32)749 ; MIPS32-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[OR]], [[ASHR2]]750 ; MIPS32-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ICMP1]](s32), [[COPY]], [[SELECT]]751 ; MIPS32-NEXT: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[ASHR]], [[ASHR1]]752 ; MIPS32-NEXT: $v0 = COPY [[SELECT1]](s32)753 ; MIPS32-NEXT: $v1 = COPY [[SELECT2]](s32)754 ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1755 %2:_(s32) = COPY $a0756 %3:_(s32) = COPY $a1757 %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)758 %4:_(s32) = COPY $a2759 %5:_(s32) = COPY $a3760 %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)761 %6:_(s64) = G_ASHR %0, %1(s64)762 %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)763 $v0 = COPY %7(s32)764 $v1 = COPY %8(s32)765 RetRA implicit $v0, implicit $v1766 767...768---769name: lshr_i64770alignment: 4771tracksRegLiveness: true772body: |773 bb.1.entry:774 liveins: $a0, $a1, $a2, $a3775 776 ; MIPS32-LABEL: name: lshr_i64777 ; MIPS32: liveins: $a0, $a1, $a2, $a3778 ; MIPS32-NEXT: {{ $}}779 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0780 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1781 ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2782 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 32783 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY2]], [[C]]784 ; MIPS32-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C]], [[COPY2]]785 ; MIPS32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0786 ; MIPS32-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY2]](s32), [[C]]787 ; MIPS32-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY2]](s32), [[C1]]788 ; MIPS32-NEXT: [[LSHR:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[COPY2]](s32)789 ; MIPS32-NEXT: [[LSHR1:%[0-9]+]]:_(s32) = G_LSHR [[COPY]], [[COPY2]](s32)790 ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[COPY1]], [[SUB1]](s32)791 ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[LSHR1]], [[SHL]]792 ; MIPS32-NEXT: [[LSHR2:%[0-9]+]]:_(s32) = G_LSHR [[COPY1]], [[SUB]](s32)793 ; MIPS32-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[OR]], [[LSHR2]]794 ; MIPS32-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ICMP1]](s32), [[COPY]], [[SELECT]]795 ; MIPS32-NEXT: [[SELECT2:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[LSHR]], [[C1]]796 ; MIPS32-NEXT: $v0 = COPY [[SELECT1]](s32)797 ; MIPS32-NEXT: $v1 = COPY [[SELECT2]](s32)798 ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1799 %2:_(s32) = COPY $a0800 %3:_(s32) = COPY $a1801 %0:_(s64) = G_MERGE_VALUES %2(s32), %3(s32)802 %4:_(s32) = COPY $a2803 %5:_(s32) = COPY $a3804 %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)805 %6:_(s64) = G_LSHR %0, %1(s64)806 %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)807 $v0 = COPY %7(s32)808 $v1 = COPY %8(s32)809 RetRA implicit $v0, implicit $v1810 811...812