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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS323---4name: cttz_i325alignment: 46tracksRegLiveness: true7body: |8 bb.1.entry:9 liveins: $a010 11 ; MIPS32-LABEL: name: cttz_i3212 ; MIPS32: liveins: $a013 ; MIPS32-NEXT: {{ $}}14 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a015 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 -116 ; MIPS32-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[C]]17 ; MIPS32-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[C]]18 ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[XOR]], [[ADD]]19 ; MIPS32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 3220 ; MIPS32-NEXT: [[CTLZ:%[0-9]+]]:_(s32) = G_CTLZ [[AND]](s32)21 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C1]], [[CTLZ]]22 ; MIPS32-NEXT: $v0 = COPY [[SUB]](s32)23 ; MIPS32-NEXT: RetRA implicit $v024 %0:_(s32) = COPY $a025 %1:_(s32) = G_CTTZ %0(s32)26 $v0 = COPY %1(s32)27 RetRA implicit $v028 29...30---31name: cttz_i6432alignment: 433tracksRegLiveness: true34body: |35 bb.1.entry:36 liveins: $a0, $a137 38 ; MIPS32-LABEL: name: cttz_i6439 ; MIPS32: liveins: $a0, $a140 ; MIPS32-NEXT: {{ $}}41 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a042 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a143 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 044 ; MIPS32-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]45 ; MIPS32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -146 ; MIPS32-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY1]], [[C1]]47 ; MIPS32-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY1]], [[C1]]48 ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[XOR]], [[ADD]]49 ; MIPS32-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 3250 ; MIPS32-NEXT: [[CTLZ:%[0-9]+]]:_(s32) = G_CTLZ [[AND]](s32)51 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[CTLZ]]52 ; MIPS32-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[SUB]], [[C2]]53 ; MIPS32-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[C1]]54 ; MIPS32-NEXT: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[C1]]55 ; MIPS32-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[XOR1]], [[ADD2]]56 ; MIPS32-NEXT: [[CTLZ1:%[0-9]+]]:_(s32) = G_CTLZ [[AND1]](s32)57 ; MIPS32-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C2]], [[CTLZ1]]58 ; MIPS32-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[ADD1]], [[SUB1]]59 ; MIPS32-NEXT: $v0 = COPY [[SELECT]](s32)60 ; MIPS32-NEXT: $v1 = COPY [[C]](s32)61 ; MIPS32-NEXT: RetRA implicit $v0, implicit $v162 %1:_(s32) = COPY $a063 %2:_(s32) = COPY $a164 %0:_(s64) = G_MERGE_VALUES %1(s32), %2(s32)65 %3:_(s64) = G_CTTZ %0(s64)66 %4:_(s32), %5:_(s32) = G_UNMERGE_VALUES %3(s64)67 $v0 = COPY %4(s32)68 $v1 = COPY %5(s32)69 RetRA implicit $v0, implicit $v170 71...72---73name: ffs_i32_expansion74alignment: 475tracksRegLiveness: true76body: |77 bb.1.entry:78 liveins: $a079 80 ; MIPS32-LABEL: name: ffs_i32_expansion81 ; MIPS32: liveins: $a082 ; MIPS32-NEXT: {{ $}}83 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a084 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 185 ; MIPS32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 086 ; MIPS32-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -187 ; MIPS32-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[C2]]88 ; MIPS32-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[C2]]89 ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[XOR]], [[ADD]]90 ; MIPS32-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 3291 ; MIPS32-NEXT: [[CTLZ:%[0-9]+]]:_(s32) = G_CTLZ [[AND]](s32)92 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[CTLZ]]93 ; MIPS32-NEXT: [[ADD1:%[0-9]+]]:_(s32) = nuw nsw G_ADD [[SUB]], [[C]]94 ; MIPS32-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY]](s32), [[C1]]95 ; MIPS32-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[C1]], [[ADD1]]96 ; MIPS32-NEXT: $v0 = COPY [[SELECT]](s32)97 ; MIPS32-NEXT: RetRA implicit $v098 %0:_(s32) = COPY $a099 %2:_(s32) = G_CONSTANT i32 1100 %4:_(s32) = G_CONSTANT i32 0101 %1:_(s32) = G_CTTZ_ZERO_UNDEF %0(s32)102 %3:_(s32) = nuw nsw G_ADD %1, %2103 %5:_(s1) = G_ICMP intpred(eq), %0(s32), %4104 %6:_(s32) = G_SELECT %5(s1), %4, %3105 $v0 = COPY %6(s32)106 RetRA implicit $v0107 108...109---110name: ffs_i64_expansion111alignment: 4112tracksRegLiveness: true113body: |114 bb.1.entry:115 liveins: $a0, $a1116 117 ; MIPS32-LABEL: name: ffs_i64_expansion118 ; MIPS32: liveins: $a0, $a1119 ; MIPS32-NEXT: {{ $}}120 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0121 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1122 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1123 ; MIPS32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0124 ; MIPS32-NEXT: [[MV:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[C1]](s32), [[C1]](s32)125 ; MIPS32-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[COPY]](s32), [[C1]]126 ; MIPS32-NEXT: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 -1127 ; MIPS32-NEXT: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[COPY1]], [[C2]]128 ; MIPS32-NEXT: [[ADD:%[0-9]+]]:_(s32) = G_ADD [[COPY1]], [[C2]]129 ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[XOR]], [[ADD]]130 ; MIPS32-NEXT: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 32131 ; MIPS32-NEXT: [[CTLZ:%[0-9]+]]:_(s32) = G_CTLZ [[AND]](s32)132 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[CTLZ]]133 ; MIPS32-NEXT: [[ADD1:%[0-9]+]]:_(s32) = G_ADD [[SUB]], [[C3]]134 ; MIPS32-NEXT: [[XOR1:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[C2]]135 ; MIPS32-NEXT: [[ADD2:%[0-9]+]]:_(s32) = G_ADD [[COPY]], [[C2]]136 ; MIPS32-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[XOR1]], [[ADD2]]137 ; MIPS32-NEXT: [[CTLZ1:%[0-9]+]]:_(s32) = G_CTLZ [[AND1]](s32)138 ; MIPS32-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[C3]], [[CTLZ1]]139 ; MIPS32-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[ADD1]], [[SUB1]]140 ; MIPS32-NEXT: [[ADD3:%[0-9]+]]:_(s32) = G_ADD [[SELECT]], [[C]]141 ; MIPS32-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[ADD3]](s32), [[C]]142 ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY [[ADD3]](s32)143 ; MIPS32-NEXT: [[ADD4:%[0-9]+]]:_(s32) = G_ADD [[C1]], [[C1]]144 ; MIPS32-NEXT: [[ADD5:%[0-9]+]]:_(s32) = G_ADD [[ADD4]], [[ICMP1]]145 ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY [[ADD5]](s32)146 ; MIPS32-NEXT: [[MV1:%[0-9]+]]:_(s64) = G_MERGE_VALUES [[COPY2]](s32), [[COPY3]](s32)147 ; MIPS32-NEXT: [[XOR2:%[0-9]+]]:_(s32) = G_XOR [[COPY]], [[C1]]148 ; MIPS32-NEXT: [[XOR3:%[0-9]+]]:_(s32) = G_XOR [[COPY1]], [[C1]]149 ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[XOR2]], [[XOR3]]150 ; MIPS32-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[OR]](s32), [[C1]]151 ; MIPS32-NEXT: [[SELECT1:%[0-9]+]]:_(s64) = G_SELECT [[ICMP2]](s32), [[MV]], [[MV1]]152 ; MIPS32-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SELECT1]](s64)153 ; MIPS32-NEXT: $v0 = COPY [[UV]](s32)154 ; MIPS32-NEXT: $v1 = COPY [[UV1]](s32)155 ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1156 %1:_(s32) = COPY $a0157 %2:_(s32) = COPY $a1158 %0:_(s64) = G_MERGE_VALUES %1(s32), %2(s32)159 %4:_(s64) = G_CONSTANT i64 1160 %6:_(s64) = G_CONSTANT i64 0161 %3:_(s64) = G_CTTZ_ZERO_UNDEF %0(s64)162 %5:_(s64) = nuw nsw G_ADD %3, %4163 %7:_(s1) = G_ICMP intpred(eq), %0(s64), %6164 %8:_(s64) = G_SELECT %7(s1), %6, %5165 %9:_(s32), %10:_(s32) = G_UNMERGE_VALUES %8(s64)166 $v0 = COPY %9(s32)167 $v1 = COPY %10(s32)168 RetRA implicit $v0, implicit $v1169 170...171