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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -mtriple=mipsel-linux-gnu -mcpu=mips32r5 -mattr=+msa,+fp64,+nan2008 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=P56003--- |4 5 define void @sqrt_v4f32(ptr %a, ptr %c) { entry: ret void }6 define void @sqrt_v2f64(ptr %a, ptr %c) { entry: ret void }7 8...9---10name: sqrt_v4f3211alignment: 412tracksRegLiveness: true13body: |14 bb.1.entry:15 liveins: $a0, $a116 17 ; P5600-LABEL: name: sqrt_v4f3218 ; P5600: liveins: $a0, $a119 ; P5600: [[COPY:%[0-9]+]]:_(p0) = COPY $a020 ; P5600: [[COPY1:%[0-9]+]]:_(p0) = COPY $a121 ; P5600: [[LOAD:%[0-9]+]]:_(<4 x s32>) = G_LOAD [[COPY]](p0) :: (load (<4 x s32>) from %ir.a)22 ; P5600: [[FSQRT:%[0-9]+]]:_(<4 x s32>) = G_FSQRT [[LOAD]]23 ; P5600: G_STORE [[FSQRT]](<4 x s32>), [[COPY1]](p0) :: (store (<4 x s32>) into %ir.c)24 ; P5600: RetRA25 %0:_(p0) = COPY $a026 %1:_(p0) = COPY $a127 %2:_(<4 x s32>) = G_LOAD %0(p0) :: (load (<4 x s32>) from %ir.a)28 %3:_(<4 x s32>) = G_FSQRT %229 G_STORE %3(<4 x s32>), %1(p0) :: (store (<4 x s32>) into %ir.c)30 RetRA31 32...33---34name: sqrt_v2f6435alignment: 436tracksRegLiveness: true37body: |38 bb.1.entry:39 liveins: $a0, $a140 41 ; P5600-LABEL: name: sqrt_v2f6442 ; P5600: liveins: $a0, $a143 ; P5600: [[COPY:%[0-9]+]]:_(p0) = COPY $a044 ; P5600: [[COPY1:%[0-9]+]]:_(p0) = COPY $a145 ; P5600: [[LOAD:%[0-9]+]]:_(<2 x s64>) = G_LOAD [[COPY]](p0) :: (load (<2 x s64>) from %ir.a)46 ; P5600: [[FSQRT:%[0-9]+]]:_(<2 x s64>) = G_FSQRT [[LOAD]]47 ; P5600: G_STORE [[FSQRT]](<2 x s64>), [[COPY1]](p0) :: (store (<2 x s64>) into %ir.c)48 ; P5600: RetRA49 %0:_(p0) = COPY $a050 %1:_(p0) = COPY $a151 %2:_(<2 x s64>) = G_LOAD %0(p0) :: (load (<2 x s64>) from %ir.a)52 %3:_(<2 x s64>) = G_FSQRT %253 G_STORE %3(<2 x s64>), %1(p0) :: (store (<2 x s64>) into %ir.c)54 RetRA55 56...57