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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS323--- |4 5 define void @sub_i32() {entry: ret void}6 define void @sub_i8_sext() {entry: ret void}7 define void @sub_i8_zext() {entry: ret void}8 define void @sub_i8_aext() {entry: ret void}9 define void @sub_i16_sext() {entry: ret void}10 define void @sub_i16_zext() {entry: ret void}11 define void @sub_i16_aext() {entry: ret void}12 define void @sub_i64() {entry: ret void}13 define void @sub_i128() {entry: ret void}14 15...16---17name: sub_i3218alignment: 419tracksRegLiveness: true20body: |21 bb.1.entry:22 liveins: $a0, $a123 24 ; MIPS32-LABEL: name: sub_i3225 ; MIPS32: liveins: $a0, $a126 ; MIPS32-NEXT: {{ $}}27 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a028 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a129 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY]], [[COPY1]]30 ; MIPS32-NEXT: $v0 = COPY [[SUB]](s32)31 ; MIPS32-NEXT: RetRA implicit $v032 %0:_(s32) = COPY $a033 %1:_(s32) = COPY $a134 %2:_(s32) = G_SUB %0, %135 $v0 = COPY %2(s32)36 RetRA implicit $v037 38...39---40name: sub_i8_sext41alignment: 442tracksRegLiveness: true43body: |44 bb.1.entry:45 liveins: $a0, $a146 47 ; MIPS32-LABEL: name: sub_i8_sext48 ; MIPS32: liveins: $a0, $a149 ; MIPS32-NEXT: {{ $}}50 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a051 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a152 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY1]], [[COPY]]53 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 2454 ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[SUB]], [[C]](s32)55 ; MIPS32-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)56 ; MIPS32-NEXT: $v0 = COPY [[ASHR]](s32)57 ; MIPS32-NEXT: RetRA implicit $v058 %2:_(s32) = COPY $a059 %0:_(s8) = G_TRUNC %2(s32)60 %3:_(s32) = COPY $a161 %1:_(s8) = G_TRUNC %3(s32)62 %4:_(s8) = G_SUB %1, %063 %5:_(s32) = G_SEXT %4(s8)64 $v0 = COPY %5(s32)65 RetRA implicit $v066 67...68---69name: sub_i8_zext70alignment: 471tracksRegLiveness: true72body: |73 bb.1.entry:74 liveins: $a0, $a175 76 ; MIPS32-LABEL: name: sub_i8_zext77 ; MIPS32: liveins: $a0, $a178 ; MIPS32-NEXT: {{ $}}79 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a080 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a181 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY1]], [[COPY]]82 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 25583 ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[SUB]], [[C]]84 ; MIPS32-NEXT: $v0 = COPY [[AND]](s32)85 ; MIPS32-NEXT: RetRA implicit $v086 %2:_(s32) = COPY $a087 %0:_(s8) = G_TRUNC %2(s32)88 %3:_(s32) = COPY $a189 %1:_(s8) = G_TRUNC %3(s32)90 %4:_(s8) = G_SUB %1, %091 %5:_(s32) = G_ZEXT %4(s8)92 $v0 = COPY %5(s32)93 RetRA implicit $v094 95...96---97name: sub_i8_aext98alignment: 499tracksRegLiveness: true100body: |101 bb.1.entry:102 liveins: $a0, $a1103 104 ; MIPS32-LABEL: name: sub_i8_aext105 ; MIPS32: liveins: $a0, $a1106 ; MIPS32-NEXT: {{ $}}107 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0108 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1109 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY1]], [[COPY]]110 ; MIPS32-NEXT: $v0 = COPY [[SUB]](s32)111 ; MIPS32-NEXT: RetRA implicit $v0112 %2:_(s32) = COPY $a0113 %0:_(s8) = G_TRUNC %2(s32)114 %3:_(s32) = COPY $a1115 %1:_(s8) = G_TRUNC %3(s32)116 %4:_(s8) = G_SUB %1, %0117 %5:_(s32) = G_ANYEXT %4(s8)118 $v0 = COPY %5(s32)119 RetRA implicit $v0120 121...122---123name: sub_i16_sext124alignment: 4125tracksRegLiveness: true126body: |127 bb.1.entry:128 liveins: $a0, $a1129 130 ; MIPS32-LABEL: name: sub_i16_sext131 ; MIPS32: liveins: $a0, $a1132 ; MIPS32-NEXT: {{ $}}133 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0134 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1135 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY1]], [[COPY]]136 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16137 ; MIPS32-NEXT: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[SUB]], [[C]](s32)138 ; MIPS32-NEXT: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)139 ; MIPS32-NEXT: $v0 = COPY [[ASHR]](s32)140 ; MIPS32-NEXT: RetRA implicit $v0141 %2:_(s32) = COPY $a0142 %0:_(s16) = G_TRUNC %2(s32)143 %3:_(s32) = COPY $a1144 %1:_(s16) = G_TRUNC %3(s32)145 %4:_(s16) = G_SUB %1, %0146 %5:_(s32) = G_SEXT %4(s16)147 $v0 = COPY %5(s32)148 RetRA implicit $v0149 150...151---152name: sub_i16_zext153alignment: 4154tracksRegLiveness: true155body: |156 bb.1.entry:157 liveins: $a0, $a1158 159 ; MIPS32-LABEL: name: sub_i16_zext160 ; MIPS32: liveins: $a0, $a1161 ; MIPS32-NEXT: {{ $}}162 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0163 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1164 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY1]], [[COPY]]165 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535166 ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[SUB]], [[C]]167 ; MIPS32-NEXT: $v0 = COPY [[AND]](s32)168 ; MIPS32-NEXT: RetRA implicit $v0169 %2:_(s32) = COPY $a0170 %0:_(s16) = G_TRUNC %2(s32)171 %3:_(s32) = COPY $a1172 %1:_(s16) = G_TRUNC %3(s32)173 %4:_(s16) = G_SUB %1, %0174 %5:_(s32) = G_ZEXT %4(s16)175 $v0 = COPY %5(s32)176 RetRA implicit $v0177 178...179---180name: sub_i16_aext181alignment: 4182tracksRegLiveness: true183body: |184 bb.1.entry:185 liveins: $a0, $a1186 187 ; MIPS32-LABEL: name: sub_i16_aext188 ; MIPS32: liveins: $a0, $a1189 ; MIPS32-NEXT: {{ $}}190 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0191 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1192 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY1]], [[COPY]]193 ; MIPS32-NEXT: $v0 = COPY [[SUB]](s32)194 ; MIPS32-NEXT: RetRA implicit $v0195 %2:_(s32) = COPY $a0196 %0:_(s16) = G_TRUNC %2(s32)197 %3:_(s32) = COPY $a1198 %1:_(s16) = G_TRUNC %3(s32)199 %4:_(s16) = G_SUB %1, %0200 %5:_(s32) = G_ANYEXT %4(s16)201 $v0 = COPY %5(s32)202 RetRA implicit $v0203 204...205---206name: sub_i64207alignment: 4208tracksRegLiveness: true209body: |210 bb.1.entry:211 liveins: $a0, $a1, $a2, $a3212 213 ; MIPS32-LABEL: name: sub_i64214 ; MIPS32: liveins: $a0, $a1, $a2, $a3215 ; MIPS32-NEXT: {{ $}}216 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0217 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1218 ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2219 ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3220 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[COPY3]], [[COPY1]]221 ; MIPS32-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY3]](s32), [[COPY1]]222 ; MIPS32-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[COPY2]], [[COPY]]223 ; MIPS32-NEXT: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[SUB1]], [[ICMP]]224 ; MIPS32-NEXT: $v0 = COPY [[SUB2]](s32)225 ; MIPS32-NEXT: $v1 = COPY [[SUB]](s32)226 ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1227 %2:_(s32) = COPY $a0228 %3:_(s32) = COPY $a1229 %0:_(s64) = G_MERGE_VALUES %3(s32), %2(s32)230 %4:_(s32) = COPY $a2231 %5:_(s32) = COPY $a3232 %1:_(s64) = G_MERGE_VALUES %5(s32), %4(s32)233 %6:_(s64) = G_SUB %1, %0234 %7:_(s32), %8:_(s32) = G_UNMERGE_VALUES %6(s64)235 $v0 = COPY %8(s32)236 $v1 = COPY %7(s32)237 RetRA implicit $v0, implicit $v1238 239...240---241name: sub_i128242alignment: 4243tracksRegLiveness: true244fixedStack:245 - { id: 0, offset: 28, size: 4, alignment: 4, stack-id: default, isImmutable: true }246 - { id: 1, offset: 24, size: 4, alignment: 8, stack-id: default, isImmutable: true }247 - { id: 2, offset: 20, size: 4, alignment: 4, stack-id: default, isImmutable: true }248 - { id: 3, offset: 16, size: 4, alignment: 8, stack-id: default, isImmutable: true }249body: |250 bb.1.entry:251 liveins: $a0, $a1, $a2, $a3252 253 ; MIPS32-LABEL: name: sub_i128254 ; MIPS32: liveins: $a0, $a1, $a2, $a3255 ; MIPS32-NEXT: {{ $}}256 ; MIPS32-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $a0257 ; MIPS32-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $a1258 ; MIPS32-NEXT: [[COPY2:%[0-9]+]]:_(s32) = COPY $a2259 ; MIPS32-NEXT: [[COPY3:%[0-9]+]]:_(s32) = COPY $a3260 ; MIPS32-NEXT: [[FRAME_INDEX:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.0261 ; MIPS32-NEXT: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %fixed-stack.0, align 8)262 ; MIPS32-NEXT: [[FRAME_INDEX1:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.1263 ; MIPS32-NEXT: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (s32) from %fixed-stack.1)264 ; MIPS32-NEXT: [[FRAME_INDEX2:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.2265 ; MIPS32-NEXT: [[LOAD2:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX2]](p0) :: (load (s32) from %fixed-stack.2, align 8)266 ; MIPS32-NEXT: [[FRAME_INDEX3:%[0-9]+]]:_(p0) = G_FRAME_INDEX %fixed-stack.3267 ; MIPS32-NEXT: [[LOAD3:%[0-9]+]]:_(s32) = G_LOAD [[FRAME_INDEX3]](p0) :: (load (s32) from %fixed-stack.3)268 ; MIPS32-NEXT: [[SUB:%[0-9]+]]:_(s32) = G_SUB [[LOAD]], [[COPY]]269 ; MIPS32-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[LOAD]](s32), [[COPY]]270 ; MIPS32-NEXT: [[SUB1:%[0-9]+]]:_(s32) = G_SUB [[LOAD1]], [[COPY1]]271 ; MIPS32-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[SUB1]](s32), [[LOAD1]]272 ; MIPS32-NEXT: [[SUB2:%[0-9]+]]:_(s32) = G_SUB [[SUB1]], [[ICMP]]273 ; MIPS32-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 0274 ; MIPS32-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[SUB1]](s32), [[C]]275 ; MIPS32-NEXT: [[AND:%[0-9]+]]:_(s32) = G_AND [[ICMP2]], [[ICMP]]276 ; MIPS32-NEXT: [[OR:%[0-9]+]]:_(s32) = G_OR [[ICMP1]], [[AND]]277 ; MIPS32-NEXT: [[SUB3:%[0-9]+]]:_(s32) = G_SUB [[LOAD2]], [[COPY2]]278 ; MIPS32-NEXT: [[ICMP3:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[SUB3]](s32), [[LOAD2]]279 ; MIPS32-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 1280 ; MIPS32-NEXT: [[AND1:%[0-9]+]]:_(s32) = G_AND [[OR]], [[C1]]281 ; MIPS32-NEXT: [[SUB4:%[0-9]+]]:_(s32) = G_SUB [[SUB3]], [[AND1]]282 ; MIPS32-NEXT: [[ICMP4:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[SUB3]](s32), [[C]]283 ; MIPS32-NEXT: [[AND2:%[0-9]+]]:_(s32) = G_AND [[ICMP4]], [[OR]]284 ; MIPS32-NEXT: [[OR1:%[0-9]+]]:_(s32) = G_OR [[ICMP3]], [[AND2]]285 ; MIPS32-NEXT: [[SUB5:%[0-9]+]]:_(s32) = G_SUB [[LOAD3]], [[COPY3]]286 ; MIPS32-NEXT: [[AND3:%[0-9]+]]:_(s32) = G_AND [[OR1]], [[C1]]287 ; MIPS32-NEXT: [[SUB6:%[0-9]+]]:_(s32) = G_SUB [[SUB5]], [[AND3]]288 ; MIPS32-NEXT: $v0 = COPY [[SUB]](s32)289 ; MIPS32-NEXT: $v1 = COPY [[SUB2]](s32)290 ; MIPS32-NEXT: $a0 = COPY [[SUB4]](s32)291 ; MIPS32-NEXT: $a1 = COPY [[SUB6]](s32)292 ; MIPS32-NEXT: RetRA implicit $v0, implicit $v1, implicit $a0, implicit $a1293 %2:_(s32) = COPY $a0294 %3:_(s32) = COPY $a1295 %4:_(s32) = COPY $a2296 %5:_(s32) = COPY $a3297 %0:_(s128) = G_MERGE_VALUES %2(s32), %3(s32), %4(s32), %5(s32)298 %10:_(p0) = G_FRAME_INDEX %fixed-stack.3299 %6:_(s32) = G_LOAD %10(p0) :: (load (s32) from %fixed-stack.3, align 8)300 %11:_(p0) = G_FRAME_INDEX %fixed-stack.2301 %7:_(s32) = G_LOAD %11(p0) :: (load (s32) from %fixed-stack.2, align 4)302 %12:_(p0) = G_FRAME_INDEX %fixed-stack.1303 %8:_(s32) = G_LOAD %12(p0) :: (load (s32) from %fixed-stack.1, align 8)304 %13:_(p0) = G_FRAME_INDEX %fixed-stack.0305 %9:_(s32) = G_LOAD %13(p0) :: (load (s32) from %fixed-stack.0, align 4)306 %1:_(s128) = G_MERGE_VALUES %6(s32), %7(s32), %8(s32), %9(s32)307 %14:_(s128) = G_SUB %1, %0308 %15:_(s32), %16:_(s32), %17:_(s32), %18:_(s32) = G_UNMERGE_VALUES %14(s128)309 $v0 = COPY %15(s32)310 $v1 = COPY %16(s32)311 $a0 = COPY %17(s32)312 $a1 = COPY %18(s32)313 RetRA implicit $v0, implicit $v1, implicit $a0, implicit $a1314 315...316