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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS323; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -mcpu=mips32r6 -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS32R64 5@float_align1 = common global float 0.000000e+00, align 16@float_align2 = common global float 0.000000e+00, align 27@float_align4 = common global float 0.000000e+00, align 48@float_align8 = common global float 0.000000e+00, align 89@i32_align1 = common global i32 0, align 110@i32_align2 = common global i32 0, align 211@i32_align4 = common global i32 0, align 412@i32_align8 = common global i32 0, align 813 14define float @load_float_align1() {15; MIPS32-LABEL: load_float_align1:16; MIPS32: # %bb.0: # %entry17; MIPS32-NEXT: lui $1, %hi(float_align1)18; MIPS32-NEXT: addiu $2, $1, %lo(float_align1)19; MIPS32-NEXT: # implicit-def: $at20; MIPS32-NEXT: lwl $1, 3($2)21; MIPS32-NEXT: lwr $1, 0($2)22; MIPS32-NEXT: mtc1 $1, $f023; MIPS32-NEXT: jr $ra24; MIPS32-NEXT: nop25;26; MIPS32R6-LABEL: load_float_align1:27; MIPS32R6: # %bb.0: # %entry28; MIPS32R6-NEXT: lui $1, %hi(float_align1)29; MIPS32R6-NEXT: addiu $1, $1, %lo(float_align1)30; MIPS32R6-NEXT: lwc1 $f0, 0($1)31; MIPS32R6-NEXT: jrc $ra32entry:33 %0 = load float, ptr @float_align1, align 134 ret float %035}36 37define float @load_float_align2() {38; MIPS32-LABEL: load_float_align2:39; MIPS32: # %bb.0: # %entry40; MIPS32-NEXT: lui $1, %hi(float_align2)41; MIPS32-NEXT: addiu $2, $1, %lo(float_align2)42; MIPS32-NEXT: # implicit-def: $at43; MIPS32-NEXT: lwl $1, 3($2)44; MIPS32-NEXT: lwr $1, 0($2)45; MIPS32-NEXT: mtc1 $1, $f046; MIPS32-NEXT: jr $ra47; MIPS32-NEXT: nop48;49; MIPS32R6-LABEL: load_float_align2:50; MIPS32R6: # %bb.0: # %entry51; MIPS32R6-NEXT: lui $1, %hi(float_align2)52; MIPS32R6-NEXT: addiu $1, $1, %lo(float_align2)53; MIPS32R6-NEXT: lwc1 $f0, 0($1)54; MIPS32R6-NEXT: jrc $ra55entry:56 %0 = load float, ptr @float_align2, align 257 ret float %058}59 60define float @load_float_align4() {61; MIPS32-LABEL: load_float_align4:62; MIPS32: # %bb.0: # %entry63; MIPS32-NEXT: lui $1, %hi(float_align4)64; MIPS32-NEXT: addiu $1, $1, %lo(float_align4)65; MIPS32-NEXT: lwc1 $f0, 0($1)66; MIPS32-NEXT: jr $ra67; MIPS32-NEXT: nop68;69; MIPS32R6-LABEL: load_float_align4:70; MIPS32R6: # %bb.0: # %entry71; MIPS32R6-NEXT: lui $1, %hi(float_align4)72; MIPS32R6-NEXT: addiu $1, $1, %lo(float_align4)73; MIPS32R6-NEXT: lwc1 $f0, 0($1)74; MIPS32R6-NEXT: jrc $ra75entry:76 %0 = load float, ptr @float_align4, align 477 ret float %078}79 80define float @load_float_align8() {81; MIPS32-LABEL: load_float_align8:82; MIPS32: # %bb.0: # %entry83; MIPS32-NEXT: lui $1, %hi(float_align8)84; MIPS32-NEXT: addiu $1, $1, %lo(float_align8)85; MIPS32-NEXT: lwc1 $f0, 0($1)86; MIPS32-NEXT: jr $ra87; MIPS32-NEXT: nop88;89; MIPS32R6-LABEL: load_float_align8:90; MIPS32R6: # %bb.0: # %entry91; MIPS32R6-NEXT: lui $1, %hi(float_align8)92; MIPS32R6-NEXT: addiu $1, $1, %lo(float_align8)93; MIPS32R6-NEXT: lwc1 $f0, 0($1)94; MIPS32R6-NEXT: jrc $ra95entry:96 %0 = load float, ptr @float_align8, align 897 ret float %098}99 100define i32 @load_i32_align1() {101; MIPS32-LABEL: load_i32_align1:102; MIPS32: # %bb.0: # %entry103; MIPS32-NEXT: lui $1, %hi(i32_align1)104; MIPS32-NEXT: addiu $1, $1, %lo(i32_align1)105; MIPS32-NEXT: # implicit-def: $v0106; MIPS32-NEXT: lwl $2, 3($1)107; MIPS32-NEXT: lwr $2, 0($1)108; MIPS32-NEXT: jr $ra109; MIPS32-NEXT: nop110;111; MIPS32R6-LABEL: load_i32_align1:112; MIPS32R6: # %bb.0: # %entry113; MIPS32R6-NEXT: lui $1, %hi(i32_align1)114; MIPS32R6-NEXT: addiu $1, $1, %lo(i32_align1)115; MIPS32R6-NEXT: lw $2, 0($1)116; MIPS32R6-NEXT: jrc $ra117entry:118 %0 = load i32, ptr @i32_align1, align 1119 ret i32 %0120}121 122define i32 @load_i32_align2() {123; MIPS32-LABEL: load_i32_align2:124; MIPS32: # %bb.0: # %entry125; MIPS32-NEXT: lui $1, %hi(i32_align2)126; MIPS32-NEXT: addiu $1, $1, %lo(i32_align2)127; MIPS32-NEXT: # implicit-def: $v0128; MIPS32-NEXT: lwl $2, 3($1)129; MIPS32-NEXT: lwr $2, 0($1)130; MIPS32-NEXT: jr $ra131; MIPS32-NEXT: nop132;133; MIPS32R6-LABEL: load_i32_align2:134; MIPS32R6: # %bb.0: # %entry135; MIPS32R6-NEXT: lui $1, %hi(i32_align2)136; MIPS32R6-NEXT: addiu $1, $1, %lo(i32_align2)137; MIPS32R6-NEXT: lw $2, 0($1)138; MIPS32R6-NEXT: jrc $ra139entry:140 %0 = load i32, ptr @i32_align2, align 2141 ret i32 %0142}143 144define i32 @load_i32_align4() {145; MIPS32-LABEL: load_i32_align4:146; MIPS32: # %bb.0: # %entry147; MIPS32-NEXT: lui $1, %hi(i32_align4)148; MIPS32-NEXT: addiu $1, $1, %lo(i32_align4)149; MIPS32-NEXT: lw $2, 0($1)150; MIPS32-NEXT: jr $ra151; MIPS32-NEXT: nop152;153; MIPS32R6-LABEL: load_i32_align4:154; MIPS32R6: # %bb.0: # %entry155; MIPS32R6-NEXT: lui $1, %hi(i32_align4)156; MIPS32R6-NEXT: addiu $1, $1, %lo(i32_align4)157; MIPS32R6-NEXT: lw $2, 0($1)158; MIPS32R6-NEXT: jrc $ra159entry:160 %0 = load i32, ptr @i32_align4, align 4161 ret i32 %0162}163 164define i32 @load_i32_align8() {165; MIPS32-LABEL: load_i32_align8:166; MIPS32: # %bb.0: # %entry167; MIPS32-NEXT: lui $1, %hi(i32_align8)168; MIPS32-NEXT: addiu $1, $1, %lo(i32_align8)169; MIPS32-NEXT: lw $2, 0($1)170; MIPS32-NEXT: jr $ra171; MIPS32-NEXT: nop172;173; MIPS32R6-LABEL: load_i32_align8:174; MIPS32R6: # %bb.0: # %entry175; MIPS32R6-NEXT: lui $1, %hi(i32_align8)176; MIPS32R6-NEXT: addiu $1, $1, %lo(i32_align8)177; MIPS32R6-NEXT: lw $2, 0($1)178; MIPS32R6-NEXT: jrc $ra179entry:180 %0 = load i32, ptr @i32_align8, align 8181 ret i32 %0182}183