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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -mcpu=mips32r5 -mattr=+msa,+fp64,+nan2008 -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=P56003 4define void @sdiv_v16i8(ptr %a, ptr %b, ptr %c) {5; P5600-LABEL: sdiv_v16i8:6; P5600: # %bb.0: # %entry7; P5600-NEXT: ld.b $w0, 0($4)8; P5600-NEXT: ld.b $w1, 0($5)9; P5600-NEXT: div_s.b $w0, $w0, $w110; P5600-NEXT: st.b $w0, 0($6)11; P5600-NEXT: jr $ra12; P5600-NEXT: nop13entry:14 %0 = load <16 x i8>, ptr %a, align 1615 %1 = load <16 x i8>, ptr %b, align 1616 %div = sdiv <16 x i8> %0, %117 store <16 x i8> %div, ptr %c, align 1618 ret void19}20 21define void @sdiv_v8i16(ptr %a, ptr %b, ptr %c) {22; P5600-LABEL: sdiv_v8i16:23; P5600: # %bb.0: # %entry24; P5600-NEXT: ld.h $w0, 0($4)25; P5600-NEXT: ld.h $w1, 0($5)26; P5600-NEXT: div_s.h $w0, $w0, $w127; P5600-NEXT: st.h $w0, 0($6)28; P5600-NEXT: jr $ra29; P5600-NEXT: nop30entry:31 %0 = load <8 x i16>, ptr %a, align 1632 %1 = load <8 x i16>, ptr %b, align 1633 %div = sdiv <8 x i16> %0, %134 store <8 x i16> %div, ptr %c, align 1635 ret void36}37 38define void @sdiv_v4i32(ptr %a, ptr %b, ptr %c) {39; P5600-LABEL: sdiv_v4i32:40; P5600: # %bb.0: # %entry41; P5600-NEXT: ld.w $w0, 0($4)42; P5600-NEXT: ld.w $w1, 0($5)43; P5600-NEXT: div_s.w $w0, $w0, $w144; P5600-NEXT: st.w $w0, 0($6)45; P5600-NEXT: jr $ra46; P5600-NEXT: nop47entry:48 %0 = load <4 x i32>, ptr %a, align 1649 %1 = load <4 x i32>, ptr %b, align 1650 %div = sdiv <4 x i32> %0, %151 store <4 x i32> %div, ptr %c, align 1652 ret void53}54 55define void @sdiv_v2i64(ptr %a, ptr %b, ptr %c) {56; P5600-LABEL: sdiv_v2i64:57; P5600: # %bb.0: # %entry58; P5600-NEXT: ld.d $w0, 0($4)59; P5600-NEXT: ld.d $w1, 0($5)60; P5600-NEXT: div_s.d $w0, $w0, $w161; P5600-NEXT: st.d $w0, 0($6)62; P5600-NEXT: jr $ra63; P5600-NEXT: nop64entry:65 %0 = load <2 x i64>, ptr %a, align 1666 %1 = load <2 x i64>, ptr %b, align 1667 %div = sdiv <2 x i64> %0, %168 store <2 x i64> %div, ptr %c, align 1669 ret void70}71 72define void @srem_v16i8(ptr %a, ptr %b, ptr %c) {73; P5600-LABEL: srem_v16i8:74; P5600: # %bb.0: # %entry75; P5600-NEXT: ld.b $w0, 0($4)76; P5600-NEXT: ld.b $w1, 0($5)77; P5600-NEXT: mod_s.b $w0, $w0, $w178; P5600-NEXT: st.b $w0, 0($6)79; P5600-NEXT: jr $ra80; P5600-NEXT: nop81entry:82 %0 = load <16 x i8>, ptr %a, align 1683 %1 = load <16 x i8>, ptr %b, align 1684 %rem = srem <16 x i8> %0, %185 store <16 x i8> %rem, ptr %c, align 1686 ret void87}88 89define void @srem_v8i16(ptr %a, ptr %b, ptr %c) {90; P5600-LABEL: srem_v8i16:91; P5600: # %bb.0: # %entry92; P5600-NEXT: ld.h $w0, 0($4)93; P5600-NEXT: ld.h $w1, 0($5)94; P5600-NEXT: mod_s.h $w0, $w0, $w195; P5600-NEXT: st.h $w0, 0($6)96; P5600-NEXT: jr $ra97; P5600-NEXT: nop98entry:99 %0 = load <8 x i16>, ptr %a, align 16100 %1 = load <8 x i16>, ptr %b, align 16101 %rem = srem <8 x i16> %0, %1102 store <8 x i16> %rem, ptr %c, align 16103 ret void104}105 106define void @srem_v4i32(ptr %a, ptr %b, ptr %c) {107; P5600-LABEL: srem_v4i32:108; P5600: # %bb.0: # %entry109; P5600-NEXT: ld.w $w0, 0($4)110; P5600-NEXT: ld.w $w1, 0($5)111; P5600-NEXT: mod_s.w $w0, $w0, $w1112; P5600-NEXT: st.w $w0, 0($6)113; P5600-NEXT: jr $ra114; P5600-NEXT: nop115entry:116 %0 = load <4 x i32>, ptr %a, align 16117 %1 = load <4 x i32>, ptr %b, align 16118 %rem = srem <4 x i32> %0, %1119 store <4 x i32> %rem, ptr %c, align 16120 ret void121}122 123define void @srem_v2i64(ptr %a, ptr %b, ptr %c) {124; P5600-LABEL: srem_v2i64:125; P5600: # %bb.0: # %entry126; P5600-NEXT: ld.d $w0, 0($4)127; P5600-NEXT: ld.d $w1, 0($5)128; P5600-NEXT: mod_s.d $w0, $w0, $w1129; P5600-NEXT: st.d $w0, 0($6)130; P5600-NEXT: jr $ra131; P5600-NEXT: nop132entry:133 %0 = load <2 x i64>, ptr %a, align 16134 %1 = load <2 x i64>, ptr %b, align 16135 %rem = srem <2 x i64> %0, %1136 store <2 x i64> %rem, ptr %c, align 16137 ret void138}139 140define void @udiv_v16u8(ptr %a, ptr %b, ptr %c) {141; P5600-LABEL: udiv_v16u8:142; P5600: # %bb.0: # %entry143; P5600-NEXT: ld.b $w0, 0($4)144; P5600-NEXT: ld.b $w1, 0($5)145; P5600-NEXT: div_u.b $w0, $w0, $w1146; P5600-NEXT: st.b $w0, 0($6)147; P5600-NEXT: jr $ra148; P5600-NEXT: nop149entry:150 %0 = load <16 x i8>, ptr %a, align 16151 %1 = load <16 x i8>, ptr %b, align 16152 %div = udiv <16 x i8> %0, %1153 store <16 x i8> %div, ptr %c, align 16154 ret void155}156 157define void @udiv_v8u16(ptr %a, ptr %b, ptr %c) {158; P5600-LABEL: udiv_v8u16:159; P5600: # %bb.0: # %entry160; P5600-NEXT: ld.h $w0, 0($4)161; P5600-NEXT: ld.h $w1, 0($5)162; P5600-NEXT: div_u.h $w0, $w0, $w1163; P5600-NEXT: st.h $w0, 0($6)164; P5600-NEXT: jr $ra165; P5600-NEXT: nop166entry:167 %0 = load <8 x i16>, ptr %a, align 16168 %1 = load <8 x i16>, ptr %b, align 16169 %div = udiv <8 x i16> %0, %1170 store <8 x i16> %div, ptr %c, align 16171 ret void172}173 174define void @udiv_v4u32(ptr %a, ptr %b, ptr %c) {175; P5600-LABEL: udiv_v4u32:176; P5600: # %bb.0: # %entry177; P5600-NEXT: ld.w $w0, 0($4)178; P5600-NEXT: ld.w $w1, 0($5)179; P5600-NEXT: div_u.w $w0, $w0, $w1180; P5600-NEXT: st.w $w0, 0($6)181; P5600-NEXT: jr $ra182; P5600-NEXT: nop183entry:184 %0 = load <4 x i32>, ptr %a, align 16185 %1 = load <4 x i32>, ptr %b, align 16186 %div = udiv <4 x i32> %0, %1187 store <4 x i32> %div, ptr %c, align 16188 ret void189}190 191define void @udiv_v2u64(ptr %a, ptr %b, ptr %c) {192; P5600-LABEL: udiv_v2u64:193; P5600: # %bb.0: # %entry194; P5600-NEXT: ld.d $w0, 0($4)195; P5600-NEXT: ld.d $w1, 0($5)196; P5600-NEXT: div_u.d $w0, $w0, $w1197; P5600-NEXT: st.d $w0, 0($6)198; P5600-NEXT: jr $ra199; P5600-NEXT: nop200entry:201 %0 = load <2 x i64>, ptr %a, align 16202 %1 = load <2 x i64>, ptr %b, align 16203 %div = udiv <2 x i64> %0, %1204 store <2 x i64> %div, ptr %c, align 16205 ret void206}207 208define void @urem_v16u8(ptr %a, ptr %b, ptr %c) {209; P5600-LABEL: urem_v16u8:210; P5600: # %bb.0: # %entry211; P5600-NEXT: ld.b $w0, 0($4)212; P5600-NEXT: ld.b $w1, 0($5)213; P5600-NEXT: mod_u.b $w0, $w0, $w1214; P5600-NEXT: st.b $w0, 0($6)215; P5600-NEXT: jr $ra216; P5600-NEXT: nop217entry:218 %0 = load <16 x i8>, ptr %a, align 16219 %1 = load <16 x i8>, ptr %b, align 16220 %rem = urem <16 x i8> %0, %1221 store <16 x i8> %rem, ptr %c, align 16222 ret void223}224 225define void @urem_v8u16(ptr %a, ptr %b, ptr %c) {226; P5600-LABEL: urem_v8u16:227; P5600: # %bb.0: # %entry228; P5600-NEXT: ld.h $w0, 0($4)229; P5600-NEXT: ld.h $w1, 0($5)230; P5600-NEXT: mod_u.h $w0, $w0, $w1231; P5600-NEXT: st.h $w0, 0($6)232; P5600-NEXT: jr $ra233; P5600-NEXT: nop234entry:235 %0 = load <8 x i16>, ptr %a, align 16236 %1 = load <8 x i16>, ptr %b, align 16237 %rem = urem <8 x i16> %0, %1238 store <8 x i16> %rem, ptr %c, align 16239 ret void240}241 242define void @urem_v4u32(ptr %a, ptr %b, ptr %c) {243; P5600-LABEL: urem_v4u32:244; P5600: # %bb.0: # %entry245; P5600-NEXT: ld.w $w0, 0($4)246; P5600-NEXT: ld.w $w1, 0($5)247; P5600-NEXT: mod_u.w $w0, $w0, $w1248; P5600-NEXT: st.w $w0, 0($6)249; P5600-NEXT: jr $ra250; P5600-NEXT: nop251entry:252 %0 = load <4 x i32>, ptr %a, align 16253 %1 = load <4 x i32>, ptr %b, align 16254 %rem = urem <4 x i32> %0, %1255 store <4 x i32> %rem, ptr %c, align 16256 ret void257}258 259define void @urem_v2u64(ptr %a, ptr %b, ptr %c) {260; P5600-LABEL: urem_v2u64:261; P5600: # %bb.0: # %entry262; P5600-NEXT: ld.d $w0, 0($4)263; P5600-NEXT: ld.d $w1, 0($5)264; P5600-NEXT: mod_u.d $w0, $w0, $w1265; P5600-NEXT: st.d $w0, 0($6)266; P5600-NEXT: jr $ra267; P5600-NEXT: nop268entry:269 %0 = load <2 x i64>, ptr %a, align 16270 %1 = load <2 x i64>, ptr %b, align 16271 %rem = urem <2 x i64> %0, %1272 store <2 x i64> %rem, ptr %c, align 16273 ret void274}275