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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS323 4define i32 @sub_i32(i32 %x, i32 %y) {5; MIPS32-LABEL: sub_i32:6; MIPS32: # %bb.0: # %entry7; MIPS32-NEXT: subu $2, $4, $58; MIPS32-NEXT: jr $ra9; MIPS32-NEXT: nop10entry:11 %z = sub i32 %x, %y12 ret i32 %z13}14 15define signext i8 @sub_i8_sext(i8 signext %a, i8 signext %b) {16; MIPS32-LABEL: sub_i8_sext:17; MIPS32: # %bb.0: # %entry18; MIPS32-NEXT: subu $1, $5, $419; MIPS32-NEXT: sll $1, $1, 2420; MIPS32-NEXT: sra $2, $1, 2421; MIPS32-NEXT: jr $ra22; MIPS32-NEXT: nop23entry:24 %sub = sub i8 %b, %a25 ret i8 %sub26}27 28define zeroext i8 @sub_i8_zext(i8 zeroext %a, i8 zeroext %b) {29; MIPS32-LABEL: sub_i8_zext:30; MIPS32: # %bb.0: # %entry31; MIPS32-NEXT: subu $1, $5, $432; MIPS32-NEXT: andi $2, $1, 25533; MIPS32-NEXT: jr $ra34; MIPS32-NEXT: nop35entry:36 %sub = sub i8 %b, %a37 ret i8 %sub38}39 40define i8 @sub_i8_aext(i8 %a, i8 %b) {41; MIPS32-LABEL: sub_i8_aext:42; MIPS32: # %bb.0: # %entry43; MIPS32-NEXT: subu $2, $5, $444; MIPS32-NEXT: jr $ra45; MIPS32-NEXT: nop46entry:47 %sub = sub i8 %b, %a48 ret i8 %sub49}50 51define signext i16 @sub_i16_sext(i16 signext %a, i16 signext %b) {52; MIPS32-LABEL: sub_i16_sext:53; MIPS32: # %bb.0: # %entry54; MIPS32-NEXT: subu $1, $5, $455; MIPS32-NEXT: sll $1, $1, 1656; MIPS32-NEXT: sra $2, $1, 1657; MIPS32-NEXT: jr $ra58; MIPS32-NEXT: nop59entry:60 %sub = sub i16 %b, %a61 ret i16 %sub62}63 64define zeroext i16 @sub_i16_zext(i16 zeroext %a, i16 zeroext %b) {65; MIPS32-LABEL: sub_i16_zext:66; MIPS32: # %bb.0: # %entry67; MIPS32-NEXT: subu $1, $5, $468; MIPS32-NEXT: andi $2, $1, 6553569; MIPS32-NEXT: jr $ra70; MIPS32-NEXT: nop71entry:72 %sub = sub i16 %b, %a73 ret i16 %sub74}75 76define i16 @sub_i16_aext(i16 %a, i16 %b) {77; MIPS32-LABEL: sub_i16_aext:78; MIPS32: # %bb.0: # %entry79; MIPS32-NEXT: subu $2, $5, $480; MIPS32-NEXT: jr $ra81; MIPS32-NEXT: nop82entry:83 %sub = sub i16 %b, %a84 ret i16 %sub85}86 87define i64 @sub_i64(i64 %a, i64 %b) {88; MIPS32-LABEL: sub_i64:89; MIPS32: # %bb.0: # %entry90; MIPS32-NEXT: subu $2, $6, $491; MIPS32-NEXT: sltu $3, $6, $492; MIPS32-NEXT: subu $1, $7, $593; MIPS32-NEXT: subu $3, $1, $394; MIPS32-NEXT: jr $ra95; MIPS32-NEXT: nop96entry:97 %sub = sub i64 %b, %a98 ret i64 %sub99}100 101define i128 @sub_i128(i128 %a, i128 %b) {102; MIPS32-LABEL: sub_i128:103; MIPS32: # %bb.0: # %entry104; MIPS32-NEXT: move $9, $4105; MIPS32-NEXT: addiu $1, $sp, 16106; MIPS32-NEXT: lw $8, 0($1)107; MIPS32-NEXT: addiu $1, $sp, 20108; MIPS32-NEXT: lw $3, 0($1)109; MIPS32-NEXT: addiu $1, $sp, 24110; MIPS32-NEXT: lw $4, 0($1)111; MIPS32-NEXT: addiu $1, $sp, 28112; MIPS32-NEXT: lw $1, 0($1)113; MIPS32-NEXT: subu $2, $8, $9114; MIPS32-NEXT: sltu $9, $8, $9115; MIPS32-NEXT: subu $8, $3, $5116; MIPS32-NEXT: sltu $5, $3, $8117; MIPS32-NEXT: subu $3, $8, $9118; MIPS32-NEXT: sltiu $8, $8, 1119; MIPS32-NEXT: and $8, $8, $9120; MIPS32-NEXT: or $8, $5, $8121; MIPS32-NEXT: subu $6, $4, $6122; MIPS32-NEXT: sltu $5, $4, $6123; MIPS32-NEXT: andi $4, $8, 1124; MIPS32-NEXT: subu $4, $6, $4125; MIPS32-NEXT: sltiu $6, $6, 1126; MIPS32-NEXT: and $6, $6, $8127; MIPS32-NEXT: or $5, $5, $6128; MIPS32-NEXT: subu $1, $1, $7129; MIPS32-NEXT: andi $5, $5, 1130; MIPS32-NEXT: subu $5, $1, $5131; MIPS32-NEXT: jr $ra132; MIPS32-NEXT: nop133entry:134 %sub = sub i128 %b, %a135 ret i128 %sub136}137