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1; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py2; RUN: llc -O0 -mtriple=mipsel-linux-gnu -global-isel -verify-machineinstrs %s -o -| FileCheck %s -check-prefixes=MIPS323 4define i32 @load1_s8_to_zextLoad1_s32(ptr %px) {5; MIPS32-LABEL: load1_s8_to_zextLoad1_s32:6; MIPS32: # %bb.0: # %entry7; MIPS32-NEXT: lbu $2, 0($4)8; MIPS32-NEXT: jr $ra9; MIPS32-NEXT: nop10entry:11 %0 = load i8, ptr %px12 %conv = zext i8 %0 to i3213 ret i32 %conv14}15 16define i32 @load2_s16_to_zextLoad2_s32(ptr %px) {17; MIPS32-LABEL: load2_s16_to_zextLoad2_s32:18; MIPS32: # %bb.0: # %entry19; MIPS32-NEXT: lhu $2, 0($4)20; MIPS32-NEXT: jr $ra21; MIPS32-NEXT: nop22entry:23 %0 = load i16, ptr %px24 %conv = zext i16 %0 to i3225 ret i32 %conv26}27 28define i16 @load1_s8_to_zextLoad1_s16(ptr %px) {29; MIPS32-LABEL: load1_s8_to_zextLoad1_s16:30; MIPS32: # %bb.0: # %entry31; MIPS32-NEXT: lbu $2, 0($4)32; MIPS32-NEXT: jr $ra33; MIPS32-NEXT: nop34entry:35 %0 = load i8, ptr %px36 %conv = zext i8 %0 to i1637 ret i16 %conv38}39 40define zeroext i16 @load1_s8_to_zextLoad1_s16_to_zextLoad1_s32(ptr %px) {41; MIPS32-LABEL: load1_s8_to_zextLoad1_s16_to_zextLoad1_s32:42; MIPS32: # %bb.0: # %entry43; MIPS32-NEXT: lbu $2, 0($4)44; MIPS32-NEXT: jr $ra45; MIPS32-NEXT: nop46entry:47 %0 = load i8, ptr %px48 %conv = zext i8 %0 to i1649 ret i16 %conv50}51 52define i64 @load4_s32_to_zextLoad4_s64(ptr %px) {53; MIPS32-LABEL: load4_s32_to_zextLoad4_s64:54; MIPS32: # %bb.0: # %entry55; MIPS32-NEXT: lw $2, 0($4)56; MIPS32-NEXT: ori $3, $zero, 057; MIPS32-NEXT: jr $ra58; MIPS32-NEXT: nop59entry:60 %0 = load i32, ptr %px61 %conv = zext i32 %0 to i6462 ret i64 %conv63}64 65define i32 @load1_s8_to_sextLoad1_s32(ptr %px) {66; MIPS32-LABEL: load1_s8_to_sextLoad1_s32:67; MIPS32: # %bb.0: # %entry68; MIPS32-NEXT: lb $2, 0($4)69; MIPS32-NEXT: jr $ra70; MIPS32-NEXT: nop71entry:72 %0 = load i8, ptr %px73 %conv = sext i8 %0 to i3274 ret i32 %conv75}76 77define i32 @load2_s16_to_sextLoad2_s32(ptr %px) {78; MIPS32-LABEL: load2_s16_to_sextLoad2_s32:79; MIPS32: # %bb.0: # %entry80; MIPS32-NEXT: lh $2, 0($4)81; MIPS32-NEXT: jr $ra82; MIPS32-NEXT: nop83entry:84 %0 = load i16, ptr %px85 %conv = sext i16 %0 to i3286 ret i32 %conv87}88 89define i16 @load1_s8_to_sextLoad1_s16(ptr %px) {90; MIPS32-LABEL: load1_s8_to_sextLoad1_s16:91; MIPS32: # %bb.0: # %entry92; MIPS32-NEXT: lb $2, 0($4)93; MIPS32-NEXT: jr $ra94; MIPS32-NEXT: nop95entry:96 %0 = load i8, ptr %px97 %conv = sext i8 %0 to i1698 ret i16 %conv99}100 101define signext i16 @load1_s8_to_sextLoad1_s16_to_sextLoad1_s32(ptr %px) {102; MIPS32-LABEL: load1_s8_to_sextLoad1_s16_to_sextLoad1_s32:103; MIPS32: # %bb.0: # %entry104; MIPS32-NEXT: lb $2, 0($4)105; MIPS32-NEXT: jr $ra106; MIPS32-NEXT: nop107entry:108 %0 = load i8, ptr %px109 %conv = sext i8 %0 to i16110 ret i16 %conv111}112 113define i64 @load4_s32_to_sextLoad4_s64(ptr %px) {114; MIPS32-LABEL: load4_s32_to_sextLoad4_s64:115; MIPS32: # %bb.0: # %entry116; MIPS32-NEXT: lw $2, 0($4)117; MIPS32-NEXT: sra $3, $2, 31118; MIPS32-NEXT: jr $ra119; MIPS32-NEXT: nop120entry:121 %0 = load i32, ptr %px122 %conv = sext i32 %0 to i64123 ret i64 %conv124}125