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1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=mips-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS323--- |4 5 define void @load1_s8_to_zextLoad1_s32(ptr %px) {entry: ret void}6 define void @load2_s16_to_zextLoad2_s32(ptr %px) {entry: ret void}7 define void @load1_s8_to_zextLoad1_s16(ptr %px) {entry: ret void}8 define void @load1_s8_to_zextLoad1_s16_to_zextLoad1_s32(ptr %px) {entry: ret void}9 define void @load4_s32_to_zextLoad4_s64(ptr %px) {entry: ret void}10 define void @load1_s8_to_sextLoad1_s32(ptr %px) {entry: ret void}11 define void @load2_s16_to_sextLoad2_s32(ptr %px) {entry: ret void}12 define void @load1_s8_to_sextLoad1_s16(ptr %px) {entry: ret void}13 define void @load1_s8_to_sextLoad1_s16_to_sextLoad1_s32(ptr %px) {entry: ret void}14 define void @load4_s32_to_sextLoad4_s64(ptr %px) {entry: ret void}15 16...17---18name: load1_s8_to_zextLoad1_s3219alignment: 420tracksRegLiveness: true21body: |22 bb.1.entry:23 liveins: $a024 25 ; MIPS32-LABEL: name: load1_s8_to_zextLoad1_s3226 ; MIPS32: liveins: $a027 ; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a028 ; MIPS32: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8) from %ir.px)29 ; MIPS32: $v0 = COPY [[ZEXTLOAD]](s32)30 ; MIPS32: RetRA implicit $v031 %0:_(p0) = COPY $a032 %1:_(s8) = G_LOAD %0(p0) :: (load (s8) from %ir.px)33 %2:_(s32) = G_ZEXT %1(s8)34 $v0 = COPY %2(s32)35 RetRA implicit $v036 37...38---39name: load2_s16_to_zextLoad2_s3240alignment: 441tracksRegLiveness: true42body: |43 bb.1.entry:44 liveins: $a045 46 ; MIPS32-LABEL: name: load2_s16_to_zextLoad2_s3247 ; MIPS32: liveins: $a048 ; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a049 ; MIPS32: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s16) from %ir.px)50 ; MIPS32: $v0 = COPY [[ZEXTLOAD]](s32)51 ; MIPS32: RetRA implicit $v052 %0:_(p0) = COPY $a053 %1:_(s16) = G_LOAD %0(p0) :: (load (s16) from %ir.px)54 %2:_(s32) = G_ZEXT %1(s16)55 $v0 = COPY %2(s32)56 RetRA implicit $v057 58...59---60name: load1_s8_to_zextLoad1_s1661alignment: 462tracksRegLiveness: true63body: |64 bb.1.entry:65 liveins: $a066 67 ; MIPS32-LABEL: name: load1_s8_to_zextLoad1_s1668 ; MIPS32: liveins: $a069 ; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a070 ; MIPS32: [[ZEXTLOAD:%[0-9]+]]:_(s16) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8) from %ir.px)71 ; MIPS32: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[ZEXTLOAD]](s16)72 ; MIPS32: $v0 = COPY [[ANYEXT]](s32)73 ; MIPS32: RetRA implicit $v074 %0:_(p0) = COPY $a075 %1:_(s8) = G_LOAD %0(p0) :: (load (s8) from %ir.px)76 %2:_(s16) = G_ZEXT %1(s8)77 %3:_(s32) = G_ANYEXT %2(s16)78 $v0 = COPY %3(s32)79 RetRA implicit $v080 81...82---83name: load1_s8_to_zextLoad1_s16_to_zextLoad1_s3284alignment: 485tracksRegLiveness: true86body: |87 bb.1.entry:88 liveins: $a089 90 ; MIPS32-LABEL: name: load1_s8_to_zextLoad1_s16_to_zextLoad1_s3291 ; MIPS32: liveins: $a092 ; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a093 ; MIPS32: [[ZEXTLOAD:%[0-9]+]]:_(s32) = G_ZEXTLOAD [[COPY]](p0) :: (load (s8) from %ir.px)94 ; MIPS32: $v0 = COPY [[ZEXTLOAD]](s32)95 ; MIPS32: RetRA implicit $v096 %0:_(p0) = COPY $a097 %1:_(s8) = G_LOAD %0(p0) :: (load (s8) from %ir.px)98 %2:_(s16) = G_ZEXT %1(s8)99 %3:_(s32) = G_ZEXT %2(s16)100 $v0 = COPY %3(s32)101 RetRA implicit $v0102 103...104---105name: load4_s32_to_zextLoad4_s64106alignment: 4107tracksRegLiveness: true108body: |109 bb.1.entry:110 liveins: $a0111 112 ; MIPS32-LABEL: name: load4_s32_to_zextLoad4_s64113 ; MIPS32: liveins: $a0114 ; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0115 ; MIPS32: [[ZEXTLOAD:%[0-9]+]]:_(s64) = G_ZEXTLOAD [[COPY]](p0) :: (load (s32) from %ir.px)116 ; MIPS32: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[ZEXTLOAD]](s64)117 ; MIPS32: $v0 = COPY [[UV]](s32)118 ; MIPS32: $v1 = COPY [[UV1]](s32)119 ; MIPS32: RetRA implicit $v0, implicit $v1120 %0:_(p0) = COPY $a0121 %1:_(s32) = G_LOAD %0(p0) :: (load (s32) from %ir.px)122 %2:_(s64) = G_ZEXT %1(s32)123 %3:_(s32), %4:_(s32) = G_UNMERGE_VALUES %2(s64)124 $v0 = COPY %3(s32)125 $v1 = COPY %4(s32)126 RetRA implicit $v0, implicit $v1127 128...129---130name: load1_s8_to_sextLoad1_s32131alignment: 4132tracksRegLiveness: true133body: |134 bb.1.entry:135 liveins: $a0136 137 ; MIPS32-LABEL: name: load1_s8_to_sextLoad1_s32138 ; MIPS32: liveins: $a0139 ; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0140 ; MIPS32: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8) from %ir.px)141 ; MIPS32: $v0 = COPY [[SEXTLOAD]](s32)142 ; MIPS32: RetRA implicit $v0143 %0:_(p0) = COPY $a0144 %1:_(s8) = G_LOAD %0(p0) :: (load (s8) from %ir.px)145 %2:_(s32) = G_SEXT %1(s8)146 $v0 = COPY %2(s32)147 RetRA implicit $v0148 149...150---151name: load2_s16_to_sextLoad2_s32152alignment: 4153tracksRegLiveness: true154body: |155 bb.1.entry:156 liveins: $a0157 158 ; MIPS32-LABEL: name: load2_s16_to_sextLoad2_s32159 ; MIPS32: liveins: $a0160 ; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0161 ; MIPS32: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s16) from %ir.px)162 ; MIPS32: $v0 = COPY [[SEXTLOAD]](s32)163 ; MIPS32: RetRA implicit $v0164 %0:_(p0) = COPY $a0165 %1:_(s16) = G_LOAD %0(p0) :: (load (s16) from %ir.px)166 %2:_(s32) = G_SEXT %1(s16)167 $v0 = COPY %2(s32)168 RetRA implicit $v0169 170...171---172name: load1_s8_to_sextLoad1_s16173alignment: 4174tracksRegLiveness: true175body: |176 bb.1.entry:177 liveins: $a0178 179 ; MIPS32-LABEL: name: load1_s8_to_sextLoad1_s16180 ; MIPS32: liveins: $a0181 ; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0182 ; MIPS32: [[SEXTLOAD:%[0-9]+]]:_(s16) = G_SEXTLOAD [[COPY]](p0) :: (load (s8) from %ir.px)183 ; MIPS32: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SEXTLOAD]](s16)184 ; MIPS32: $v0 = COPY [[ANYEXT]](s32)185 ; MIPS32: RetRA implicit $v0186 %0:_(p0) = COPY $a0187 %1:_(s8) = G_LOAD %0(p0) :: (load (s8) from %ir.px)188 %2:_(s16) = G_SEXT %1(s8)189 %3:_(s32) = G_ANYEXT %2(s16)190 $v0 = COPY %3(s32)191 RetRA implicit $v0192 193...194---195name: load1_s8_to_sextLoad1_s16_to_sextLoad1_s32196alignment: 4197tracksRegLiveness: true198body: |199 bb.1.entry:200 liveins: $a0201 202 ; MIPS32-LABEL: name: load1_s8_to_sextLoad1_s16_to_sextLoad1_s32203 ; MIPS32: liveins: $a0204 ; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0205 ; MIPS32: [[SEXTLOAD:%[0-9]+]]:_(s32) = G_SEXTLOAD [[COPY]](p0) :: (load (s8) from %ir.px)206 ; MIPS32: $v0 = COPY [[SEXTLOAD]](s32)207 ; MIPS32: RetRA implicit $v0208 %0:_(p0) = COPY $a0209 %1:_(s8) = G_LOAD %0(p0) :: (load (s8) from %ir.px)210 %2:_(s16) = G_SEXT %1(s8)211 %3:_(s32) = G_SEXT %2(s16)212 $v0 = COPY %3(s32)213 RetRA implicit $v0214 215...216---217name: load4_s32_to_sextLoad4_s64218alignment: 4219tracksRegLiveness: true220body: |221 bb.1.entry:222 liveins: $a0223 224 ; MIPS32-LABEL: name: load4_s32_to_sextLoad4_s64225 ; MIPS32: liveins: $a0226 ; MIPS32: [[COPY:%[0-9]+]]:_(p0) = COPY $a0227 ; MIPS32: [[SEXTLOAD:%[0-9]+]]:_(s64) = G_SEXTLOAD [[COPY]](p0) :: (load (s32) from %ir.px)228 ; MIPS32: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SEXTLOAD]](s64)229 ; MIPS32: $v0 = COPY [[UV]](s32)230 ; MIPS32: $v1 = COPY [[UV1]](s32)231 ; MIPS32: RetRA implicit $v0, implicit $v1232 %0:_(p0) = COPY $a0233 %1:_(s32) = G_LOAD %0(p0) :: (load (s32) from %ir.px)234 %2:_(s64) = G_SEXT %1(s32)235 %3:_(s32), %4:_(s32) = G_UNMERGE_VALUES %2(s64)236 $v0 = COPY %3(s32)237 $v1 = COPY %4(s32)238 RetRA implicit $v0, implicit $v1239 240...241