435 lines · plain
1# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py2# RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=regbankselect -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=MIPS323--- |4 5 define i32 @phi_i32(i1 %cnd, i32 %a, i32 %b) {6 entry:7 br i1 %cnd, label %cond.true, label %cond.false8 9 cond.true: ; preds = %entry10 br label %cond.end11 12 cond.false: ; preds = %entry13 br label %cond.end14 15 cond.end: ; preds = %cond.false, %cond.true16 %cond = phi i32 [ %a, %cond.true ], [ %b, %cond.false ]17 ret i32 %cond18 }19 20 define i64 @phi_i64(i1 %cnd, i64 %a, i64 %b) {21 entry:22 br i1 %cnd, label %cond.true, label %cond.false23 24 cond.true: ; preds = %entry25 br label %cond.end26 27 cond.false: ; preds = %entry28 br label %cond.end29 30 cond.end: ; preds = %cond.false, %cond.true31 %cond = phi i64 [ %a, %cond.true ], [ %b, %cond.false ]32 ret i64 %cond33 }34 35 define void @phi_ambiguous_i64_in_fpr(i1 %cnd, ptr %i64_ptr_a, ptr %i64_ptr_b, ptr %i64_ptr_c) {36 entry:37 %0 = load i64, ptr %i64_ptr_a, align 838 %1 = load i64, ptr %i64_ptr_b, align 839 br i1 %cnd, label %cond.true, label %cond.false40 41 cond.true: ; preds = %entry42 br label %cond.end43 44 cond.false: ; preds = %entry45 br label %cond.end46 47 cond.end: ; preds = %cond.false, %cond.true48 %cond = phi i64 [ %0, %cond.true ], [ %1, %cond.false ]49 store i64 %cond, ptr %i64_ptr_c, align 850 ret void51 }52 53 define float @phi_float(i1 %cnd, float %a, float %b) {54 entry:55 br i1 %cnd, label %cond.true, label %cond.false56 57 cond.true: ; preds = %entry58 br label %cond.end59 60 cond.false: ; preds = %entry61 br label %cond.end62 63 cond.end: ; preds = %cond.false, %cond.true64 %cond = phi float [ %a, %cond.true ], [ %b, %cond.false ]65 ret float %cond66 }67 68 define void @phi_ambiguous_float_in_gpr(i1 %cnd, ptr %f32_ptr_a, ptr %f32_ptr_b, ptr %f32_ptr_c) {69 entry:70 %0 = load float, ptr %f32_ptr_a, align 471 %1 = load float, ptr %f32_ptr_b, align 472 br i1 %cnd, label %cond.true, label %cond.false73 74 cond.true: ; preds = %entry75 br label %cond.end76 77 cond.false: ; preds = %entry78 br label %cond.end79 80 cond.end: ; preds = %cond.false, %cond.true81 %cond = phi float [ %0, %cond.true ], [ %1, %cond.false ]82 store float %cond, ptr %f32_ptr_c, align 483 ret void84 }85 86 define double @phi_double(double %a, double %b, i1 %cnd) {87 entry:88 br i1 %cnd, label %cond.true, label %cond.false89 90 cond.true: ; preds = %entry91 br label %cond.end92 93 cond.false: ; preds = %entry94 br label %cond.end95 96 cond.end: ; preds = %cond.false, %cond.true97 %cond = phi double [ %a, %cond.true ], [ %b, %cond.false ]98 ret double %cond99 }100 101...102---103name: phi_i32104alignment: 4105legalized: true106tracksRegLiveness: true107body: |108 ; MIPS32-LABEL: name: phi_i32109 ; MIPS32: bb.0.entry:110 ; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)111 ; MIPS32: liveins: $a0, $a1, $a2112 ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0113 ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1114 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2115 ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1116 ; MIPS32: [[COPY3:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32)117 ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY3]], [[C]]118 ; MIPS32: G_BRCOND [[AND]](s32), %bb.1119 ; MIPS32: G_BR %bb.2120 ; MIPS32: bb.1.cond.true:121 ; MIPS32: successors: %bb.3(0x80000000)122 ; MIPS32: G_BR %bb.3123 ; MIPS32: bb.2.cond.false:124 ; MIPS32: successors: %bb.3(0x80000000)125 ; MIPS32: bb.3.cond.end:126 ; MIPS32: [[PHI:%[0-9]+]]:gprb(s32) = G_PHI [[COPY1]](s32), %bb.1, [[COPY2]](s32), %bb.2127 ; MIPS32: $v0 = COPY [[PHI]](s32)128 ; MIPS32: RetRA implicit $v0129 bb.1.entry:130 liveins: $a0, $a1, $a2131 132 %3:_(s32) = COPY $a0133 %1:_(s32) = COPY $a1134 %2:_(s32) = COPY $a2135 %6:_(s32) = G_CONSTANT i32 1136 %7:_(s32) = COPY %3(s32)137 %5:_(s32) = G_AND %7, %6138 G_BRCOND %5(s32), %bb.2139 G_BR %bb.3140 141 bb.2.cond.true:142 G_BR %bb.4143 144 bb.3.cond.false:145 146 bb.4.cond.end:147 %4:_(s32) = G_PHI %1(s32), %bb.2, %2(s32), %bb.3148 $v0 = COPY %4(s32)149 RetRA implicit $v0150 151...152---153name: phi_i64154alignment: 4155legalized: true156tracksRegLiveness: true157fixedStack:158 - { id: 0, offset: 20, size: 4, alignment: 4, isImmutable: true }159 - { id: 1, offset: 16, size: 4, alignment: 8, isImmutable: true }160body: |161 ; MIPS32-LABEL: name: phi_i64162 ; MIPS32: bb.0.entry:163 ; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)164 ; MIPS32: liveins: $a0, $a2, $a3165 ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0166 ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a2167 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a3168 ; MIPS32: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0169 ; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %fixed-stack.0, align 8)170 ; MIPS32: [[FRAME_INDEX1:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.1171 ; MIPS32: [[LOAD1:%[0-9]+]]:gprb(s32) = G_LOAD [[FRAME_INDEX1]](p0) :: (load (s32) from %fixed-stack.1)172 ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1173 ; MIPS32: [[COPY3:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32)174 ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY3]], [[C]]175 ; MIPS32: G_BRCOND [[AND]](s32), %bb.1176 ; MIPS32: G_BR %bb.2177 ; MIPS32: bb.1.cond.true:178 ; MIPS32: successors: %bb.3(0x80000000)179 ; MIPS32: G_BR %bb.3180 ; MIPS32: bb.2.cond.false:181 ; MIPS32: successors: %bb.3(0x80000000)182 ; MIPS32: bb.3.cond.end:183 ; MIPS32: [[PHI:%[0-9]+]]:gprb(s32) = G_PHI [[COPY1]](s32), %bb.1, [[LOAD]](s32), %bb.2184 ; MIPS32: [[PHI1:%[0-9]+]]:gprb(s32) = G_PHI [[COPY2]](s32), %bb.1, [[LOAD1]](s32), %bb.2185 ; MIPS32: $v0 = COPY [[PHI]](s32)186 ; MIPS32: $v1 = COPY [[PHI1]](s32)187 ; MIPS32: RetRA implicit $v0, implicit $v1188 bb.1.entry:189 liveins: $a0, $a2, $a3190 191 %3:_(s32) = COPY $a0192 %4:_(s32) = COPY $a2193 %5:_(s32) = COPY $a3194 %1:_(s64) = G_MERGE_VALUES %4(s32), %5(s32)195 %8:_(p0) = G_FRAME_INDEX %fixed-stack.1196 %6:_(s32) = G_LOAD %8(p0) :: (load (s32) from %fixed-stack.1, align 8)197 %9:_(p0) = G_FRAME_INDEX %fixed-stack.0198 %7:_(s32) = G_LOAD %9(p0) :: (load (s32) from %fixed-stack.0)199 %2:_(s64) = G_MERGE_VALUES %6(s32), %7(s32)200 %14:_(s32) = G_CONSTANT i32 1201 %15:_(s32) = COPY %3(s32)202 %13:_(s32) = G_AND %15, %14203 G_BRCOND %13(s32), %bb.2204 G_BR %bb.3205 206 bb.2.cond.true:207 G_BR %bb.4208 209 bb.3.cond.false:210 211 bb.4.cond.end:212 %10:_(s64) = G_PHI %1(s64), %bb.2, %2(s64), %bb.3213 %11:_(s32), %12:_(s32) = G_UNMERGE_VALUES %10(s64)214 $v0 = COPY %11(s32)215 $v1 = COPY %12(s32)216 RetRA implicit $v0, implicit $v1217 218...219---220name: phi_ambiguous_i64_in_fpr221alignment: 4222legalized: true223tracksRegLiveness: true224body: |225 ; MIPS32-LABEL: name: phi_ambiguous_i64_in_fpr226 ; MIPS32: bb.0.entry:227 ; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)228 ; MIPS32: liveins: $a0, $a1, $a2, $a3229 ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0230 ; MIPS32: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1231 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(p0) = COPY $a2232 ; MIPS32: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3233 ; MIPS32: [[LOAD:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY1]](p0) :: (load (s64) from %ir.i64_ptr_a)234 ; MIPS32: [[LOAD1:%[0-9]+]]:fprb(s64) = G_LOAD [[COPY2]](p0) :: (load (s64) from %ir.i64_ptr_b)235 ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1236 ; MIPS32: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32)237 ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C]]238 ; MIPS32: G_BRCOND [[AND]](s32), %bb.1239 ; MIPS32: G_BR %bb.2240 ; MIPS32: bb.1.cond.true:241 ; MIPS32: successors: %bb.3(0x80000000)242 ; MIPS32: G_BR %bb.3243 ; MIPS32: bb.2.cond.false:244 ; MIPS32: successors: %bb.3(0x80000000)245 ; MIPS32: bb.3.cond.end:246 ; MIPS32: [[PHI:%[0-9]+]]:fprb(s64) = G_PHI [[LOAD]](s64), %bb.1, [[LOAD1]](s64), %bb.2247 ; MIPS32: G_STORE [[PHI]](s64), [[COPY3]](p0) :: (store (s64) into %ir.i64_ptr_c)248 ; MIPS32: RetRA249 bb.1.entry:250 liveins: $a0, $a1, $a2, $a3251 252 %4:_(s32) = COPY $a0253 %1:_(p0) = COPY $a1254 %2:_(p0) = COPY $a2255 %3:_(p0) = COPY $a3256 %5:_(s64) = G_LOAD %1(p0) :: (load (s64) from %ir.i64_ptr_a)257 %6:_(s64) = G_LOAD %2(p0) :: (load (s64) from %ir.i64_ptr_b)258 %9:_(s32) = G_CONSTANT i32 1259 %10:_(s32) = COPY %4(s32)260 %8:_(s32) = G_AND %10, %9261 G_BRCOND %8(s32), %bb.2262 G_BR %bb.3263 264 bb.2.cond.true:265 G_BR %bb.4266 267 bb.3.cond.false:268 269 bb.4.cond.end:270 %7:_(s64) = G_PHI %5(s64), %bb.2, %6(s64), %bb.3271 G_STORE %7(s64), %3(p0) :: (store (s64) into %ir.i64_ptr_c)272 RetRA273 274...275---276name: phi_float277alignment: 4278legalized: true279tracksRegLiveness: true280body: |281 ; MIPS32-LABEL: name: phi_float282 ; MIPS32: bb.0.entry:283 ; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)284 ; MIPS32: liveins: $a0, $a1, $a2285 ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0286 ; MIPS32: [[COPY1:%[0-9]+]]:gprb(s32) = COPY $a1287 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY $a2288 ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1289 ; MIPS32: [[COPY3:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32)290 ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY3]], [[C]]291 ; MIPS32: G_BRCOND [[AND]](s32), %bb.1292 ; MIPS32: G_BR %bb.2293 ; MIPS32: bb.1.cond.true:294 ; MIPS32: successors: %bb.3(0x80000000)295 ; MIPS32: G_BR %bb.3296 ; MIPS32: bb.2.cond.false:297 ; MIPS32: successors: %bb.3(0x80000000)298 ; MIPS32: bb.3.cond.end:299 ; MIPS32: [[PHI:%[0-9]+]]:gprb(s32) = G_PHI [[COPY1]](s32), %bb.1, [[COPY2]](s32), %bb.2300 ; MIPS32: $f0 = COPY [[PHI]](s32)301 ; MIPS32: RetRA implicit $f0302 bb.1.entry:303 liveins: $a0, $a1, $a2304 305 %3:_(s32) = COPY $a0306 %1:_(s32) = COPY $a1307 %2:_(s32) = COPY $a2308 %6:_(s32) = G_CONSTANT i32 1309 %7:_(s32) = COPY %3(s32)310 %5:_(s32) = G_AND %7, %6311 G_BRCOND %5(s32), %bb.2312 G_BR %bb.3313 314 bb.2.cond.true:315 G_BR %bb.4316 317 bb.3.cond.false:318 319 bb.4.cond.end:320 %4:_(s32) = G_PHI %1(s32), %bb.2, %2(s32), %bb.3321 $f0 = COPY %4(s32)322 RetRA implicit $f0323 324...325---326name: phi_ambiguous_float_in_gpr327alignment: 4328legalized: true329tracksRegLiveness: true330body: |331 ; MIPS32-LABEL: name: phi_ambiguous_float_in_gpr332 ; MIPS32: bb.0.entry:333 ; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)334 ; MIPS32: liveins: $a0, $a1, $a2, $a3335 ; MIPS32: [[COPY:%[0-9]+]]:gprb(s32) = COPY $a0336 ; MIPS32: [[COPY1:%[0-9]+]]:gprb(p0) = COPY $a1337 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(p0) = COPY $a2338 ; MIPS32: [[COPY3:%[0-9]+]]:gprb(p0) = COPY $a3339 ; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY1]](p0) :: (load (s32) from %ir.f32_ptr_a)340 ; MIPS32: [[LOAD1:%[0-9]+]]:gprb(s32) = G_LOAD [[COPY2]](p0) :: (load (s32) from %ir.f32_ptr_b)341 ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1342 ; MIPS32: [[COPY4:%[0-9]+]]:gprb(s32) = COPY [[COPY]](s32)343 ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY4]], [[C]]344 ; MIPS32: G_BRCOND [[AND]](s32), %bb.1345 ; MIPS32: G_BR %bb.2346 ; MIPS32: bb.1.cond.true:347 ; MIPS32: successors: %bb.3(0x80000000)348 ; MIPS32: G_BR %bb.3349 ; MIPS32: bb.2.cond.false:350 ; MIPS32: successors: %bb.3(0x80000000)351 ; MIPS32: bb.3.cond.end:352 ; MIPS32: [[PHI:%[0-9]+]]:gprb(s32) = G_PHI [[LOAD]](s32), %bb.1, [[LOAD1]](s32), %bb.2353 ; MIPS32: G_STORE [[PHI]](s32), [[COPY3]](p0) :: (store (s32) into %ir.f32_ptr_c)354 ; MIPS32: RetRA355 bb.1.entry:356 liveins: $a0, $a1, $a2, $a3357 358 %4:_(s32) = COPY $a0359 %1:_(p0) = COPY $a1360 %2:_(p0) = COPY $a2361 %3:_(p0) = COPY $a3362 %5:_(s32) = G_LOAD %1(p0) :: (load (s32) from %ir.f32_ptr_a)363 %6:_(s32) = G_LOAD %2(p0) :: (load (s32) from %ir.f32_ptr_b)364 %9:_(s32) = G_CONSTANT i32 1365 %10:_(s32) = COPY %4(s32)366 %8:_(s32) = G_AND %10, %9367 G_BRCOND %8(s32), %bb.2368 G_BR %bb.3369 370 bb.2.cond.true:371 G_BR %bb.4372 373 bb.3.cond.false:374 375 bb.4.cond.end:376 %7:_(s32) = G_PHI %5(s32), %bb.2, %6(s32), %bb.3377 G_STORE %7(s32), %3(p0) :: (store (s32) into %ir.f32_ptr_c)378 RetRA379 380...381---382name: phi_double383alignment: 4384legalized: true385tracksRegLiveness: true386fixedStack:387 - { id: 0, offset: 16, size: 4, alignment: 8, isImmutable: true }388body: |389 ; MIPS32-LABEL: name: phi_double390 ; MIPS32: bb.0.entry:391 ; MIPS32: successors: %bb.1(0x40000000), %bb.2(0x40000000)392 ; MIPS32: liveins: $d6, $d7393 ; MIPS32: [[COPY:%[0-9]+]]:fprb(s64) = COPY $d6394 ; MIPS32: [[COPY1:%[0-9]+]]:fprb(s64) = COPY $d7395 ; MIPS32: [[FRAME_INDEX:%[0-9]+]]:gprb(p0) = G_FRAME_INDEX %fixed-stack.0396 ; MIPS32: [[LOAD:%[0-9]+]]:gprb(s32) = G_LOAD [[FRAME_INDEX]](p0) :: (load (s32) from %fixed-stack.0, align 8)397 ; MIPS32: [[C:%[0-9]+]]:gprb(s32) = G_CONSTANT i32 1398 ; MIPS32: [[COPY2:%[0-9]+]]:gprb(s32) = COPY [[LOAD]](s32)399 ; MIPS32: [[AND:%[0-9]+]]:gprb(s32) = G_AND [[COPY2]], [[C]]400 ; MIPS32: G_BRCOND [[AND]](s32), %bb.1401 ; MIPS32: G_BR %bb.2402 ; MIPS32: bb.1.cond.true:403 ; MIPS32: successors: %bb.3(0x80000000)404 ; MIPS32: G_BR %bb.3405 ; MIPS32: bb.2.cond.false:406 ; MIPS32: successors: %bb.3(0x80000000)407 ; MIPS32: bb.3.cond.end:408 ; MIPS32: [[PHI:%[0-9]+]]:fprb(s64) = G_PHI [[COPY]](s64), %bb.1, [[COPY1]](s64), %bb.2409 ; MIPS32: $d0 = COPY [[PHI]](s64)410 ; MIPS32: RetRA implicit $d0411 bb.1.entry:412 liveins: $d6, $d7413 414 %0:_(s64) = COPY $d6415 %1:_(s64) = COPY $d7416 %4:_(p0) = G_FRAME_INDEX %fixed-stack.0417 %3:_(s32) = G_LOAD %4(p0) :: (load (s32) from %fixed-stack.0, align 8)418 %7:_(s32) = G_CONSTANT i32 1419 %8:_(s32) = COPY %3(s32)420 %6:_(s32) = G_AND %8, %7421 G_BRCOND %6(s32), %bb.2422 G_BR %bb.3423 424 bb.2.cond.true:425 G_BR %bb.4426 427 bb.3.cond.false:428 429 bb.4.cond.end:430 %5:_(s64) = G_PHI %0(s64), %bb.2, %1(s64), %bb.3431 $d0 = COPY %5(s64)432 RetRA implicit $d0433 434...435