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1; RUN: llc -mtriple=mips -relocation-model=static -mattr=single-float < %s \2; RUN: | FileCheck --check-prefixes=ALL,SYM32,O32 %s3; RUN: llc -mtriple=mipsel -relocation-model=static -mattr=single-float < %s \4; RUN: | FileCheck --check-prefixes=ALL,SYM32,O32 %s5 6; RUN: llc -mtriple=mips64 -relocation-model=static -target-abi n32 -mattr=single-float < %s \7; RUN: | FileCheck --check-prefixes=ALL,SYM32,N32,NEW,NEWBE %s8; RUN: llc -mtriple=mips64el -relocation-model=static -target-abi n32 -mattr=single-float < %s \9; RUN: | FileCheck --check-prefixes=ALL,SYM32,N32,NEW,NEWLE %s10 11; RUN: llc -mtriple=mips64 -relocation-model=static -target-abi n64 -mattr=single-float < %s \12; RUN: | FileCheck --check-prefixes=ALL,SYM64,N64,NEW,NEWBE %s13; RUN: llc -mtriple=mips64el -relocation-model=static -target-abi n64 -mattr=single-float < %s \14; RUN: | FileCheck --check-prefixes=ALL,SYM64,N64,NEW,NEWLE %s15 16@floats = global [11 x float] zeroinitializer17@doubles = global [11 x double] zeroinitializer18 19define void @double_args(double %a, ...)20 nounwind {21entry:22 %0 = getelementptr [11 x double], ptr @doubles, i32 0, i32 123 store volatile double %a, ptr %024 25 %ap = alloca ptr26 call void @llvm.va_start(ptr %ap)27 %b = va_arg ptr %ap, double28 %1 = getelementptr [11 x double], ptr @doubles, i32 0, i32 229 store volatile double %b, ptr %130 call void @llvm.va_end(ptr %ap)31 ret void32}33 34; ALL-LABEL: double_args:35; We won't test the way the global address is calculated in this test. This is36; just to get the register number for the other checks.37; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)38; SYM64-DAG: daddiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(doubles)39 40; O32 forbids using floating point registers for the non-variable portion.41; N32/N64 allow it.42; O32-DAG: sw $4, 8([[R2]])43; O32-DAG: sw $5, 12([[R2]])44; NEW-DAG: sd $4, 8([[R2]])45 46; The varargs portion is dumped to stack47; O32-DAG: sw $6, 16($sp)48; O32-DAG: sw $7, 20($sp)49; NEW-DAG: sd $5, 8($sp)50; NEW-DAG: sd $6, 16($sp)51; NEW-DAG: sd $7, 24($sp)52; NEW-DAG: sd $8, 32($sp)53; NEW-DAG: sd $9, 40($sp)54; NEW-DAG: sd $10, 48($sp)55; NEW-DAG: sd $11, 56($sp)56 57; Get the varargs pointer58; O32 has 4 bytes padding, 4 bytes for the varargs pointer, and 8 bytes reserved59; for arguments 1 and 2.60; N32/N64 has 8 bytes for the varargs pointer, and no reserved area.61; O32-DAG: addiu [[VAPTR:\$[0-9]+]], $sp, 1662; O32-DAG: sw [[VAPTR]], 4($sp)63; N32-DAG: addiu [[VAPTR:\$[0-9]+]], $sp, 864; N32-DAG: sw [[VAPTR]], 4($sp)65; N64-DAG: daddiu [[VAPTR:\$[0-9]+]], $sp, 866; N64-DAG: sd [[VAPTR]], 0($sp)67 68; Increment the pointer then get the varargs arg69; LLVM will rebind the load to the stack pointer instead of the varargs pointer70; during lowering. This is fine and doesn't change the behaviour.71; O32-DAG: addiu [[VAPTR]], [[VAPTR]], 872; N32-DAG: addiu [[VAPTR]], [[VAPTR]], 873; N64-DAG: daddiu [[VAPTR]], [[VAPTR]], 874; O32-DAG: lw [[R3:\$[0-9]+]], 16($sp)75; O32-DAG: lw [[R4:\$[0-9]+]], 20($sp)76; O32-DAG: sw [[R3]], 16([[R2]])77; O32-DAG: sw [[R4]], 20([[R2]])78; NEW-DAG: ld [[R3:\$[0-9]+]], 8($sp)79; NEW-DAG: sd [[R3]], 16([[R2]])80 81define void @float_args(float %a, ...) nounwind {82entry:83 %0 = getelementptr [11 x float], ptr @floats, i32 0, i32 184 store volatile float %a, ptr %085 86 %ap = alloca ptr87 call void @llvm.va_start(ptr %ap)88 %b = va_arg ptr %ap, float89 %1 = getelementptr [11 x float], ptr @floats, i32 0, i32 290 store volatile float %b, ptr %191 call void @llvm.va_end(ptr %ap)92 ret void93}94 95; ALL-LABEL: float_args:96; We won't test the way the global address is calculated in this test. This is97; just to get the register number for the other checks.98; SYM32-DAG: addiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)99; SYM64-DAG: daddiu [[R2:\$[0-9]+]], ${{[0-9]+}}, %lo(floats)100 101; The first four arguments are the same in O32/N32/N64.102; The non-variable portion should be unaffected.103; O32-DAG: mtc1 $4, $f0104; O32-DAG: swc1 $f0, 4([[R2]])105; NEW-DAG: swc1 $f12, 4([[R2]])106 107; The varargs portion is dumped to stack108; O32-DAG: sw $5, 12($sp)109; O32-DAG: sw $6, 16($sp)110; O32-DAG: sw $7, 20($sp)111; NEW-DAG: sd $5, 8($sp)112; NEW-DAG: sd $6, 16($sp)113; NEW-DAG: sd $7, 24($sp)114; NEW-DAG: sd $8, 32($sp)115; NEW-DAG: sd $9, 40($sp)116; NEW-DAG: sd $10, 48($sp)117; NEW-DAG: sd $11, 56($sp)118 119; Get the varargs pointer120; O32 has 4 bytes padding, 4 bytes for the varargs pointer, and should have 8121; bytes reserved for arguments 1 and 2 (the first float arg) but as discussed in122; arguments-float.ll, GCC doesn't agree with MD00305 and treats floats as 4123; bytes so we only have 12 bytes total.124; N32/N64 has 8 bytes for the varargs pointer, and no reserved area.125; O32-DAG: addiu [[VAPTR:\$[0-9]+]], $sp, 12126; O32-DAG: sw [[VAPTR]], 4($sp)127; N32-DAG: addiu [[VAPTR:\$[0-9]+]], $sp, 8128; N32-DAG: sw [[VAPTR]], 4($sp)129; N64-DAG: daddiu [[VAPTR:\$[0-9]+]], $sp, 8130; N64-DAG: sd [[VAPTR]], 0($sp)131 132; Increment the pointer then get the varargs arg133; LLVM will rebind the load to the stack pointer instead of the varargs pointer134; during lowering. This is fine and doesn't change the behaviour.135; Also, in big-endian mode the offset must be increased by 4 to retrieve the136; correct half of the argument slot.137;138; O32-DAG: addiu [[VAPTR]], [[VAPTR]], 4139; N32-DAG: addiu [[VAPTR]], [[VAPTR]], 8140; N64-DAG: daddiu [[VAPTR]], [[VAPTR]], 8141; O32-DAG: lwc1 [[FTMP1:\$f[0-9]+]], 12($sp)142; NEWLE-DAG: lwc1 [[FTMP1:\$f[0-9]+]], 8($sp)143; NEWBE-DAG: lwc1 [[FTMP1:\$f[0-9]+]], 12($sp)144; ALL-DAG: swc1 [[FTMP1]], 8([[R2]])145 146declare void @llvm.va_start(ptr)147declare void @llvm.va_copy(ptr, ptr)148declare void @llvm.va_end(ptr)149